From patchwork Tue Feb 1 00:10:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 12731313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CBCAC43217 for ; Tue, 1 Feb 2022 00:11:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230198AbiBAALI (ORCPT ); Mon, 31 Jan 2022 19:11:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230187AbiBAALH (ORCPT ); Mon, 31 Jan 2022 19:11:07 -0500 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14823C061714 for ; Mon, 31 Jan 2022 16:11:07 -0800 (PST) Received: by mail-pl1-x630.google.com with SMTP id s6so8424686plg.12 for ; Mon, 31 Jan 2022 16:11:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9+cijBLvhJxxRYTV1vDRfsp76gMHCb5POk8j3TEiH8M=; b=Jm2CaDN2N7qqGbiD2LddLHmzL00xLkXv3Y3pOSGVcnR7GXM8amxWj2yM/Sle/RNG+S f0i0SumDRisGYCqyxMGl4b1wnjKO3oBK8VAKQEOjXmriLtMaL4N+usgJvc2y7F532veE IEZcTA3+GAq//gjof5wktp2Ofbrf2vXKPkBuA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9+cijBLvhJxxRYTV1vDRfsp76gMHCb5POk8j3TEiH8M=; b=kMSomXF6MO3wX3k6j5hWnZeSJntdrb1HoIz2pe8TagOSelS2hzYlkOyURa2swvZjCN 8ytbF1Ccf3g1qGywkGL44LWYkas0UtFhvyTLYHUDUvf2gSMIif1eZ1R0fUwoON0cZZTy 7e90ljEMAzTnURR0wB7E5nrT6LH6BwyZ31adKNpaDrV5mrMNIuBnUocJ+khN/u7BdDUM 8iMGYj7mMQVHyTvWKN232Y7GhcK9wNNjq4nHlJwca5Tg5RDzN5gLMB1UoU3Of36kKAF0 /nEbM/Fn1LwToaQvzJJ98jlDkreNa4k62kI+biJme2iGD5kMAqgr8f2bXY3BBlS1IpJV ltsg== X-Gm-Message-State: AOAM531QGuJ1GUUBgDmiPBTTXGlHgNDqUGbjBSZxWNm2kC3ThKzH2I+P C0ASVFzCeLCEUYyOWvPzGXobOA== X-Google-Smtp-Source: ABdhPJxTTHmLgX2FBxja2v32QILtVmEmRq+EQJCtJOkQ8TcW1LZIjWolmzbSDg7hA1u4ZNmSzIyxrw== X-Received: by 2002:a17:90b:4c43:: with SMTP id np3mr36977906pjb.88.1643674266633; Mon, 31 Jan 2022 16:11:06 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:c47e:986d:769b:ead2]) by smtp.gmail.com with ESMTPSA id oj5sm424024pjb.53.2022.01.31.16.11.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 16:11:06 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: Shaik Sajida Bhanu , mka@chromium.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] arm64: dts: qcom: sc7180-trogdor: Add "-regulator" suffix to pp3300_hub Date: Mon, 31 Jan 2022 16:10:38 -0800 Message-Id: <20220131161034.1.I7b284531f1c992932f7eef8abaf7cc5548064f33@changeid> X-Mailer: git-send-email 2.35.0.rc2.247.g8bbb082509-goog In-Reply-To: <20220201001042.3724523-1-dianders@chromium.org> References: <20220201001042.3724523-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org All of the other fixed regulators have the "-regulator" suffix. Add it to pp3300_hub to match. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 7d8bf66e8ffe..78296ed6fd29 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -284,7 +284,7 @@ pp3300_fp_tp: pp3300-fp-tp-regulator { vin-supply = <&pp3300_a>; }; - pp3300_hub: pp3300-hub { + pp3300_hub: pp3300-hub-regulator { compatible = "regulator-fixed"; regulator-name = "pp3300_hub"; From patchwork Tue Feb 1 00:10:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 12731314 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 519FAC43219 for ; Tue, 1 Feb 2022 00:11:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230211AbiBAALI (ORCPT ); Mon, 31 Jan 2022 19:11:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230159AbiBAALI (ORCPT ); Mon, 31 Jan 2022 19:11:08 -0500 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3709CC06173B for ; Mon, 31 Jan 2022 16:11:08 -0800 (PST) Received: by mail-pj1-x102f.google.com with SMTP id qe6-20020a17090b4f8600b001b7aaad65b9so742592pjb.2 for ; Mon, 31 Jan 2022 16:11:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ATL74pFESfBpBVkQXmsV4M2B6h+NphNUg0/LX0n/suU=; b=h3DcTNAWfgElvVoq8kYYU5k4CozfcdTudPNkViRPOW6T/plEnptuS9DhnNp9hD3+26 /ubmJjU5uwzh+WhRIw0vAfFbbI9rnjJzmPMoguc2P6PRjFJHmaCIXtnbzAULIJknQRoh lUk0gnvImCcdWp26S3tOuuCQZ3IEfcBQ7ARkM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ATL74pFESfBpBVkQXmsV4M2B6h+NphNUg0/LX0n/suU=; b=kLxbH1JVr6jL0pSVmjw9SpM0sAvJdRCZTQ3iq1g0fgGNk/mGQgIRjPIKNVRxwyDJCn ZaRTBfEyfO/r0llEAVEvpxV8bhHRCnSNEQoc86wi9Qk5yUDWVAp3CMHLo2grertoWkAo 7Acds5trOsxoG9rHDmsW4iNJIsV3BVh6WCuCPS/01k+ysyj1PmYb2I74sRPpp5KxkyIm 6+QlsMEBzQTQcU+HDjMjgvV+U9O4FyY6kSVRxpg9YlwqWtwLJfQkgQ/CKEkQkR3Fn3bL PDkyftS0ugh2L9qUC0rvQ8rWMx/PnjLyaAjXAbMufE31NAJqm2fzf3aZlRBxrB/fJET2 +cQg== X-Gm-Message-State: AOAM5313yQgBBKb3PT6t2NF2hNcmf5PD7atfjMRt2I6VIRM2qSYNbKxf LNvDNYiIdIFjYZZFO9l3TezJDQ== X-Google-Smtp-Source: ABdhPJzhky1qBnKtaQyj3xSaMT0/Zj9SsDM2eX3bv60kHevdwHpSMajshCbIocivJ9mxXf2PiajP/Q== X-Received: by 2002:a17:902:be0e:: with SMTP id r14mr9962675pls.121.1643674267763; Mon, 31 Jan 2022 16:11:07 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:c47e:986d:769b:ead2]) by smtp.gmail.com with ESMTPSA id oj5sm424024pjb.53.2022.01.31.16.11.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 16:11:07 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: Shaik Sajida Bhanu , mka@chromium.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] arm64: dts: qcom: sc7280-herobrine: Consistently add "-regulator" suffix Date: Mon, 31 Jan 2022 16:10:39 -0800 Message-Id: <20220131161034.2.I627e60c5488d54a45fd1482ca19f0f6e45192db2@changeid> X-Mailer: git-send-email 2.35.0.rc2.247.g8bbb082509-goog In-Reply-To: <20220201001042.3724523-1-dianders@chromium.org> References: <20220201001042.3724523-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some of the fixed regulators were missing the "-regulator" suffix. Add it to be consistent within the file and consistent with the fixed regulators in sc7180-trogdor. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- .../boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts index ad4fe288b53c..f159b5a6d7ef 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts @@ -177,7 +177,7 @@ pp3300_tp: pp3300-tp-regulator { vin-supply = <&pp3300_z1>; }; - pp2850_uf_cam: pp2850-uf-cam { + pp2850_uf_cam: pp2850-uf-cam-regulator { compatible = "regulator-fixed"; regulator-name = "pp2850_uf_cam"; @@ -192,7 +192,7 @@ pp2850_uf_cam: pp2850-uf-cam { vin-supply = <&pp3300_cam>; }; - pp2850_vcm_wf_cam: pp2850-vcm-wf-cam { + pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator { compatible = "regulator-fixed"; regulator-name = "pp2850_vcm_wf_cam"; @@ -207,7 +207,7 @@ pp2850_vcm_wf_cam: pp2850-vcm-wf-cam { vin-supply = <&pp3300_cam>; }; - pp2850_wf_cam: pp2850-wf-cam { + pp2850_wf_cam: pp2850-wf-cam-regulator { compatible = "regulator-fixed"; regulator-name = "pp2850_wf_cam"; @@ -251,7 +251,7 @@ pp1800_fp: pp1800-fp-regulator { status = "disabled"; }; - pp1800_uf_cam: pp1800-uf-cam { + pp1800_uf_cam: pp1800-uf-cam-regulator { compatible = "regulator-fixed"; regulator-name = "pp1800_uf_cam"; @@ -271,7 +271,7 @@ pp1800_uf_cam: pp1800-uf-cam { vin-supply = <&pp1800_l19b>; }; - pp1800_wf_cam: pp1800-wf-cam { + pp1800_wf_cam: pp1800-wf-cam-regulator { compatible = "regulator-fixed"; regulator-name = "pp1800_wf_cam"; @@ -291,7 +291,7 @@ pp1800_wf_cam: pp1800-wf-cam { vin-supply = <&pp1800_l19b>; }; - pp1200_wf_cam: pp1200-wf-cam { + pp1200_wf_cam: pp1200-wf-cam-regulator { compatible = "regulator-fixed"; regulator-name = "pp1200_wf_cam"; From patchwork Tue Feb 1 00:10:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 12731315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2749C433F5 for ; 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Mon, 31 Jan 2022 16:11:08 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: Shaik Sajida Bhanu , mka@chromium.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] arm64: dts: qcom: sc7280: Properly sort sdc pinctrl lines Date: Mon, 31 Jan 2022 16:10:40 -0800 Message-Id: <20220131161034.3.I6ae594129a8ad3d18af9f5ebffd895b4f6353a0a@changeid> X-Mailer: git-send-email 2.35.0.rc2.247.g8bbb082509-goog In-Reply-To: <20220201001042.3724523-1-dianders@chromium.org> References: <20220201001042.3724523-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The sdc1 / sdc2 pinctrl lines were randomly stuffed in the middle of the qup pinctrl lines. Sort them properly. This is a no-op change. Just code movement. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 154 +++++++++++++-------------- 1 file changed, 77 insertions(+), 77 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index d4009cc0bb78..40cb414bc377 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3783,83 +3783,6 @@ qup_uart7_rx: qup-uart7-rx { function = "qup07"; }; - sdc1_on: sdc1-on { - clk { - pins = "sdc1_clk"; - }; - - cmd { - pins = "sdc1_cmd"; - }; - - data { - pins = "sdc1_data"; - }; - - rclk { - pins = "sdc1_rclk"; - }; - }; - - sdc1_off: sdc1-off { - clk { - pins = "sdc1_clk"; - drive-strength = <2>; - bias-bus-hold; - }; - - cmd { - pins = "sdc1_cmd"; - drive-strength = <2>; - bias-bus-hold; - }; - - data { - pins = "sdc1_data"; - drive-strength = <2>; - bias-bus-hold; - }; - - rclk { - pins = "sdc1_rclk"; - bias-bus-hold; - }; - }; - - sdc2_on: sdc2-on { - clk { - pins = "sdc2_clk"; - }; - - cmd { - pins = "sdc2_cmd"; - }; - - data { - pins = "sdc2_data"; - }; - }; - - sdc2_off: sdc2-off { - clk { - pins = "sdc2_clk"; - drive-strength = <2>; - bias-bus-hold; - }; - - cmd { - pins ="sdc2_cmd"; - drive-strength = <2>; - bias-bus-hold; - }; - - data { - pins ="sdc2_data"; - drive-strength = <2>; - bias-bus-hold; - }; - }; - qup_uart8_cts: qup-uart8-cts { pins = "gpio32"; function = "qup10"; @@ -4019,6 +3942,83 @@ qup_uart15_rx: qup-uart15-rx { pins = "gpio63"; function = "qup17"; }; + + sdc1_on: sdc1-on { + clk { + pins = "sdc1_clk"; + }; + + cmd { + pins = "sdc1_cmd"; + }; + + data { + pins = "sdc1_data"; + }; + + rclk { + pins = "sdc1_rclk"; + }; + }; + + sdc1_off: sdc1-off { + clk { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-bus-hold; + }; + + cmd { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-bus-hold; + }; + + data { + pins = "sdc1_data"; + drive-strength = <2>; + bias-bus-hold; + }; + + rclk { + pins = "sdc1_rclk"; + bias-bus-hold; + }; + }; + + sdc2_on: sdc2-on { + clk { + pins = "sdc2_clk"; + }; + + cmd { + pins = "sdc2_cmd"; + }; + + data { + pins = "sdc2_data"; + }; + }; + + sdc2_off: sdc2-off { + clk { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-bus-hold; + }; + + cmd { + pins ="sdc2_cmd"; + drive-strength = <2>; + bias-bus-hold; + }; + + data { + pins ="sdc2_data"; + drive-strength = <2>; + bias-bus-hold; + }; + }; }; imem@146a5000 { From patchwork Tue Feb 1 00:10:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 12731316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0166EC433FE for ; Tue, 1 Feb 2022 00:11:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230250AbiBAALL (ORCPT ); Mon, 31 Jan 2022 19:11:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230225AbiBAALK (ORCPT ); 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There's no reason to "group" the sdc pins into one overarching node and there's a downside: we have to replicate the hierarchy in the board device tree files. Let's clean this up. 2. There's really not a lot of reason not to list the "pinctrl" for sdc1 (eMMC) in the SoC dtsi file. These aren't GPIO pins and everyone's going to specify the same pins. 3. Even though it's likely that boards will need to override pinctrl for sdc2 (SD card) to add the card detect GPIO, we can be symmetric and add it to the SoC dsti file. 4. Let's get rid of the word "on" from the normal config and add a "sleep" suffix to the sleep config. This looks cleaner to me. This is intended to be a no-op change but it could plausibly change behavior depending on how the pinctrl code parses things. One thing to note is that "SD card detect" is explicitly listed now as keeping its pull enabled in sleep since we still want to detect card insertions even if the controller is suspended (because no card is inserted). The pinctrl framework likely did this anyway, but it's nice to see it explicit. Signed-off-by: Douglas Anderson --- .../qcom/sc7280-herobrine-herobrine-r0.dts | 73 +++++------ arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 91 +++++++------- arch/arm64/boot/dts/qcom/sc7280.dtsi | 119 +++++++++--------- 3 files changed, 135 insertions(+), 148 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts index f159b5a6d7ef..918352c097bc 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts @@ -676,9 +676,6 @@ &qupv3_id_1 { &sdhc_1 { status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_on>; - pinctrl-1 = <&sdc1_off>; vmmc-supply = <&pp2950_l7b>; vqmmc-supply = <&pp1800_l19b>; }; @@ -686,9 +683,8 @@ &sdhc_1 { &sdhc_2 { status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_on>; - pinctrl-1 = <&sdc2_off>; + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; vmmc-supply = <&pp2950_l9c>; vqmmc-supply = <&ppvar_l6c>; @@ -883,47 +879,38 @@ &qup_uart7_rx { bias-pull-up; }; -&sdc1_on { - clk { - bias-disable; - drive-strength = <16>; - }; - - cmd { - bias-pull-up; - drive-strength = <10>; - }; +&sdc1_clk { + bias-disable; + drive-strength = <16>; +}; - data { - bias-pull-up; - drive-strength = <10>; - }; +&sdc1_cmd { + bias-pull-up; + drive-strength = <10>; +}; - rclk { - bias-pull-down; - }; +&sdc1_data { + bias-pull-up; + drive-strength = <10>; }; -&sdc2_on { - clk { - bias-disable; - drive-strength = <16>; - }; +&sdc1_rclk { + bias-pull-down; +}; - cmd { - bias-pull-up; - drive-strength = <10>; - }; +&sdc2_clk { + bias-disable; + drive-strength = <16>; +}; - data { - bias-pull-up; - drive-strength = <10>; - }; +&sdc2_cmd { + bias-pull-up; + drive-strength = <10>; +}; - sd-cd { - pins = "gpio91"; - bias-pull-up; - }; +&sdc2_data { + bias-pull-up; + drive-strength = <10>; }; /* PINCTRL - board-specific pinctrl */ @@ -1311,6 +1298,12 @@ qup_uart7_sleep_tx: qup-uart7-sleep-tx { bias-pull-up; }; + sd_cd: sd-cd { + pins = "gpio91"; + function = "gpio"; + bias-pull-up; + }; + tp_int_odl: tp-int-odl { pins = "gpio102"; function = "gpio"; diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 78da9ac983db..7a987bc9b758 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -278,10 +278,6 @@ &qupv3_id_1 { &sdhc_1 { status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc1_on>; - pinctrl-1 = <&sdc1_off>; - non-removable; no-sd; no-sdio; @@ -293,9 +289,8 @@ &sdhc_1 { &sdhc_2 { status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&sdc2_on>; - pinctrl-1 = <&sdc2_off>; + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; vmmc-supply = <&vreg_l9c_2p9>; vqmmc-supply = <&vreg_l6c_2p9>; @@ -424,6 +419,40 @@ &qup_uart7_rx { bias-pull-up; }; +&sdc1_clk { + bias-disable; + drive-strength = <16>; +}; + +&sdc1_cmd { + bias-pull-up; + drive-strength = <10>; +}; + +&sdc1_data { + bias-pull-up; + drive-strength = <10>; +}; + +&sdc1_rclk { + bias-pull-down; +}; + +&sdc2_clk { + bias-disable; + drive-strength = <16>; +}; + +&sdc2_cmd { + bias-pull-up; + drive-strength = <10>; +}; + +&sdc2_data { + bias-pull-up; + drive-strength = <10>; +}; + &tlmm { bt_en: bt-en { pins = "gpio85"; @@ -496,53 +525,17 @@ qup_uart7_sleep_rx: qup-uart7-sleep-rx { bias-pull-up; }; - sw_ctrl: sw-ctrl { - pins = "gpio86"; + sd_cd: sd-cd { + pins = "gpio91"; function = "gpio"; - input-enable; - bias-pull-down; - }; -}; - -&sdc1_on { - clk { - bias-disable; - drive-strength = <16>; - }; - - cmd { bias-pull-up; - drive-strength = <10>; }; - data { - bias-pull-up; - drive-strength = <10>; - }; - - rclk { + sw_ctrl: sw-ctrl { + pins = "gpio86"; + function = "gpio"; + input-enable; bias-pull-down; }; }; -&sdc2_on { - clk { - bias-disable; - drive-strength = <16>; - }; - - cmd { - bias-pull-up; - drive-strength = <10>; - }; - - data { - bias-pull-up; - drive-strength = <10>; - }; - - sd-cd { - pins = "gpio91"; - bias-pull-up; - }; -}; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 40cb414bc377..dc98a87e2871 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -616,6 +616,9 @@ qfprom: efuse@784000 { sdhc_1: sdhci@7c4000 { compatible = "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_clk>, <&sdc1_cmd>, <&sdc1_data>, <&sdc1_rclk>; + pinctrl-1 = <&sdc1_clk_sleep>, <&sdc1_cmd_sleep>, <&sdc1_data_sleep>, <&sdc1_rclk_sleep>; status = "disabled"; reg = <0 0x007c4000 0 0x1000>, @@ -2425,6 +2428,9 @@ apss_merge_funnel_in: endpoint { sdhc_2: sdhci@8804000 { compatible = "qcom,sc7280-sdhci", "qcom,sdhci-msm-v5"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>; + pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>; status = "disabled"; reg = <0 0x08804000 0 0x1000>; @@ -3943,81 +3949,76 @@ qup_uart15_rx: qup-uart15-rx { function = "qup17"; }; - sdc1_on: sdc1-on { - clk { - pins = "sdc1_clk"; - }; - cmd { - pins = "sdc1_cmd"; - }; - data { - pins = "sdc1_data"; - }; + sdc1_clk: sdc1-clk { + pins = "sdc1_clk"; + }; - rclk { - pins = "sdc1_rclk"; - }; + sdc1_cmd: sdc1-cmd { + pins = "sdc1_cmd"; }; - sdc1_off: sdc1-off { - clk { - pins = "sdc1_clk"; - drive-strength = <2>; - bias-bus-hold; - }; + sdc1_data: sdc1-data { + pins = "sdc1_data"; + }; - cmd { - pins = "sdc1_cmd"; - drive-strength = <2>; - bias-bus-hold; - }; + sdc1_rclk: sdc1-rclk { + pins = "sdc1_rclk"; + }; - data { - pins = "sdc1_data"; - drive-strength = <2>; - bias-bus-hold; - }; + sdc1_clk_sleep: sdc1-clk-sleep { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-bus-hold; + }; - rclk { - pins = "sdc1_rclk"; - bias-bus-hold; - }; + sdc1_cmd_sleep: sdc1-cmd-sleep { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-bus-hold; }; - sdc2_on: sdc2-on { - clk { - pins = "sdc2_clk"; - }; + sdc1_data_sleep: sdc1-data-sleep { + pins = "sdc1_data"; + drive-strength = <2>; + bias-bus-hold; + }; - cmd { - pins = "sdc2_cmd"; - }; + sdc1_rclk_sleep: sdc1-rclk-sleep { + pins = "sdc1_rclk"; + drive-strength = <2>; + bias-bus-hold; + }; - data { - pins = "sdc2_data"; - }; + sdc2_clk: sdc2-clk { + pins = "sdc2_clk"; }; - sdc2_off: sdc2-off { - clk { - pins = "sdc2_clk"; - drive-strength = <2>; - bias-bus-hold; - }; + sdc2_cmd: sdc2-cmd { + pins = "sdc2_cmd"; + }; - cmd { - pins ="sdc2_cmd"; - drive-strength = <2>; - bias-bus-hold; - }; + sdc2_data: sdc2-data { + pins = "sdc2_data"; + }; - data { - pins ="sdc2_data"; - drive-strength = <2>; - bias-bus-hold; - }; + sdc2_clk_sleep: sdc2-clk-sleep { + pins = "sdc2_clk"; + drive-strength = <2>; + bias-bus-hold; + }; + + sdc2_cmd_sleep: sdc2-cmd-sleep { + pins = "sdc2_cmd"; + drive-strength = <2>; + bias-bus-hold; + }; + + sdc2_data_sleep: sdc2-data-sleep { + pins = "sdc2_data"; + drive-strength = <2>; + bias-bus-hold; }; }; From patchwork Tue Feb 1 00:10:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 12731317 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C89E3C433EF for ; Tue, 1 Feb 2022 00:11:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230352AbiBAALS (ORCPT ); Mon, 31 Jan 2022 19:11:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230252AbiBAALL (ORCPT ); Mon, 31 Jan 2022 19:11:11 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9CE59C06173E for ; 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Mon, 31 Jan 2022 16:11:11 -0800 (PST) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:c47e:986d:769b:ead2]) by smtp.gmail.com with ESMTPSA id oj5sm424024pjb.53.2022.01.31.16.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 16:11:10 -0800 (PST) From: Douglas Anderson To: Bjorn Andersson Cc: Shaik Sajida Bhanu , mka@chromium.org, swboyd@chromium.org, Douglas Anderson , Andy Gross , Rob Herring , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] arm64: dts: qcom: sc7280-idp: No need for "input-enable" on sw_ctrl Date: Mon, 31 Jan 2022 16:10:42 -0800 Message-Id: <20220131161034.5.Ibaf8a803802beb089cc6266b37e6156cff3ddaec@changeid> X-Mailer: git-send-email 2.35.0.rc2.247.g8bbb082509-goog In-Reply-To: <20220201001042.3724523-1-dianders@chromium.org> References: <20220201001042.3724523-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Specifying "input-enable" on a MSM GPIO is a no-op for the most part. The only thing it really does is to explicitly force the output of a GPIO to be disabled right at the point of a pinctrl transition. We don't need to do this and we don't typically specify "input-enable" unless there's a good reason to. Remove it. Signed-off-by: Douglas Anderson Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 7a987bc9b758..23e656e51904 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -534,7 +534,6 @@ sd_cd: sd-cd { sw_ctrl: sw-ctrl { pins = "gpio86"; function = "gpio"; - input-enable; bias-pull-down; }; };