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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id bo19sm17954484edb.56.2022.02.01.03.48.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 03:48:26 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 1/6] arm64: dts: exynos: use generic node name for LPDDR3 timings Date: Tue, 1 Feb 2022 12:47:44 +0100 Message-Id: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_034841_536259_FCFB92F1 X-CRM114-Status: GOOD ( 14.99 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The node names should have generic name, so use "timings" for LPDDR3 timings. This will also be required by dtschema. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 24c428b84192..2f65dcf6ba73 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -358,7 +358,7 @@ samsung_K3QF2F20DB: lpddr3 { tCKESR-min-tck = <2>; tMRD-min-tck = <5>; - timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { + timings_samsung_K3QF2F20DB_800mhz: timings@800000000 { compatible = "jedec,lpddr3-timings"; /* workaround: 'reg' shows max-freq */ reg = <800000000>; From patchwork Tue Feb 1 11:47:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12731604 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5E8CC433EF for ; Tue, 1 Feb 2022 11:50:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xoKHoH846lKJt5lYzR/D8KOn/aiwsIvrMdKX9XP0xRY=; b=THqrzW1kumjoJk gHqJuQb0+V1yfA40zVmx9OXjnfqO6zKR+ENVJQWxSkgmHhoYpeth6FzE2AlyCcz/vMZIi6b8wRAek b7Uje/dDUSgzuv9UpXqTHCtF0zdDKeucnyJLJsIymtt+aKxOon0pQsjnN5UqnddzDQ/HkOXnKJpem oxzbrZWtM2lndpdgepuqmB0DIkAwSyyEuTAqlUyqfECv5FtJdMY4JVtm8TvylWfRVnL3bTW9jeO0q zWwosV4TeJ76d4Lw18Ym3/2rOjR7WVHP5en5VH/lhjI9c0uMC/eqMSPkokwpty4sq81s+fYIfVQns ChHcIFhabSe7lrk8aEQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEreX-00BtFM-4b; Tue, 01 Feb 2022 11:48:53 +0000 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEreI-00Bt7Q-LH for linux-arm-kernel@lists.infradead.org; Tue, 01 Feb 2022 11:48:41 +0000 Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 2027D3F202 for ; Tue, 1 Feb 2022 11:48:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1643716110; bh=wQ7LXiPof6IMw8aL2q+JYN7M9eGDaZpG8RUm/afPGLI=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=J+L0VGLIhk5BL+aucLZMEwUFDLr8wP+eVY8+I211gBIn0dHFDMCD33QV74EUdI0mI HXL/Xj3EyoBqFrq9XZrH0LAmldo4w48I6BneDZddGt2xFR9bMq8Z/7IWQJYebFU+a0 pYfeGdDBs6pIHbIPzSW3bbYdtdZ4v3EbfDweMayPJU9cSelQ0jY0eOaHxBqicj4kvK d736YIVOfRjbnOifdS2xF1gbgGOcLHGbUJKzzk6MssQf9Nbd4sZDLPxvodmY6tkaxQ B9hLnDvurgwGwdd6C6J0IdLXAbwDmMa79V+YdT8gZcZnfCaRdBtitFZXaUo9NHySpo lxo5J2MLjXeWQ== Received: by mail-ej1-f72.google.com with SMTP id mp5-20020a1709071b0500b0069f2ba47b20so6356724ejc.19 for ; Tue, 01 Feb 2022 03:48:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wQ7LXiPof6IMw8aL2q+JYN7M9eGDaZpG8RUm/afPGLI=; b=vbVmVRHURfyyesWWcOjuX94JarVx3ObKMvK2Dw5nPvJXwYPZJaJd35So/X20Cq4N4q ZtFT9rH+cVDRcRRVA7tOiat83ZTOz2+A4qy+1BREXBHOpfL8tLolZBX69odR3C4kBC8x Ar4eZQdywSmn+9Xml4SNfcKdDmTXQrBVZCoA8da31tVD0qraPhpAU5K0ogUeoDm23Dwf RxFGt9LVc3iSDmiCTjocnDoe4EygAVI1gHZKKVDWFS1D7bx5NLP/gUAl6ufQhnpjZOWv fqGRy3Xy7uoNojMFrZrSyZmYzapzFFWxKgFkcxnorfsWxmx1nDmwLw1H7p6mCZNcuCwB X5BA== X-Gm-Message-State: AOAM530LCRVg8H/CkGNDwd1JtkljjXMfWO2QbGvcype+CFsOgqfO/WgR XuFtpEb6v/4E5v4Ff0SH7TxHH1u3/uVNKdPKDbgxlKOHXJOrqdPV2kCIpD8DrCBurKWmn03fThZ yjCZeUxIGMSM1ccd6AjIVQ//VYBSJpajxFAKpUheM48Ceczb3FmGR X-Received: by 2002:aa7:d1d4:: with SMTP id g20mr24934229edp.296.1643716108476; Tue, 01 Feb 2022 03:48:28 -0800 (PST) X-Google-Smtp-Source: ABdhPJz3KvejSRP8XZF4mm33Vo+og/yd0Iu/L/N3KWBXvK3ZpTdVbOdRwR97tU2Yb/X7gw3TbKUbHw== X-Received: by 2002:aa7:d1d4:: with SMTP id g20mr24934210edp.296.1643716108233; Tue, 01 Feb 2022 03:48:28 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id bo19sm17954484edb.56.2022.02.01.03.48.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 03:48:27 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 2/6] dt-bindings: memory: lpddr3: convert to dtschema Date: Tue, 1 Feb 2022 12:47:45 +0100 Message-Id: <20220201114749.88500-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> References: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_034838_999846_3C86D54B X-CRM114-Status: GOOD ( 23.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert the LPDDR3 memory bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski --- .../memory-controllers/ddr/jedec,lpddr3.yaml | 266 ++++++++++++++++++ .../memory-controllers/ddr/lpddr3.txt | 107 ------- 2 files changed, 266 insertions(+), 107 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml new file mode 100644 index 000000000000..c8577186324a --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -0,0 +1,266 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR3 SDRAM compliant to JEDEC JESD209-3 + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + items: + - enum: + - samsung,K3QF2F20DB + - const: jedec,lpddr3 + + '#address-cells': + const: 1 + + density: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Density in megabits of SDRAM chip. + enum: + - 4096 + - 8192 + - 16384 + - 32768 + + io-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + IO bus width in bits of SDRAM chip. + enum: + - 64 + - 32 + - 16 + - 8 + + manufacturer-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Manufacturer ID value read from Mode Register 5. + + revision-id: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + items: + maximum: 255 + description: | + Revision value of SDRAM chip read from Mode Registers 6 and 7. + + '#size-cells': + const: 0 + + tCKE-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + CKE minimum pulse width (HIGH and LOW pulse width) in terms of number + of clock cycles. + + tCKESR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + CKE minimum pulse width during SELF REFRESH (low pulse width during + SELF REFRESH) in terms of number of clock cycles. + + tDQSCK-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + DQS output data access time from CK_t/CK_c in terms of number of clock + cycles. + + tFAW-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 63 + description: | + Four-bank activate window in terms of number of clock cycles. + + tMRD-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Mode register set command delay in terms of number of clock cycles. + + tR2R-C2C-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Additional READ-to-READ delay in chip-to-chip cases in terms of number + of clock cycles. + + tRAS-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 63 + description: | + Row active time in terms of number of clock cycles. + + tRC-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 63 + description: | + ACTIVATE-to-ACTIVATE command period in terms of number of clock cycles. + + tRCD-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + RAS-to-CAS delay in terms of number of clock cycles. + + tRFC-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 255 + description: | + Refresh Cycle time in terms of number of clock cycles. + + tRL-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + READ data latency in terms of number of clock cycles. + + tRPab-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Row precharge time (all banks) in terms of number of clock cycles. + + tRPpb-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Row precharge time (single banks) in terms of number of clock cycles. + + tRRD-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Active bank A to active bank B in terms of number of clock cycles. + + tRTP-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Internal READ to PRECHARGE command delay in terms of number of clock + cycles. + + tW2W-C2C-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Additional WRITE-to-WRITE delay in chip-to-chip cases in terms of number + of clock cycles. + + tWL-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + WRITE data latency in terms of number of clock cycles. + + tWR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + WRITE recovery time in terms of number of clock cycles. + + tWTR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + description: | + Internal WRITE-to-READ command delay in terms of number of clock cycles. + + tXP-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 255 + description: | + Exit power-down to next valid command delay in terms of number of clock + cycles. + + tXSR-min-tck: + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 1023 + description: | + SELF REFRESH exit to next valid command delay in terms of number of clock + cycles. + +patternProperties: + "^timings@[0-9a-f]+$": + type: object + description: | + The lpddr3 node may have one or more child nodes with timings. + Each timing node provides AC timing parameters of the device for a given + speed-bin. The user may provide the timings for as many speed-bins as is + required. For more information please see:: + Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt + +required: + - compatible + - '#address-cells' + - density + - io-width + - '#size-cells' + +additionalProperties: false + +examples: + - | + lpddr3 { + compatible = "samsung,K3QF2F20DB", "jedec,lpddr3"; + density = <16384>; + io-width = <32>; + #address-cells = <1>; + #size-cells = <0>; + + tCKE-min-tck = <2>; + tCKESR-min-tck = <2>; + tDQSCK-min-tck = <5>; + tFAW-min-tck = <5>; + tMRD-min-tck = <5>; + tR2R-C2C-min-tck = <0>; + tRAS-min-tck = <5>; + tRC-min-tck = <6>; + tRCD-min-tck = <3>; + tRFC-min-tck = <17>; + tRL-min-tck = <14>; + tRPab-min-tck = <2>; + tRPpb-min-tck = <2>; + tRRD-min-tck = <2>; + tRTP-min-tck = <2>; + tW2W-C2C-min-tck = <0>; + tWL-min-tck = <8>; + tWR-min-tck = <7>; + tWTR-min-tck = <2>; + tXP-min-tck = <2>; + tXSR-min-tck = <12>; + + timings@800000000 { + compatible = "jedec,lpddr3-timings"; + reg = <800000000>; + min-freq = <100000000>; + tCKE = <3750>; + tCKESR = <3750>; + tFAW = <25000>; + tMRD = <7000>; + tR2R-C2C = <0>; + tRAS = <23000>; + tRC = <33750>; + tRCD = <10000>; + tRFC = <65000>; + tRPab = <12000>; + tRPpb = <12000>; + tRRD = <6000>; + tRTP = <3750>; + tW2W-C2C = <0>; + tWR = <7500>; + tWTR = <3750>; + tXP = <3750>; + tXSR = <70000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3.txt b/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3.txt deleted file mode 100644 index 031af5fb0379..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3.txt +++ /dev/null @@ -1,107 +0,0 @@ -* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C - -Required properties: -- compatible : Should be ",", and generic value "jedec,lpddr3". - Example "," values: - "samsung,K3QF2F20DB" - -- density : representing density in Mb (Mega bits) -- io-width : representing bus width. Possible values are 8, 16, 32, 64 -- #address-cells: Must be set to 1 -- #size-cells: Must be set to 0 - -Optional properties: - -- manufacturer-id : Manufacturer ID value read from Mode Register 5 -- revision-id : Revision IDs read from Mode Registers 6 and 7 - -The following optional properties represent the minimum value of some AC -timing parameters of the DDR device in terms of number of clock cycles. -These values shall be obtained from the device data-sheet. -- tRFC-min-tck -- tRRD-min-tck -- tRPab-min-tck -- tRPpb-min-tck -- tRCD-min-tck -- tRC-min-tck -- tRAS-min-tck -- tWTR-min-tck -- tWR-min-tck -- tRTP-min-tck -- tW2W-C2C-min-tck -- tR2R-C2C-min-tck -- tWL-min-tck -- tDQSCK-min-tck -- tRL-min-tck -- tFAW-min-tck -- tXSR-min-tck -- tXP-min-tck -- tCKE-min-tck -- tCKESR-min-tck -- tMRD-min-tck - -Child nodes: -- The lpddr3 node may have one or more child nodes of type "lpddr3-timings". - "lpddr3-timings" provides AC timing parameters of the device for - a given speed-bin. Please see - Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt - for more information on "lpddr3-timings" - -Example: - -samsung_K3QF2F20DB: lpddr3 { - compatible = "samsung,K3QF2F20DB", "jedec,lpddr3"; - density = <16384>; - io-width = <32>; - manufacturer-id = <1>; - revision-id = <123 234>; - #address-cells = <1>; - #size-cells = <0>; - - tRFC-min-tck = <17>; - tRRD-min-tck = <2>; - tRPab-min-tck = <2>; - tRPpb-min-tck = <2>; - tRCD-min-tck = <3>; - tRC-min-tck = <6>; - tRAS-min-tck = <5>; - tWTR-min-tck = <2>; - tWR-min-tck = <7>; - tRTP-min-tck = <2>; - tW2W-C2C-min-tck = <0>; - tR2R-C2C-min-tck = <0>; - tWL-min-tck = <8>; - tDQSCK-min-tck = <5>; - tRL-min-tck = <14>; - tFAW-min-tck = <5>; - tXSR-min-tck = <12>; - tXP-min-tck = <2>; - tCKE-min-tck = <2>; - tCKESR-min-tck = <2>; - tMRD-min-tck = <5>; - - timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { - compatible = "jedec,lpddr3-timings"; - /* workaround: 'reg' shows max-freq */ - reg = <800000000>; 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id bo19sm17954484edb.56.2022.02.01.03.48.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 03:48:28 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 3/6] dt-bindings: memory: lpddr3: adjust IO width to spec Date: Tue, 1 Feb 2022 12:47:46 +0100 Message-Id: <20220201114749.88500-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> References: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_034841_558977_400ECD27 X-CRM114-Status: GOOD ( 12.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to JEDEC Standard No. 209-3 (table 3.4.1 "Mode Register Assignment and Definition in LPDDR3 SDRAM"), the LPDDR3 supports only 16- and 32-bit IO width. Drop the unsupported others. Signed-off-by: Krzysztof Kozlowski --- .../bindings/memory-controllers/ddr/jedec,lpddr3.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml index c8577186324a..0c8353c11767 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -34,10 +34,8 @@ properties: description: | IO bus width in bits of SDRAM chip. enum: - - 64 - 32 - 16 - - 8 manufacturer-id: $ref: /schemas/types.yaml#/definitions/uint32 From patchwork Tue Feb 1 11:47:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12731607 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E73C3C433EF for ; Tue, 1 Feb 2022 11:50:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D0fPpkMiJ3t4NWQySvV3ohPry1WPEDKcgafm9tf1NWc=; b=yYbHeKaw4B3fsH MC0YQDc/OaThn4BHyabUgwTiJ7jwnO9yXC0mKuHwwIhlX5UVuGAmP/ZQ4+V3tOgEZzhOboHdhtHQg Ev/hEQwPUaO+ZknH2gSrbk3fz41c6k/MFO946bqEkoJ8T4ZPQetY4XYHSLDNSbUn5IIj6c5o204rs LNdiXAGptw/vOFpqAlkTmFPxkcJI6DDFrWctio7ZQjyUWwHfMI6zLdmpqNLVulGgb7oq6ZVpB9bsa scjcaY4OgTqSk/mey8wsz0oxvNC+lgWuWJENr23qTnITrbqrxu7AytBB5uMneKEf9+Aa3HdPPPFMn 9+e9hFL8a6JbwCdhQmHw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nErf4-00BtQg-1k; Tue, 01 Feb 2022 11:49:26 +0000 Received: from smtp-relay-internal-0.canonical.com ([185.125.188.122]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEreL-00Bt7S-9u for linux-arm-kernel@lists.infradead.org; Tue, 01 Feb 2022 11:48:44 +0000 Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id B718C3FFDB for ; Tue, 1 Feb 2022 11:48:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1643716112; bh=OuVWT+OxqE323DEVUlu5DyHs7hHuGTLMdHDm6pwqNSI=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Wl2oYiRgeog3T2F1Kjuz50YECsdYhtTfwZcltLKoNal2GVENrtAvxE35/zwA4rDXN R1Q8+lx4dHXs69QDZcIAAn0dUMkYFnIwTQzALTC+IlXoDQW4KsadIH17GSBxZEoSsf DVSwMU1qguUvFy4IGwgGZ/tlKRFQuMFO6Cervx6sS8oWVnHPiih/9fnakTJv671HwX 1e3eUnVB/SfL4M/TCsBOOsOpyitUcIC9UTU9vsSxpmhULHGu32CXetFe6JgvfoPQA6 gwykFbc9efQqzpGhXAE78NqIooN+l1r8UpSdR/P1u38wPcc4CUaeojuF2vdxUoKeN2 w64CtlBpqk0aA== Received: by mail-ed1-f72.google.com with SMTP id k10-20020a50cb8a000000b00403c8326f2aso8575800edi.6 for ; Tue, 01 Feb 2022 03:48:32 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OuVWT+OxqE323DEVUlu5DyHs7hHuGTLMdHDm6pwqNSI=; b=6m16AWdkJFsOyBH22JDd6uv63XwiePiUvFJ1ZlBvh57/ppuTHKh2wp79OE0rEFgjom GwhpYgRKfylnAJkm1i1h7dPZw9ymFF9bnfWBTL6yOoppwiSFYxdpOO3IIXwJmtCnCw8w NFWlXI1apJxn2t8r81pks7udrcZ1Tjn6raMyx9WDVVlr1S5S95OwMlEBqW3qewhWXao0 fp4XtsM9XVvJr/FnIoD8dgKoYhThORiSSxAYTl335qS1NCF7Ybe4IcR1zqs6DDlRqilQ M9GHUL0xxgUeWxWgjErPFXIUPHKH5rQijR1BdSEQZIGK/zWdjaTLErMqbxoLOVGBPTpo o1nQ== X-Gm-Message-State: AOAM5318nPK/A9qqMJHZe0LoROP5IwEOFsQGNfig/x0P6C1iGIJg6QG1 9YYqU1K/H9iv5EybIq/FYvUEJ4JwMhwA/mxqUNYXTHdnHwr3RIOHKYl5vp/V9cB49KvOQrMr2e3 tJg+GHU0ajIEESatyje8Bu2rsGv+wJmYPzvBkjKu+U8AQnoQz0biX X-Received: by 2002:a17:907:d9f:: with SMTP id go31mr21604844ejc.282.1643716111073; Tue, 01 Feb 2022 03:48:31 -0800 (PST) X-Google-Smtp-Source: ABdhPJz4hxffkdEDnSRNHd8A4Uy3TqYuAKbZF4KOrK7b4i45cPu6GWoai3jbLk/RRWS+LN17FX6K9Q== X-Received: by 2002:a17:907:d9f:: with SMTP id go31mr21604841ejc.282.1643716110925; Tue, 01 Feb 2022 03:48:30 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id bo19sm17954484edb.56.2022.02.01.03.48.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 03:48:30 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 4/6] dt-bindings: memory: lpddr3: deprecated manufacturer ID Date: Tue, 1 Feb 2022 12:47:47 +0100 Message-Id: <20220201114749.88500-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> References: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_034841_543092_5EEED9C4 X-CRM114-Status: GOOD ( 14.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The memory manufacturer should be described in vendor part of compatible, so there is no need to duplicate it in separate property. Similarly is done in LPDDR2 bindings. Signed-off-by: Krzysztof Kozlowski --- .../bindings/memory-controllers/ddr/jedec,lpddr3.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml index 0c8353c11767..138c57d8a375 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -40,7 +40,9 @@ properties: manufacturer-id: $ref: /schemas/types.yaml#/definitions/uint32 description: | - Manufacturer ID value read from Mode Register 5. + Manufacturer ID value read from Mode Register 5. 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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id bo19sm17954484edb.56.2022.02.01.03.48.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 03:48:32 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 5/6] dt-bindings: memory: lpddr3-timings: convert to dtschema Date: Tue, 1 Feb 2022 12:47:48 +0100 Message-Id: <20220201114749.88500-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> References: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_034841_567111_AC6F85B3 X-CRM114-Status: GOOD ( 22.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert the LPDDR3 memory timings bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski --- .../ddr/jedec,lpddr3-timings.yaml | 153 ++++++++++++++++++ .../memory-controllers/ddr/jedec,lpddr3.yaml | 5 +- .../memory-controllers/ddr/lpddr3-timings.txt | 58 ------- 3 files changed, 155 insertions(+), 61 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml new file mode 100644 index 000000000000..98bc219e8a25 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR3 SDRAM AC timing parameters for a given speed-bin + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + const: jedec,lpddr3-timings + + reg: + maxItems: 1 + description: | + Maximum DDR clock frequency for the speed-bin, in Hz. + + min-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Minimum DDR clock frequency for the speed-bin, in Hz. + + tCKE: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds. + + tCKESR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CKE minimum pulse width during SELF REFRESH (low pulse width during + SELF REFRESH) in pico seconds. + + tFAW: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Four-bank activate window in pico seconds. + + tMRD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Mode register set command delay in pico seconds. + + tR2R-C2C: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Additional READ-to-READ delay in chip-to-chip cases in pico seconds. + + tRAS: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row active time in pico seconds. + + tRC: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + ACTIVATE-to-ACTIVATE command period in pico seconds. + + tRCD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RAS-to-CAS delay in pico seconds. + + tRFC: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Refresh Cycle time in pico seconds. + + tRPab: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row precharge time (all banks) in pico seconds. + + tRPpb: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row precharge time (single banks) in pico seconds. + + tRRD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Active bank A to active bank B in pico seconds. + + tRTP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal READ to PRECHARGE command delay in pico seconds. + + tW2W-C2C: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Additional WRITE-to-WRITE delay in chip-to-chip cases in pico seconds. + + tWR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + WRITE recovery time in pico seconds. + + tWTR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal WRITE-to-READ command delay in pico seconds. + + tXP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Exit power-down to next valid command delay in pico seconds. + + tXSR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SELF REFRESH exit to next valid command delay in pico seconds. + +required: + - compatible + - min-freq + - reg + +additionalProperties: false + +examples: + - | + lpddr3 { + #address-cells = <1>; + #size-cells = <0>; + + timings@800000000 { + compatible = "jedec,lpddr3-timings"; + reg = <800000000>; + min-freq = <100000000>; + tCKE = <3750>; + tCKESR = <3750>; + tFAW = <25000>; + tMRD = <7000>; + tR2R-C2C = <0>; + tRAS = <23000>; + tRC = <33750>; + tRCD = <10000>; + tRFC = <65000>; + tRPab = <12000>; + tRPpb = <12000>; + tRRD = <6000>; + tRTP = <3750>; + tW2W-C2C = <0>; + tWR = <7500>; + tWTR = <3750>; + tXP = <3750>; + tXSR = <70000>; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml index 138c57d8a375..3bcba15098ea 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml @@ -192,13 +192,12 @@ properties: patternProperties: "^timings@[0-9a-f]+$": - type: object + $ref: jedec,lpddr3-timings.yaml description: | The lpddr3 node may have one or more child nodes with timings. Each timing node provides AC timing parameters of the device for a given speed-bin. The user may provide the timings for as many speed-bins as is - required. For more information please see:: - Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt + required. required: - compatible diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt b/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt deleted file mode 100644 index 84705e50a3fd..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt +++ /dev/null @@ -1,58 +0,0 @@ -* AC timing parameters of LPDDR3 memories for a given speed-bin. - -The structures are based on LPDDR2 and extended where needed. - -Required properties: -- compatible : Should be "jedec,lpddr3-timings" -- min-freq : minimum DDR clock frequency for the speed-bin. Type is -- reg : maximum DDR clock frequency for the speed-bin. Type is - -Optional properties: - -The following properties represent AC timing parameters from the memory -data-sheet of the device for a given speed-bin. All these properties are -of type and the default unit is ps (pico seconds). -- tRFC -- tRRD -- tRPab -- tRPpb -- tRCD -- tRC -- tRAS -- tWTR -- tWR -- tRTP -- tW2W-C2C -- tR2R-C2C -- tFAW -- tXSR -- tXP -- tCKE -- tCKESR -- tMRD - -Example: - -timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { - compatible = "jedec,lpddr3-timings"; - reg = <800000000>; /* workaround: it shows max-freq */ - min-freq = <100000000>; - tRFC = <65000>; - tRRD = <6000>; - tRPab = <12000>; - tRPpb = <12000>; - tRCD = <10000>; - tRC = <33750>; - tRAS = <23000>; - tWTR = <3750>; - tWR = <7500>; - tRTP = <3750>; - tW2W-C2C = <0>; - tR2R-C2C = <0>; - tFAW = <25000>; - tXSR = <70000>; - tXP = <3750>; - tCKE = <3750>; - tCKESR = <3750>; - tMRD = <7000>; -}; From patchwork Tue Feb 1 11:47:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12731609 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA3CBC433F5 for ; Tue, 1 Feb 2022 11:51:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hXQRrRd3QzTbnboL0j3GgvZDI9SEgus+8AFyQBq5CZY=; b=B+KsTpG97XQDdz qRDfrfZSjbSAlllrB74UdBi4DinlTaaWCzuTtaAMgoI/dCKjcSpzCXRiONRj3coObxBnfluFSx5/X T5bjIpSMQgq54kL4DKh5QPQ0SMuH+82U2QTWwm478fqksSLbiJVthgelzZqFhyQcCGpMc1XjFYNpB GIPa52eFV/Wqonx9gNYURPBmaO85GFLlZq4VdbBUVk6l+2oQ+nl8s+GQX9cDOtkTPdOpgpat6Sopi f3AT5aXlQFO+0sAzLucaAQX8J8/YDVgyIsQ2JeQkMYLn6h67+5s/xVM4z8HcegP9Wnpz0fHRM0Anx YTZI97RIu+6mYKe29U2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nErfm-00BtlN-Ax; Tue, 01 Feb 2022 11:50:10 +0000 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nEreM-00Bt8k-Tx for linux-arm-kernel@lists.infradead.org; Tue, 01 Feb 2022 11:48:45 +0000 Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 3900E3F1BE for ; Tue, 1 Feb 2022 11:48:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1643716117; bh=T/Y7vvIm1vNgiOBuzuvlSLr7bPQM9EpmEANjJNIACK4=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ASFEAOPD0MMs3PNyGRQGbXF1AyDOdJRfuU8vK5sSph06rjmGB7vela1mIadUmFQZY PmXIn/BiW6qqXQk0lbmWqO78/l40/2hymCGRuekbIfENrlrmsd/xCS4R7Hw31cF/Hq b2pWh3lb9L+XBbLzIoaDSXL1Fjzh3Poi2VcLH3BGnoAhu4T1p88YJdNtOL2cITkcRy NTypfHnaouMBDquPM4aZ5Gvsvd7Hvnjvcoj203O9mwyRDPgoyDAVNvsgJ4AcG36u8p 9owB6saLHgFEj80zz8umbMNNaNhMmp0KibQOpls+Evzgecnr2mXs5Jab7C6hWx50F9 FMO1HK3NeGVSg== Received: by mail-ed1-f72.google.com with SMTP id h21-20020aa7c955000000b0040390b2bfc5so8535810edt.15 for ; Tue, 01 Feb 2022 03:48:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=T/Y7vvIm1vNgiOBuzuvlSLr7bPQM9EpmEANjJNIACK4=; b=xcETPURPawaYgcVSvu2fRou5jWq2MmSCiMZrLCSEnPkJEWwti/t/fkuXAyHHLTmOqf MsE0+35J4fh4BOei8bdanOGzOfeMfXv6a2gV7JhF6ZcFIssNCX0g65THercgogiMbzqA SbRlECvHUF1cEeKLFGgQ8xUtOTFo5HiIPhoeHQHqvymrANXr1jpY1jRoqz+yl/fJr1DD 3UupE05e6VWs4xEIxLp7ASZ3HpeqU9o/8ux0ODOjRT+CNH9PL0vrLscWzwXr0rFv9N4q s/1uCE4e+xNuueXC0ieTf2FftOPstmi6oH2FUroTlGbkMAy1fSkmOYfMvmEOJEkZsZBD T4qQ== X-Gm-Message-State: AOAM5319OUlY32NJp79XQm9SsGIBs/Ws2XEZHGpLYlI7MCF5xdDNmRUs cYRVCs3bY+eMCMtEfWoLZVxzD72bYpQ6/3cVL6i58tJUJ1je7A6Kvz4V1SiPhGh22ADnozScOnD VDVvYuwzsIHiiYrD8IMZUTTDy5tXiFE4uKVNmAgQD8P1IDdaSHlvb X-Received: by 2002:a17:907:7ea3:: with SMTP id qb35mr20935349ejc.553.1643716114012; Tue, 01 Feb 2022 03:48:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJxBVg7XQAKdtCkCWKY7svrC9N0kglErPiZRvcZ3T1qESNacpBeH/7PKHB+m0oeeHfjiu1i0cQ== X-Received: by 2002:a17:907:7ea3:: with SMTP id qb35mr20935333ejc.553.1643716113773; Tue, 01 Feb 2022 03:48:33 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id bo19sm17954484edb.56.2022.02.01.03.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Feb 2022 03:48:33 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Rob Herring , Alim Akhtar , Dmitry Osipenko , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 6/6] dt-bindings: memory: lpddr2-timings: convert to dtschema Date: Tue, 1 Feb 2022 12:47:49 +0100 Message-Id: <20220201114749.88500-6-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> References: <20220201114749.88500-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220201_034843_196562_17E0812A X-CRM114-Status: GOOD ( 21.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert the LPDDR2 memory timings bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski --- .../ddr/jedec,lpddr2-timings.yaml | 135 ++++++++++++++++++ .../memory-controllers/ddr/jedec,lpddr2.yaml | 6 +- .../memory-controllers/ddr/lpddr2-timings.txt | 52 ------- 3 files changed, 137 insertions(+), 56 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/lpddr2-timings.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml new file mode 100644 index 000000000000..7cc3021decfe --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LPDDR2 SDRAM AC timing parameters for a given speed-bin + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + const: jedec,lpddr2-timings + + max-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Maximum DDR clock frequency for the speed-bin, in Hz. + + min-freq: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Minimum DDR clock frequency for the speed-bin, in Hz. + + tCKESR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CKE minimum pulse width during SELF REFRESH (low pulse width during + SELF REFRESH) in pico seconds. + + tDQSCK-max: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + DQS output data access time from CK_t/CK_c in pico seconds. + + tDQSCK-max-derated: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + DQS output data access time from CK_t/CK_c, temperature de-rated, in pico + seconds. + + tFAW: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Four-bank activate window in pico seconds. + + tRAS-max-ns: + description: | + Row active time in nano seconds. + + tRAS-min: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row active time in pico seconds. + + tRCD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RAS-to-CAS delay in pico seconds. + + tRPab: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Row precharge time (all banks) in pico seconds. + + tRRD: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Active bank A to active bank B in pico seconds. + + tRTP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal READ to PRECHARGE command delay in pico seconds. + + tWR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + WRITE recovery time in pico seconds. + + tWTR: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal WRITE-to-READ command delay in pico seconds. + + tXP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Exit power-down to next valid command delay in pico seconds. + + tZQCL: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SELF REFRESH exit to next valid command delay in pico seconds. + + tZQCS: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SELF REFRESH exit to next valid command delay in pico seconds. + + tZQinit: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SELF REFRESH exit to next valid command delay in pico seconds. + +required: + - compatible + - min-freq + - max-freq + +additionalProperties: false + +examples: + - | + timings { + compatible = "jedec,lpddr2-timings"; + min-freq = <10000000>; + max-freq = <400000000>; + tCKESR = <15000>; + tDQSCK-max = <5500>; + tFAW = <50000>; + tRAS-max-ns = <70000>; + tRAS-min = <42000>; + tRPab = <21000>; + tRCD = <18000>; + tRRD = <10000>; + tRTP = <7500>; + tWR = <15000>; + tWTR = <7500>; + tXP = <7500>; + tZQCL = <360000>; + tZQCS = <90000>; + tZQinit = <1000000>; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml index 25ed0266f6dd..2d8a701e2a05 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml @@ -142,14 +142,12 @@ properties: patternProperties: "^lpddr2-timings": - type: object + $ref: jedec,lpddr2-timings.yaml description: | The lpddr2 node may have one or more child nodes of type "lpddr2-timings". "lpddr2-timings" provides AC timing parameters of the device for a given speed-bin. The user may provide the timings for as many - speed-bins as is required. Please see Documentation/devicetree/ - bindings/memory-controllers/ddr/lpddr2-timings.txt for more information - on "lpddr2-timings". + speed-bins as is required. required: - compatible diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr2-timings.txt b/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr2-timings.txt deleted file mode 100644 index 9ceb19e0c7fd..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ddr/lpddr2-timings.txt +++ /dev/null @@ -1,52 +0,0 @@ -* AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin - -Required properties: -- compatible : Should be "jedec,lpddr2-timings" -- min-freq : minimum DDR clock frequency for the speed-bin. Type is -- max-freq : maximum DDR clock frequency for the speed-bin. Type is - -Optional properties: - -The following properties represent AC timing parameters from the memory -data-sheet of the device for a given speed-bin. All these properties are -of type and the default unit is ps (pico seconds). Parameters with -a different unit have a suffix indicating the unit such as 'tRAS-max-ns' -- tRCD -- tWR -- tRAS-min -- tRRD -- tWTR -- tXP -- tRTP -- tDQSCK-max -- tFAW -- tZQCS -- tZQinit -- tRPab -- tZQCL -- tCKESR -- tRAS-max-ns -- tDQSCK-max-derated - -Example: - -timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 { - compatible = "jedec,lpddr2-timings"; - min-freq = <10000000>; - max-freq = <400000000>; - tRPab = <21000>; - tRCD = <18000>; - tWR = <15000>; - tRAS-min = <42000>; - tRRD = <10000>; - tWTR = <7500>; - tXP = <7500>; - tRTP = <7500>; - tCKESR = <15000>; - tDQSCK-max = <5500>; - tFAW = <50000>; - tZQCS = <90000>; - tZQCL = <360000>; - tZQinit = <1000000>; - tRAS-max-ns = <70000>; -};