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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id rn16sm770753ejb.61.2022.02.04.07.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Feb 2022 07:41:15 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Olof Johansson , Arnd Bergmann , arm@kernel.org, soc@kernel.org Cc: Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Alim Akhtar , Krzysztof Kozlowski , Sylwester Nawrocki Subject: [GIT PULL 1/2] clk: samsung: Tesla FSD for v5.18 Date: Fri, 4 Feb 2022 16:41:11 +0100 Message-Id: <20220204154112.133723-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Hi Arnd and Olof, The driver changes for Tesla FSD clock controller. I got ack for these from Sylwester. Best regards, Krzysztof The following changes since commit e783362eb54cd99b2cac8b3a9aeac942e6f6ac07: Linux 5.17-rc1 (2022-01-23 10:12:53 +0200) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-clk-fsd-5.18 for you to fetch changes up to 0b59bc00a6936e8670b58d4307a2cfba341d40d0: clk: samsung: fix missing Tesla FSD dependency on Exynos (2022-02-01 09:14:53 +0100) ---------------------------------------------------------------- Samsung clock controller changes for v5.18 Add support for Tesla FSD SoC clock controller within Samsung Exynos SoC clock controller drivers. The Tesla FSD's clock controller is similar to Samsung Exynos one, so entire driver structure can be re-used. ---------------------------------------------------------------- Alim Akhtar (9): dt-bindings: clock: Add bindings definitions for FSD CMU blocks dt-bindings: clock: Document FSD CMU bindings clk: samsung: fsd: Add initial clock support clk: samsung: fsd: Add cmu_peric block clock information clk: samsung: fsd: Add cmu_fsys0 clock information clk: samsung: fsd: Add cmu_fsys1 clock information clk: samsung: fsd: Add cmu_imem block clock information clk: samsung: fsd: Add cmu_mfc block clock information clk: samsung: fsd: Add cam_csi block clock information Krzysztof Kozlowski (1): clk: samsung: fix missing Tesla FSD dependency on Exynos .../devicetree/bindings/clock/tesla,fsd-clock.yaml | 198 +++ drivers/clk/samsung/Kconfig | 9 + drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-fsd.c | 1803 ++++++++++++++++++++ drivers/clk/samsung/clk-pll.c | 1 + drivers/clk/samsung/clk-pll.h | 1 + include/dt-bindings/clock/fsd-clk.h | 150 ++ 7 files changed, 2163 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml create mode 100644 drivers/clk/samsung/clk-fsd.c create mode 100644 include/dt-bindings/clock/fsd-clk.h From patchwork Fri Feb 4 15:41:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12735238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57EA5C4332F for ; Fri, 4 Feb 2022 15:41:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) id 1D1C6C004E1; Fri, 4 Feb 2022 15:41:26 +0000 (UTC) Received: from smtp-relay-internal-0.canonical.com (smtp-relay-internal-0.canonical.com [185.125.188.122]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.kernel.org (Postfix) with ESMTPS id 2EDA0C340EF for ; Fri, 4 Feb 2022 15:41:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 2EDA0C340EF Authentication-Results: smtp.kernel.org; dmarc=pass (p=none dis=none) header.from=canonical.com Authentication-Results: smtp.kernel.org; spf=pass smtp.mailfrom=canonical.com Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 8CE3D3F4B6 for ; Fri, 4 Feb 2022 15:41:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1643989278; bh=HhMWPtfkpkPYK76tVGoLvZIgiOxfmrxT8MjHu4n/xKU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Yg/ktSVcmQEcyXpYfCx9+cMjsgU9L/tW5L8zuirnJNJ8/VrqWAQMwfWGaHsMv1MUM 6Ok671JGT/CszjALJmkeih+tUb1wagVhWAqfhuhhz7ueZquNYNW69brHHByoRNMX8W y6RBO8xx9OyRFmfyvZ0fnb/3SOicNdj1mQn40d9pRte6apUra/ZGihstXQdl1Rgwo4 prRj6o04lt7vf/x9bHghoB14UM5VdAWDCvjkCSseuU80BzA1V6LSYsDZ81rjsh6QST UcGWkGCoAHHxxdfWOBxwDhMYRKinDZmR9SZ7I5gIo+IwIpFfubNtW5vaQeedr89ZnA Zu+epfrQwky2Q== Received: by mail-ej1-f72.google.com with SMTP id r18-20020a17090609d200b006a6e943d09eso2731758eje.20 for ; Fri, 04 Feb 2022 07:41:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HhMWPtfkpkPYK76tVGoLvZIgiOxfmrxT8MjHu4n/xKU=; b=kLZaldTHx56QQPpZptZSruIubrup2fEd5DHcljErGJuTXZZPeHB1NsWEhQvdBsbeCa cVlcvHBHi8Aa6SGOKHUoSxir5EMOeNx4cQ5fjWNsyGrX4j1VLR4Dh5hGU+VnQk8iiYgC MOeILCUwSN13tPzSmJNAKC15w2tStXVqZEKwMcp1xr+j9gDfy2Xv0zrtpziZe8Q0yflu vhRd8Yny2xq2xX2jxmdzU1XMdddaka8n07MNET2qpCegIopi5d5UnxvN0cJWqtEk+gT9 Qj1PzYTfkV4CYGm9MlTrgNftiQtjwxj9h31JU+qxXAamAiVEN3YfGwhWEVPw2ZHO/6QB /q7Q== X-Gm-Message-State: AOAM531PrvcR+g4IHl/oKLu7jlfZAXQnvR7EkVHxcCQZrVCqdXdjIVwI 2wqn8yutuxw47gNEqdYO/lFOuRstBo9nCjmV56fB1j0ktObjRu6tHpwGDAlBY0RiKIY47P1xoqZ gyUNaEc2u6jImgA7y4i7LL6M= X-Received: by 2002:a17:906:478c:: with SMTP id cw12mr2970522ejc.214.1643989278066; Fri, 04 Feb 2022 07:41:18 -0800 (PST) X-Google-Smtp-Source: ABdhPJw27rzlsVhz2k63QiDYhx2I/GqUBW5UCh9ihXw6hsKmtBpPQSfcx9JVgv0MXBr0AQWQD0C0rg== X-Received: by 2002:a17:906:478c:: with SMTP id cw12mr2970501ejc.214.1643989277887; Fri, 04 Feb 2022 07:41:17 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-168-84.adslplus.ch. [188.155.168.84]) by smtp.gmail.com with ESMTPSA id rn16sm770753ejb.61.2022.02.04.07.41.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Feb 2022 07:41:17 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Olof Johansson , Arnd Bergmann , arm@kernel.org, soc@kernel.org Cc: Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Alim Akhtar , Krzysztof Kozlowski , Sylwester Nawrocki Subject: [GIT PULL 2/2] arm64: dts: fsd: tesla for v5.18 Date: Fri, 4 Feb 2022 16:41:12 +0100 Message-Id: <20220204154112.133723-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220204154112.133723-1-krzysztof.kozlowski@canonical.com> References: <20220204154112.133723-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Hi, The dedicated branch for Tesla FSD: bindings, DTS plus platform enablement. This merges dt-bindings headers from PULL 1/2 (only headers!), so everything can be applied cleanly within one set. There is no mixing of driver code, only dt-bindings. Best regards, Krzysztof The following changes since commit e783362eb54cd99b2cac8b3a9aeac942e6f6ac07: Linux 5.17-rc1 (2022-01-23 10:12:53 +0200) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/tesla-dt64-5.18 for you to fetch changes up to bd1e3696a052b9b2bd3c1c72ef4bf800a3a1e286: arm64: dts: fsd: Add SPI device nodes (2022-01-29 12:28:09 +0100) ---------------------------------------------------------------- Tesla FSD ARM64 changes for v5.18 Add Tesla FSD SoC ARM64 platform: bindings, DTSI+DTS, maintainer's entry and defconfig change. This brings and enables this new platform. This includes clock controller bindings (header files with clock IDs) which are shared also with Tesla FSD SoC clock controller pull request. ---------------------------------------------------------------- Alim Akhtar (7): dt-bindings: add vendor prefix for Tesla dt-bindings: arm: add Tesla FSD ARM SoC dt-bindings: clock: Add bindings definitions for FSD CMU blocks dt-bindings: clock: Document FSD CMU bindings arm64: dts: fsd: Add initial device tree support arm64: dts: fsd: Add initial pinctrl support arm64: defconfig: Enable Tesla FSD SoC Aswani Reddy (1): arm64: dts: fsd: Add SPI device nodes Krzysztof Kozlowski (1): Merge tag 'samsung-dt-bindings-clk-fsd-5.18' into for-v5.18/tesla-fsd Documentation/devicetree/bindings/arm/tesla.yaml | 27 + .../devicetree/bindings/clock/tesla,fsd-clock.yaml | 198 ++++++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 8 + arch/arm64/Kconfig.platforms | 6 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/tesla/Makefile | 3 + arch/arm64/boot/dts/tesla/fsd-evb.dts | 39 ++ arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 335 ++++++++++ arch/arm64/boot/dts/tesla/fsd.dtsi | 731 +++++++++++++++++++++ arch/arm64/configs/defconfig | 1 + include/dt-bindings/clock/fsd-clk.h | 150 +++++ 12 files changed, 1501 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/tesla.yaml create mode 100644 Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml create mode 100644 arch/arm64/boot/dts/tesla/Makefile create mode 100644 arch/arm64/boot/dts/tesla/fsd-evb.dts create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/tesla/fsd.dtsi create mode 100644 include/dt-bindings/clock/fsd-clk.h