From patchwork Fri Feb 11 07:32:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12743001 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B239DC433FE for ; Fri, 11 Feb 2022 08:05:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject:Cc:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=EwFT02rOhURyO1Q/pEhcySrQzGLv1zHrYQfD+wQ33hc=; b=el06rlhAA2474/ bIpP4YL/uPJfdYC7V3jSu5zYzbN47KlFiYLwMDV8UBtS8Di9a+5inlolumpTEXFfGvdqq8CCYHuq4 0wPcdpzwMNmVfe6XRrSN7dHwqj/IL1e1KGR5QQdyCRct65xkSRAJkSlaVO4PlLkXwfPeHP4b1Jw2q a0RttL83Ep+1f9HS9F+/4ejPljnfvx5gA5Ve1+rXCKUeRirez1Po4LcPBChRRG7sT3jDNIysS9g9T nAZOVoJyH3ca++zBI+S5PWsPP/aQ0YJ0XSKVxPIGBZqkSWKJeHAIyPK6hsHxuGwv/LnYL1skZypvc 0WI2ploOL0SBvcPHomgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nIQuy-0068h9-4J; Fri, 11 Feb 2022 08:04:36 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nIQuu-0068fy-MA for linux-arm-kernel@lists.infradead.org; Fri, 11 Feb 2022 08:04:34 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 468C5201B51; Fri, 11 Feb 2022 09:04:30 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0D8B4201B4E; Fri, 11 Feb 2022 09:04:30 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 861A9183AC99; Fri, 11 Feb 2022 16:04:28 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, shawnguo@kernel.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support Date: Fri, 11 Feb 2022 15:32:58 +0800 Message-Id: <1644564779-8448-1-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220211_000432_878589_18A82937 X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In the i.MX6QP sabresd board(sch-28857) design, one external oscillator is used as the PCIe reference clock source by the endpoint device. If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would has to be in bypass mode, and ENET clocks would be messed up. To keep things simple, let RC use the internal PLL as reference clock and always enable the external oscillator for endpoint device on i.MX6QP sabresd board. NOTE: This reference clock setup is used to pass the GEN2 TX compliance tests, and isn't recommended as a setup in the end-user design. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts index 480e73183f6b..083cf90bcab5 100644 --- a/arch/arm/boot/dts/imx6qp-sabresd.dts +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 }; }; +&vgen3_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; +}; + &pcie { - status = "disabled"; + status = "okay"; }; &sata { From patchwork Fri Feb 11 07:32:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12743002 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 171A6C433FE for ; Fri, 11 Feb 2022 08:05:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GK72zkxCy3M2OpvQAXVwth6ZyhhF2Pp41HVTiaNvsPE=; b=jvoIUr+4G5MF1K 6zSmAnjbzZeRyZezYlF/7ehVKPwvFzb88dNT4YEURr2h2HcspEpjMgT/CSl/0obylCba/XW7LNGqW uI36CRN6HKMtkAnzK26mJflUklS5niZggnisRjv1cM8idFrtBkkBzb2BaJj6DeA50kx2taqzEDTJ7 uzzqLOWra6ma4XjfVMYwBfSb8kxGg9TdW9cQFwDAT1U7Hp/j7UI6O9EjJM7Q9+MbEUUQe3gCPD1vU /zrDP051ZamHjC/TSFs6S3S0Xa2NPfp1urD4VfVlDJ0/jbuIFRzZFmpg50iyvq2ufmOLd9vrDxd0z DFlTy1JR8Y01r4mde5/Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nIQv7-0068kC-3U; Fri, 11 Feb 2022 08:04:45 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nIQuv-0068fz-3X for linux-arm-kernel@lists.infradead.org; Fri, 11 Feb 2022 08:04:35 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 43D9B1A1AC5; Fri, 11 Feb 2022 09:04:31 +0100 (CET) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0B8731A1AB8; Fri, 11 Feb 2022 09:04:31 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 8A14A183AC89; Fri, 11 Feb 2022 16:04:29 +0800 (+08) From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, shawnguo@kernel.org Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Subject: [PATCH v2 2/2] PCI: imx6: Enable i.MX6QP PCIe power management support Date: Fri, 11 Feb 2022 15:32:59 +0800 Message-Id: <1644564779-8448-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1644564779-8448-1-git-send-email-hongxing.zhu@nxp.com> References: <1644564779-8448-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220211_000433_297804_5F6B0A2C X-CRM114-Status: GOOD ( 10.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org i.MX6QP PCIe supports the reset logic, thus it can reset itself to the initialized state when exit from L2 or L3 states. Enable the i.MX6QP PCIe suspend/resume operations support. Signed-off-by: Richard Zhu Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 784801f2f9e6..62262483470a 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -995,6 +995,7 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) /* Others poke directly at IOMUXC registers */ switch (imx6_pcie->drvdata->variant) { case IMX6SX: + case IMX6QP: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF, IMX6SX_GPR12_PCIE_PM_TURN_OFF); @@ -1307,7 +1308,8 @@ static const struct imx6_pcie_drvdata drvdata[] = { [IMX6QP] = { .variant = IMX6QP, .flags = IMX6_PCIE_FLAG_IMX6_PHY | - IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, + IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE | + IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, .dbi_length = 0x200, }, [IMX7D] = {