From patchwork Mon Feb 14 21:32:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "David E. Box" X-Patchwork-Id: 12746183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A80A2C433EF for ; Mon, 14 Feb 2022 21:49:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229457AbiBNVtO (ORCPT ); Mon, 14 Feb 2022 16:49:14 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:49428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231621AbiBNVtM (ORCPT ); Mon, 14 Feb 2022 16:49:12 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E368D194170; Mon, 14 Feb 2022 13:48:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644875339; x=1676411339; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SgCkQ2NGl6kNtBv0PJ01OQfL9X/ihdcLA+SoGtX1dco=; b=mGfVtYBpHKL1Or1xkO8Dqjumhw3zaH6UWJctosUH2uVoDYSbK2RWX9j2 g0wQVosg8FoDwEToFl7y6J0wYEpbHOMcserf+EZodGM9dZhREOZWqXVag sfVB/ZXwM/+OzRyS4p+tL/Mb7Ydp64aT74Nhu+qG8DGoJNeSdFKavoyQu LQYOPhmQiPPnLCe2A/GtlLJ0VPyO/j8KXP+6OoD3fje1+kh8MntDsEYHG RsyJ2dQrjtQRg4QoU2kkBIaBmkIyyveLGTywHAdhu55Y37/603R+6Sq5F A+pTeCQQNl0F5Kh9akmYAd+5tBY9QYiwfYyz2u1rEz9UwNqck/UoafY+a g==; X-IronPort-AV: E=McAfee;i="6200,9189,10258"; a="250137064" X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="250137064" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2022 13:33:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="587370369" Received: from linux.intel.com ([10.54.29.200]) by fmsmga008.fm.intel.com with ESMTP; 14 Feb 2022 13:33:06 -0800 Received: from debox1-desk4.intel.com (unknown [10.255.228.161]) by linux.intel.com (Postfix) with ESMTP id 87CAF580D3A; Mon, 14 Feb 2022 13:33:06 -0800 (PST) From: "David E. Box" To: hdegoede@redhat.com, david.e.box@linux.intel.com, mgross@linux.intel.com, rjw@rjwysocki.net, srinivas.pandruvada@intel.com Cc: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 1/3] platform/x86/intel: pmt: Remove bin_attribute mmap support to runtime pm Date: Mon, 14 Feb 2022 13:32:56 -0800 Message-Id: <20220214213258.1929462-2-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220214213258.1929462-1-david.e.box@linux.intel.com> References: <20220214213258.1929462-1-david.e.box@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org PMT devices need to support runtime D3. However, binary attributes don't provide access to open/release methods that could be used to control runtime pm. Therefore, remove the mmap operation. The data may still be accessed with read() calls. Signed-off-by: David E. Box --- V0 comments: I expect that this is an undesirable solution because of the ABI change. I don't know if anyone is using this ABI outside of our Intel tools which are willing to make this change. I'd rather find a solution to keep the mmap support. I initially wrote a patch to simply add the missing open and release callbacks to binary attributes but this was thought to be too heavy handed in our internal review. I'm open to suggestions. Thanks. David .../ABI/testing/sysfs-class-intel_pmt | 24 +++++++------- drivers/platform/x86/intel/pmt/class.c | 31 ------------------- 2 files changed, 12 insertions(+), 43 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-class-intel_pmt b/Documentation/ABI/testing/sysfs-class-intel_pmt index ed4c886a21b1..4182f67dcef8 100644 --- a/Documentation/ABI/testing/sysfs-class-intel_pmt +++ b/Documentation/ABI/testing/sysfs-class-intel_pmt @@ -15,10 +15,10 @@ Description: The telem directory contains files describing an instance of a PMT telemetry device that exposes hardware telemetry. Each telem directory has an associated telem file. This file - may be opened and mapped or read to access the telemetry space - of the device. The register layout of the telemetry space is - determined from an XML file that matches the PCI device id and - GUID for the device. + may be opened and read to access the telemetry space of the + device. The register layout of the telemetry space is determined + from an XML file that matches the PCI device id and GUID for the + device. What: /sys/class/intel_pmt/telem/telem Date: October 2020 @@ -26,7 +26,7 @@ KernelVersion: 5.10 Contact: David Box Description: (RO) The telemetry data for this telemetry device. This file - may be mapped or read to obtain the data. + may be read to obtain the data. What: /sys/class/intel_pmt/telem/guid Date: October 2020 @@ -43,7 +43,7 @@ KernelVersion: 5.10 Contact: David Box Description: (RO) The size of telemetry region in bytes that corresponds to - the mapping size for the telem file. + the size of the telem file. What: /sys/class/intel_pmt/telem/offset Date: October 2020 @@ -51,7 +51,7 @@ KernelVersion: 5.10 Contact: David Box Description: (RO) The offset of telemetry region in bytes that corresponds to - the mapping for the telem file. + the size of the telem file. What: /sys/class/intel_pmt/crashlog Date: October 2020 @@ -61,10 +61,10 @@ Description: The crashlog directory contains files for configuring an instance of a PMT crashlog device that can perform crash data recording. Each crashlog device has an associated crashlog - file. This file can be opened and mapped or read to access the - resulting crashlog buffer. The register layout for the buffer - can be determined from an XML file of specified GUID for the - parent device. + file. This file can be opened and read to access the resulting + crashlog buffer. The register layout for the buffer can be + determined from an XML file of specified GUID for the parent + device. What: /sys/class/intel_pmt/crashlog/crashlog Date: October 2020 @@ -72,7 +72,7 @@ KernelVersion: 5.10 Contact: David Box Description: (RO) The crashlog buffer for this crashlog device. This file - may be mapped or read to obtain the data. + may be read to obtain the data. What: /sys/class/intel_pmt/crashlog/guid Date: October 2020 diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c index 1c9e3f3ea41c..85fc159961c1 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -68,36 +68,6 @@ intel_pmt_read(struct file *filp, struct kobject *kobj, return count; } -static int -intel_pmt_mmap(struct file *filp, struct kobject *kobj, - struct bin_attribute *attr, struct vm_area_struct *vma) -{ - struct intel_pmt_entry *entry = container_of(attr, - struct intel_pmt_entry, - pmt_bin_attr); - unsigned long vsize = vma->vm_end - vma->vm_start; - struct device *dev = kobj_to_dev(kobj); - unsigned long phys = entry->base_addr; - unsigned long pfn = PFN_DOWN(phys); - unsigned long psize; - - if (vma->vm_flags & (VM_WRITE | VM_MAYWRITE)) - return -EROFS; - - psize = (PFN_UP(entry->base_addr + entry->size) - pfn) * PAGE_SIZE; - if (vsize > psize) { - dev_err(dev, "Requested mmap size is too large\n"); - return -EINVAL; - } - - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); - if (io_remap_pfn_range(vma, vma->vm_start, pfn, - vsize, vma->vm_page_prot)) - return -EAGAIN; - - return 0; -} - static ssize_t guid_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -263,7 +233,6 @@ static int intel_pmt_dev_register(struct intel_pmt_entry *entry, sysfs_bin_attr_init(&entry->pmt_bin_attr); entry->pmt_bin_attr.attr.name = ns->name; entry->pmt_bin_attr.attr.mode = 0440; - entry->pmt_bin_attr.mmap = intel_pmt_mmap; entry->pmt_bin_attr.read = intel_pmt_read; entry->pmt_bin_attr.size = entry->size; From patchwork Mon Feb 14 21:32:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "David E. Box" X-Patchwork-Id: 12746147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1760AC433EF for ; Mon, 14 Feb 2022 21:35:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231542AbiBNVf2 (ORCPT ); Mon, 14 Feb 2022 16:35:28 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:33156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231405AbiBNVfX (ORCPT ); Mon, 14 Feb 2022 16:35:23 -0500 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B346E15C1BB; Mon, 14 Feb 2022 13:33:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644874400; x=1676410400; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3VNpCeDMulLlJrE98YYeKShG9gqaFAeFwMgC+ghMVKU=; b=Q5pWDkGNAZFgRKCV94yD4vTqR9GBHpWWyStZEkQEOEGIsAPcBjq83xjI HF6dzY863VyWP0/0YMCn9TDsNqDCjOq5H15GAV/61X5AOeKWUCDDAw7tx ++JKxxrq/tDsBfaRb8A23sgXcH9RhUQWnJE1QzjnU+yV7+xyLKsj6s15b 8s9APZ9/cDANiM887iqQWQnKSOPeUUFBp0U+OZfb/q1Em1z7+P8wA8L83 yy55PnG05qPJXi9tl2coJhBm6W/AXyX3+Taxp1Wwu0eHoZGJi0pqZOXdr RFx2WnIOTdY6OINA+s/MX5CgWtOMTxnJFZtdEA+bWAv0Jdv9ynAnWJ4eb g==; X-IronPort-AV: E=McAfee;i="6200,9189,10258"; a="237599346" X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="237599346" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2022 13:33:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="603469909" Received: from linux.intel.com ([10.54.29.200]) by fmsmga004.fm.intel.com with ESMTP; 14 Feb 2022 13:33:06 -0800 Received: from debox1-desk4.intel.com (unknown [10.255.228.161]) by linux.intel.com (Postfix) with ESMTP id B6AC6580D37; Mon, 14 Feb 2022 13:33:06 -0800 (PST) From: "David E. Box" To: hdegoede@redhat.com, david.e.box@linux.intel.com, mgross@linux.intel.com, rjw@rjwysocki.net, srinivas.pandruvada@intel.com Cc: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 2/3] platform/x86/intel: vsec: Enable runtime D3 Date: Mon, 14 Feb 2022 13:32:57 -0800 Message-Id: <20220214213258.1929462-3-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220214213258.1929462-1-david.e.box@linux.intel.com> References: <20220214213258.1929462-1-david.e.box@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add pm_runtime helpers to allow the PCI device to go to D3 when not in use. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.c | 5 +++++ drivers/platform/x86/intel/pmt/class.h | 3 +++ drivers/platform/x86/intel/vsec.c | 23 +++++++++++++++++++++++ 3 files changed, 31 insertions(+) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c index 85fc159961c1..a3ec09fe2f38 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "../vsec.h" #include "class.h" @@ -63,7 +64,10 @@ intel_pmt_read(struct file *filp, struct kobject *kobj, if (count > entry->size - off) count = entry->size - off; + pm_runtime_get_sync(&entry->pdev->dev); memcpy_fromio(buf, entry->base + off, count); + pm_runtime_mark_last_busy(&entry->pdev->dev); + pm_runtime_put_autosuspend(&entry->pdev->dev); return count; } @@ -209,6 +213,7 @@ static int intel_pmt_dev_register(struct intel_pmt_entry *entry, } entry->kobj = &dev->kobj; + entry->pdev = to_pci_dev(parent->parent); if (ns->attr_grp) { ret = sysfs_create_group(entry->kobj, ns->attr_grp); diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h index db11d58867ce..b4df7ee91c51 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -18,9 +18,12 @@ #define GET_BIR(v) ((v) & GENMASK(2, 0)) #define GET_ADDRESS(v) ((v) & GENMASK(31, 3)) +struct pci_dev; + struct intel_pmt_entry { struct bin_attribute pmt_bin_attr; struct kobject *kobj; + struct pci_dev *pdev; void __iomem *disc_table; void __iomem *base; unsigned long base_addr; diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c index c3bdd75ed690..d182122c261d 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "vsec.h" @@ -355,9 +356,21 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_device_id if (!have_devices) return -ENODEV; + pm_runtime_put(&pdev->dev); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); + pm_runtime_allow(&pdev->dev); + return 0; } +static void intel_vsec_pci_remove(struct pci_dev *pdev) +{ + pm_runtime_forbid(&pdev->dev); + pm_runtime_dont_use_autosuspend(&pdev->dev); + pm_runtime_get(&pdev->dev); +} + /* TGL info */ static const struct intel_vsec_platform_info tgl_info = { .quirks = VSEC_QUIRK_NO_WATCHER | VSEC_QUIRK_NO_CRASHLOG | VSEC_QUIRK_TABLE_SHIFT, @@ -383,6 +396,10 @@ static const struct intel_vsec_platform_info dg1_info = { .quirks = VSEC_QUIRK_NO_DVSEC, }; +#ifdef CONFIG_PM_SLEEP +static const struct dev_pm_ops intel_vsec_pm_ops = {}; +#endif + #define PCI_DEVICE_ID_INTEL_VSEC_ADL 0x467d #define PCI_DEVICE_ID_INTEL_VSEC_DG1 0x490e #define PCI_DEVICE_ID_INTEL_VSEC_OOBMSM 0x09a7 @@ -400,6 +417,12 @@ static struct pci_driver intel_vsec_pci_driver = { .name = "intel_vsec", .id_table = intel_vsec_pci_ids, .probe = intel_vsec_pci_probe, + .remove = intel_vsec_pci_remove, + .driver = { +#ifdef CONFIG_PM_SLEEP + .pm = &intel_vsec_pm_ops, +#endif + }, }; module_pci_driver(intel_vsec_pci_driver); From patchwork Mon Feb 14 21:32:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "David E. Box" X-Patchwork-Id: 12746148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBC3BC433F5 for ; Mon, 14 Feb 2022 21:35:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231486AbiBNVf1 (ORCPT ); Mon, 14 Feb 2022 16:35:27 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:51008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231249AbiBNVfV (ORCPT ); Mon, 14 Feb 2022 16:35:21 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E85D5159EBA; Mon, 14 Feb 2022 13:33:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644874387; x=1676410387; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IvBaQoac9SdSxMy/aBRplJsi4/+x3xY3JY7OPph3BGY=; b=frBDgvVGv0wgpQ+W2J96s6F00fmebIRT3AEGIrvA/01l2FAp99+I8s9H Pj3oMEoU5X0Txy6MWVO8JhYLNNCqnapugDws4gEO5NfqbYq45d2N5lXc+ 6j+V8FPFhRK9Sw79wQ6fIc3pmuJCvjfr6lB2gDYUdTjOMHxrYjZKn4Yz3 /9h3JnHhs7JhMeyJQs1fn6RWa5bdkHneeAVhoBKQUIl4oBHONIpl6N3Qu yalQxiVQl+tyb0nr7MJfYoCoGmUozcDv0iQI/O+yZdWe5MaVaLwIwNZxE X7n6YnmcN+GTjWD+zx1Ct6tfk3UvkQVG1yRojXGSG2YHz97BIsTE4PdeN Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10258"; a="230827935" X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="230827935" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Feb 2022 13:33:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,368,1635231600"; d="scan'208";a="485726861" Received: from linux.intel.com ([10.54.29.200]) by orsmga003.jf.intel.com with ESMTP; 14 Feb 2022 13:33:07 -0800 Received: from debox1-desk4.intel.com (unknown [10.255.228.161]) by linux.intel.com (Postfix) with ESMTP id E4B47580D3A; Mon, 14 Feb 2022 13:33:06 -0800 (PST) From: "David E. Box" To: hdegoede@redhat.com, david.e.box@linux.intel.com, mgross@linux.intel.com, rjw@rjwysocki.net, srinivas.pandruvada@intel.com Cc: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH 3/3] platform/x86/intel: vsec: Add DG2 support Date: Mon, 14 Feb 2022 13:32:58 -0800 Message-Id: <20220214213258.1929462-4-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220214213258.1929462-1-david.e.box@linux.intel.com> References: <20220214213258.1929462-1-david.e.box@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Add Platform Monitoring Technology support for DG2 platforms. Signed-off-by: David E. Box --- drivers/platform/x86/intel/pmt/class.c | 2 ++ drivers/platform/x86/intel/vsec.c | 9 +++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c index a3ec09fe2f38..d25fffb2103d 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -31,6 +31,8 @@ static const struct pci_device_id pmt_telem_early_client_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x467d) }, /* ADL */ { PCI_VDEVICE(INTEL, 0x490e) }, /* DG1 */ + { PCI_VDEVICE(INTEL, 0x4f93) }, /* DG2_G10 */ + { PCI_VDEVICE(INTEL, 0x4f95) }, /* DG2_G11 */ { PCI_VDEVICE(INTEL, 0x9a0d) }, /* TGL */ { } }; diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c index d182122c261d..f256c7ca5452 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -396,17 +396,26 @@ static const struct intel_vsec_platform_info dg1_info = { .quirks = VSEC_QUIRK_NO_DVSEC, }; +/* DG2 info */ +static const struct intel_vsec_platform_info dg2_info = { + .quirks = VSEC_QUIRK_TABLE_SHIFT +}; + #ifdef CONFIG_PM_SLEEP static const struct dev_pm_ops intel_vsec_pm_ops = {}; #endif #define PCI_DEVICE_ID_INTEL_VSEC_ADL 0x467d #define PCI_DEVICE_ID_INTEL_VSEC_DG1 0x490e +#define PCI_DEVICE_ID_INTEL_VSEC_DG2_G10 0x4f93 +#define PCI_DEVICE_ID_INTEL_VSEC_DG2_G11 0x4f95 #define PCI_DEVICE_ID_INTEL_VSEC_OOBMSM 0x09a7 #define PCI_DEVICE_ID_INTEL_VSEC_TGL 0x9a0d static const struct pci_device_id intel_vsec_pci_ids[] = { { PCI_DEVICE_DATA(INTEL, VSEC_ADL, &tgl_info) }, { PCI_DEVICE_DATA(INTEL, VSEC_DG1, &dg1_info) }, + { PCI_DEVICE_DATA(INTEL, VSEC_DG2_G10, &dg2_info) }, + { PCI_DEVICE_DATA(INTEL, VSEC_DG2_G11, &dg2_info) }, { PCI_DEVICE_DATA(INTEL, VSEC_OOBMSM, NULL) }, { PCI_DEVICE_DATA(INTEL, VSEC_TGL, &tgl_info) }, { }