From patchwork Tue Feb 15 15:25:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Singh X-Patchwork-Id: 12747234 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24E04C433F5 for ; Tue, 15 Feb 2022 15:26:27 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.273314.468452 (Exim 4.92) (envelope-from ) id 1nJzia-0001CQ-6c; Tue, 15 Feb 2022 15:26:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 273314.468452; Tue, 15 Feb 2022 15:26:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nJzia-0001CJ-3I; Tue, 15 Feb 2022 15:26:16 +0000 Received: by outflank-mailman (input) for mailman id 273314; Tue, 15 Feb 2022 15:26:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nJziY-00014w-CS for xen-devel@lists.xenproject.org; Tue, 15 Feb 2022 15:26:14 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 9bb87121-8e73-11ec-b215-9bbe72dcb22c; Tue, 15 Feb 2022 16:26:12 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2ABBE1396; Tue, 15 Feb 2022 07:26:12 -0800 (PST) Received: from e109506.cambridge.arm.com (e109506.cambridge.arm.com [10.1.199.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C4CA13F66F; Tue, 15 Feb 2022 07:26:10 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9bb87121-8e73-11ec-b215-9bbe72dcb22c From: Rahul Singh To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, rahul.singh@arm.com, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini Subject: [PATCH v2 1/3] xen/vpci: msix: move x86 specific code to x86 file Date: Tue, 15 Feb 2022 15:25:16 +0000 Message-Id: <4d2a727ba218468e4f347dc12ca051a0534fe205.1644937405.git.rahul.singh@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 vpci/msix.c file will be used for arm architecture when vpci msix support will be added to ARM, but there is x86 specific code in this file. Move x86 specific code to the x86/hvm/vmsi.c file to make sure common code will be used for other architecture. No functional change intended. Signed-off-by: Rahul Singh --- Changes since v1: - Split return value of vpci_msix_{read,write} to separate patch. - Fix the {read,write}{l,q} call in common code to move to arch specific file. --- xen/arch/x86/hvm/vmsi.c | 102 ++++++++++++++++++++++++++++ xen/arch/x86/include/asm/msi.h | 28 -------- xen/arch/x86/msi.c | 2 +- xen/drivers/passthrough/amd/iommu.h | 1 + xen/drivers/vpci/msi.c | 3 +- xen/drivers/vpci/msix.c | 101 +++------------------------ xen/include/xen/msi.h | 28 ++++++++ xen/include/xen/vpci.h | 13 ++++ 8 files changed, 154 insertions(+), 124 deletions(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 13e2a190b4..17426f238c 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -925,4 +925,106 @@ int vpci_msix_arch_print(const struct vpci_msix *msix) return 0; } + +int vpci_make_msix_hole(const struct pci_dev *pdev) +{ + struct domain *d = pdev->domain; + unsigned int i; + + if ( !pdev->vpci->msix ) + return 0; + + /* Make sure there's a hole for the MSIX table/PBA in the p2m. */ + for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ ) + { + unsigned long start = PFN_DOWN(vmsix_table_addr(pdev->vpci, i)); + unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) + + vmsix_table_size(pdev->vpci, i) - 1); + + for ( ; start <= end; start++ ) + { + p2m_type_t t; + mfn_t mfn = get_gfn_query(d, start, &t); + + switch ( t ) + { + case p2m_mmio_dm: + case p2m_invalid: + break; + case p2m_mmio_direct: + if ( mfn_x(mfn) == start ) + { + clear_identity_p2m_entry(d, start); + break; + } + /* fallthrough. */ + default: + put_gfn(d, start); + gprintk(XENLOG_WARNING, + "%pp: existing mapping (mfn: %" PRI_mfn + "type: %d) at %#lx clobbers MSIX MMIO area\n", + &pdev->sbdf, mfn_x(mfn), t, start); + return -EEXIST; + } + put_gfn(d, start); + } + } + + return 0; +} + +struct vpci_msix *vpci_msix_find(const struct domain *d, unsigned long addr) +{ + struct vpci_msix *msix; + + list_for_each_entry ( msix, &d->arch.hvm.msix_tables, next ) + { + const struct vpci_bar *bars = msix->pdev->vpci->header.bars; + unsigned int i; + + for ( i = 0; i < ARRAY_SIZE(msix->tables); i++ ) + if ( bars[msix->tables[i] & PCI_MSIX_BIRMASK].enabled && + VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, i) ) + return msix; + } + + return NULL; +} + +static int x86_msix_accept(struct vcpu *v, unsigned long addr) +{ + return !!vpci_msix_find(v->domain, addr); +} + +static int x86_msix_write(struct vcpu *v, unsigned long addr, unsigned int len, + unsigned long data) +{ + const struct domain *d = v->domain; + struct vpci_msix *msix = vpci_msix_find(d, addr); + + return vpci_msix_write(msix, addr, len, data); +} + +static int x86_msix_read(struct vcpu *v, unsigned long addr, unsigned int len, + unsigned long *data) +{ + const struct domain *d = v->domain; + struct vpci_msix *msix = vpci_msix_find(d, addr); + + return vpci_msix_read(msix, addr, len, data); +} + +static const struct hvm_mmio_ops vpci_msix_table_ops = { + .check = x86_msix_accept, + .read = x86_msix_read, + .write = x86_msix_write, +}; + +void vpci_msix_arch_register(struct vpci_msix *msix, struct domain *d) +{ + if ( list_empty(&d->arch.hvm.msix_tables) ) + register_mmio_handler(d, &vpci_msix_table_ops); + + list_add(&msix->next, &d->arch.hvm.msix_tables); +} #endif /* CONFIG_HAS_VPCI */ diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h index e228b0f3f3..0a7912e9be 100644 --- a/xen/arch/x86/include/asm/msi.h +++ b/xen/arch/x86/include/asm/msi.h @@ -148,34 +148,6 @@ int msi_free_irq(struct msi_desc *entry); */ #define NR_HP_RESERVED_VECTORS 20 -#define msi_control_reg(base) (base + PCI_MSI_FLAGS) -#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) -#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) -#define msi_data_reg(base, is64bit) \ - ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 ) -#define msi_mask_bits_reg(base, is64bit) \ - ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4) -#define msi_pending_bits_reg(base, is64bit) \ - ((base) + PCI_MSI_MASK_BIT + ((is64bit) ? 4 : 0)) -#define msi_disable(control) control &= ~PCI_MSI_FLAGS_ENABLE -#define multi_msi_capable(control) \ - (1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1)) -#define multi_msi_enable(control, num) \ - control |= (((fls(num) - 1) << 4) & PCI_MSI_FLAGS_QSIZE); -#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) -#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) -#define msi_enable(control, num) multi_msi_enable(control, num); \ - control |= PCI_MSI_FLAGS_ENABLE - -#define msix_control_reg(base) (base + PCI_MSIX_FLAGS) -#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) -#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) -#define msix_enable(control) control |= PCI_MSIX_FLAGS_ENABLE -#define msix_disable(control) control &= ~PCI_MSIX_FLAGS_ENABLE -#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) -#define msix_unmask(address) (address & ~PCI_MSIX_VECTOR_BITMASK) -#define msix_mask(address) (address | PCI_MSIX_VECTOR_BITMASK) - /* * MSI Defined Data Structures */ diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index 5febc0ea4b..62fd7351dd 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -20,10 +20,10 @@ #include #include #include +#include #include #include #include -#include #include #include #include diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h index 93243424e8..f007a0c083 100644 --- a/xen/drivers/passthrough/amd/iommu.h +++ b/xen/drivers/passthrough/amd/iommu.h @@ -26,6 +26,7 @@ #include #include #include +#include #include #include diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c index 5757a7aed2..8fc82a9b8d 100644 --- a/xen/drivers/vpci/msi.c +++ b/xen/drivers/vpci/msi.c @@ -16,12 +16,11 @@ * License along with this program; If not, see . */ +#include #include #include #include -#include - static uint32_t control_read(const struct pci_dev *pdev, unsigned int reg, void *data) { diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 846f1b8d70..d89396a3b4 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -17,16 +17,12 @@ * License along with this program; If not, see . */ +#include #include #include -#include #include -#define VMSIX_ADDR_IN_RANGE(addr, vpci, nr) \ - ((addr) >= vmsix_table_addr(vpci, nr) && \ - (addr) < vmsix_table_addr(vpci, nr) + vmsix_table_size(vpci, nr)) - static uint32_t control_read(const struct pci_dev *pdev, unsigned int reg, void *data) { @@ -138,29 +134,6 @@ static void control_write(const struct pci_dev *pdev, unsigned int reg, pci_conf_write16(pdev->sbdf, reg, val); } -static struct vpci_msix *msix_find(const struct domain *d, unsigned long addr) -{ - struct vpci_msix *msix; - - list_for_each_entry ( msix, &d->arch.hvm.msix_tables, next ) - { - const struct vpci_bar *bars = msix->pdev->vpci->header.bars; - unsigned int i; - - for ( i = 0; i < ARRAY_SIZE(msix->tables); i++ ) - if ( bars[msix->tables[i] & PCI_MSIX_BIRMASK].enabled && - VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, i) ) - return msix; - } - - return NULL; -} - -static int msix_accept(struct vcpu *v, unsigned long addr) -{ - return !!msix_find(v->domain, addr); -} - static bool access_allowed(const struct pci_dev *pdev, unsigned long addr, unsigned int len) { @@ -182,11 +155,9 @@ static struct vpci_msix_entry *get_entry(struct vpci_msix *msix, return &msix->entries[(addr - start) / PCI_MSIX_ENTRY_SIZE]; } -static int msix_read(struct vcpu *v, unsigned long addr, unsigned int len, - unsigned long *data) +int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long *data) { - const struct domain *d = v->domain; - struct vpci_msix *msix = msix_find(d, addr); const struct vpci_msix_entry *entry; unsigned int offset; @@ -259,11 +230,10 @@ static int msix_read(struct vcpu *v, unsigned long addr, unsigned int len, return X86EMUL_OKAY; } -static int msix_write(struct vcpu *v, unsigned long addr, unsigned int len, - unsigned long data) +int vpci_msix_write(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long data) { - const struct domain *d = v->domain; - struct vpci_msix *msix = msix_find(d, addr); + const struct domain *d = msix->pdev->domain; struct vpci_msix_entry *entry; unsigned int offset; @@ -375,59 +345,6 @@ static int msix_write(struct vcpu *v, unsigned long addr, unsigned int len, return X86EMUL_OKAY; } -static const struct hvm_mmio_ops vpci_msix_table_ops = { - .check = msix_accept, - .read = msix_read, - .write = msix_write, -}; - -int vpci_make_msix_hole(const struct pci_dev *pdev) -{ - struct domain *d = pdev->domain; - unsigned int i; - - if ( !pdev->vpci->msix ) - return 0; - - /* Make sure there's a hole for the MSIX table/PBA in the p2m. */ - for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ ) - { - unsigned long start = PFN_DOWN(vmsix_table_addr(pdev->vpci, i)); - unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) + - vmsix_table_size(pdev->vpci, i) - 1); - - for ( ; start <= end; start++ ) - { - p2m_type_t t; - mfn_t mfn = get_gfn_query(d, start, &t); - - switch ( t ) - { - case p2m_mmio_dm: - case p2m_invalid: - break; - case p2m_mmio_direct: - if ( mfn_x(mfn) == start ) - { - clear_identity_p2m_entry(d, start); - break; - } - /* fallthrough. */ - default: - put_gfn(d, start); - gprintk(XENLOG_WARNING, - "%pp: existing mapping (mfn: %" PRI_mfn - "type: %d) at %#lx clobbers MSIX MMIO area\n", - &pdev->sbdf, mfn_x(mfn), t, start); - return -EEXIST; - } - put_gfn(d, start); - } - } - - return 0; -} - static int init_msix(struct pci_dev *pdev) { struct domain *d = pdev->domain; @@ -472,11 +389,9 @@ static int init_msix(struct pci_dev *pdev) vpci_msix_arch_init_entry(&msix->entries[i]); } - if ( list_empty(&d->arch.hvm.msix_tables) ) - register_mmio_handler(d, &vpci_msix_table_ops); - pdev->vpci->msix = msix; - list_add(&msix->next, &d->arch.hvm.msix_tables); + + vpci_msix_arch_register(msix, d); return 0; } diff --git a/xen/include/xen/msi.h b/xen/include/xen/msi.h index c903d0050c..c5c8e65feb 100644 --- a/xen/include/xen/msi.h +++ b/xen/include/xen/msi.h @@ -3,6 +3,34 @@ #include +#define msi_control_reg(base) (base + PCI_MSI_FLAGS) +#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) +#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) +#define msi_data_reg(base, is64bit) \ + ( (is64bit) ? (base) + PCI_MSI_DATA_64 : (base) + PCI_MSI_DATA_32 ) +#define msi_mask_bits_reg(base, is64bit) \ + ( (is64bit) ? (base) + PCI_MSI_MASK_BIT : (base) + PCI_MSI_MASK_BIT - 4) +#define msi_pending_bits_reg(base, is64bit) \ + ( (is64bit) ? (base) + PCI_MSI_MASK_BIT + 4 : (base) + PCI_MSI_MASK_BIT) +#define msi_disable(control) control &= ~PCI_MSI_FLAGS_ENABLE +#define multi_msi_capable(control) \ + (1 << ((control & PCI_MSI_FLAGS_QMASK) >> 1)) +#define multi_msi_enable(control, num) \ + control |= (((fls(num) - 1) << 4) & PCI_MSI_FLAGS_QSIZE); +#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) +#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) +#define msi_enable(control, num) multi_msi_enable(control, num); \ + control |= PCI_MSI_FLAGS_ENABLE + +#define msix_control_reg(base) (base + PCI_MSIX_FLAGS) +#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) +#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) +#define msix_enable(control) control |= PCI_MSIX_FLAGS_ENABLE +#define msix_disable(control) control &= ~PCI_MSIX_FLAGS_ENABLE +#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) +#define msix_unmask(address) (address & ~PCI_MSIX_VECTOR_BITMASK) +#define msix_mask(address) (address | PCI_MSIX_VECTOR_BITMASK) + #ifdef CONFIG_HAS_PCI_MSI #include diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index e8ac1eb395..0381a2c911 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -148,6 +148,11 @@ struct vpci_vcpu { }; #ifdef __XEN__ + +#define VMSIX_ADDR_IN_RANGE(addr, vpci, nr) \ + ((addr) >= vmsix_table_addr(vpci, nr) && \ + (addr) < vmsix_table_addr(vpci, nr) + vmsix_table_size(vpci, nr)) + void vpci_dump_msi(void); /* Make sure there's a hole in the p2m for the MSIX mmio areas. */ @@ -218,6 +223,14 @@ bool vpci_ecam_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, bool vpci_ecam_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, unsigned long *data); +void vpci_msix_arch_register(struct vpci_msix *msix, struct domain *d); + +int vpci_msix_write(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long data); + +int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long *data); + #endif /* __XEN__ */ #else /* !CONFIG_HAS_VPCI */ From patchwork Tue Feb 15 15:25:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Singh X-Patchwork-Id: 12747235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67648C433FE for ; Tue, 15 Feb 2022 15:27:24 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.273323.468463 (Exim 4.92) (envelope-from ) id 1nJzjS-0001qh-LD; Tue, 15 Feb 2022 15:27:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 273323.468463; Tue, 15 Feb 2022 15:27:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nJzjS-0001qa-IA; Tue, 15 Feb 2022 15:27:10 +0000 Received: by outflank-mailman (input) for mailman id 273323; Tue, 15 Feb 2022 15:27:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nJzjR-0001qG-67 for xen-devel@lists.xenproject.org; Tue, 15 Feb 2022 15:27:09 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id bc8d6a1d-8e73-11ec-b215-9bbe72dcb22c; Tue, 15 Feb 2022 16:27:08 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 545621396; Tue, 15 Feb 2022 07:27:07 -0800 (PST) Received: from e109506.cambridge.arm.com (e109506.cambridge.arm.com [10.1.199.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 609393F66F; Tue, 15 Feb 2022 07:27:06 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bc8d6a1d-8e73-11ec-b215-9bbe72dcb22c From: Rahul Singh To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, rahul.singh@arm.com, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu Subject: [PATCH v2 2/3] xen/vpci: msix: change return value of vpci_msix_{read,write} Date: Tue, 15 Feb 2022 15:25:17 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Return value is different for the MMIO handler on ARM and x86 architecture. To make the code common for both architectures change the return value of vpci_msix_{read, write} to bool. Architecture-specific return value will be handled in arch code. Signed-off-by: Rahul Singh --- Changes since v1: - Added in this version --- xen/arch/x86/hvm/vmsi.c | 10 ++++++++-- xen/drivers/vpci/msix.c | 24 ++++++++++++------------ xen/include/xen/vpci.h | 8 ++++---- 3 files changed, 24 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 17426f238c..761ce674d7 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -1002,7 +1002,10 @@ static int x86_msix_write(struct vcpu *v, unsigned long addr, unsigned int len, const struct domain *d = v->domain; struct vpci_msix *msix = vpci_msix_find(d, addr); - return vpci_msix_write(msix, addr, len, data); + if( !vpci_msix_write(msix, addr, len, data) ) + return X86EMUL_RETRY; + + return X86EMUL_OKAY; } static int x86_msix_read(struct vcpu *v, unsigned long addr, unsigned int len, @@ -1011,7 +1014,10 @@ static int x86_msix_read(struct vcpu *v, unsigned long addr, unsigned int len, const struct domain *d = v->domain; struct vpci_msix *msix = vpci_msix_find(d, addr); - return vpci_msix_read(msix, addr, len, data); + if ( !vpci_msix_read(msix, addr, len, data) ) + return X86EMUL_RETRY; + + return X86EMUL_OKAY; } static const struct hvm_mmio_ops vpci_msix_table_ops = { diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index d89396a3b4..5b315757ef 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -155,8 +155,8 @@ static struct vpci_msix_entry *get_entry(struct vpci_msix *msix, return &msix->entries[(addr - start) / PCI_MSIX_ENTRY_SIZE]; } -int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, - unsigned int len, unsigned long *data) +bool vpci_msix_read(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long *data) { const struct vpci_msix_entry *entry; unsigned int offset; @@ -164,10 +164,10 @@ int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, *data = ~0ul; if ( !msix ) - return X86EMUL_RETRY; + return false; if ( !access_allowed(msix->pdev, addr, len) ) - return X86EMUL_OKAY; + return true; if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) { @@ -193,7 +193,7 @@ int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, break; } - return X86EMUL_OKAY; + return true; } spin_lock(&msix->pdev->vpci->lock); @@ -227,21 +227,21 @@ int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, } spin_unlock(&msix->pdev->vpci->lock); - return X86EMUL_OKAY; + return true; } -int vpci_msix_write(struct vpci_msix *msix, unsigned long addr, - unsigned int len, unsigned long data) +bool vpci_msix_write(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long data) { const struct domain *d = msix->pdev->domain; struct vpci_msix_entry *entry; unsigned int offset; if ( !msix ) - return X86EMUL_RETRY; + return false; if ( !access_allowed(msix->pdev, addr, len) ) - return X86EMUL_OKAY; + return true; if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) { @@ -264,7 +264,7 @@ int vpci_msix_write(struct vpci_msix *msix, unsigned long addr, } } - return X86EMUL_OKAY; + return true; } spin_lock(&msix->pdev->vpci->lock); @@ -342,7 +342,7 @@ int vpci_msix_write(struct vpci_msix *msix, unsigned long addr, } spin_unlock(&msix->pdev->vpci->lock); - return X86EMUL_OKAY; + return true; } static int init_msix(struct pci_dev *pdev) diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 0381a2c911..1c36845abf 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -225,11 +225,11 @@ bool vpci_ecam_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, void vpci_msix_arch_register(struct vpci_msix *msix, struct domain *d); -int vpci_msix_write(struct vpci_msix *msix, unsigned long addr, - unsigned int len, unsigned long data); +bool vpci_msix_write(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long data); -int vpci_msix_read(struct vpci_msix *msix, unsigned long addr, - unsigned int len, unsigned long *data); +bool vpci_msix_read(struct vpci_msix *msix, unsigned long addr, + unsigned int len, unsigned long *data); #endif /* __XEN__ */ From patchwork Tue Feb 15 15:25:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Singh X-Patchwork-Id: 12747236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3EAE4C43219 for ; Tue, 15 Feb 2022 15:27:43 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.273328.468475 (Exim 4.92) (envelope-from ) id 1nJzjp-0002PX-Ty; Tue, 15 Feb 2022 15:27:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 273328.468475; Tue, 15 Feb 2022 15:27:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nJzjp-0002PQ-Qq; Tue, 15 Feb 2022 15:27:33 +0000 Received: by outflank-mailman (input) for mailman id 273328; Tue, 15 Feb 2022 15:27:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1nJzjo-0002Eg-UI for xen-devel@lists.xenproject.org; Tue, 15 Feb 2022 15:27:33 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id cabc574d-8e73-11ec-8eb8-a37418f5ba1a; Tue, 15 Feb 2022 16:27:31 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2450A1396; Tue, 15 Feb 2022 07:27:31 -0800 (PST) Received: from e109506.cambridge.arm.com (e109506.cambridge.arm.com [10.1.199.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2FD3A3F66F; Tue, 15 Feb 2022 07:27:30 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cabc574d-8e73-11ec-8eb8-a37418f5ba1a From: Rahul Singh To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, rahul.singh@arm.com, Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu Subject: [PATCH v2 3/3] xen/vpci: msix: move read/write call to MSI-X PBA entry to arch file Date: Tue, 15 Feb 2022 15:25:18 +0000 Message-Id: <3e47316052dce3c85bde04ab6b72ba4f48fa0bb8.1644937405.git.rahul.singh@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 {read,write}{l,q} function argument is different for ARM and x86. ARM {read,wrie}(l,q} function argument is pointer whereas X86 {read,wrie}(l,q} function argument is address itself. {read,write}{l,q} is only used in common file to access the MSI-X PBA structure. To avoid impacting other x86 code and to make the code common move the read/write call to MSI-X PBA to arch specific file. Signed-off-by: Rahul Singh --- Changes since v1: - Added in this version --- xen/arch/x86/hvm/vmsi.c | 47 +++++++++++++++++++++++++++++++++++++++++ xen/drivers/vpci/msix.c | 43 ++----------------------------------- xen/include/xen/vpci.h | 6 ++++++ 3 files changed, 55 insertions(+), 41 deletions(-) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 761ce674d7..f124a1d07d 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -1033,4 +1033,51 @@ void vpci_msix_arch_register(struct vpci_msix *msix, struct domain *d) list_add(&msix->next, &d->arch.hvm.msix_tables); } + +bool vpci_msix_arch_pba_read(unsigned long addr, unsigned int len, + unsigned long *data) +{ + /* + * Access to PBA. + * + * TODO: note that this relies on having the PBA identity mapped to the + * guest address space. If this changes the address will need to be + * translated. + */ + switch ( len ) + { + case 4: + *data = readl(addr); + break; + + case 8: + *data = readq(addr); + break; + + default: + ASSERT_UNREACHABLE(); + break; + } + + return true; +} + +void vpci_msix_arch_pba_write(unsigned long addr, unsigned int len, + unsigned long data) +{ + switch ( len ) + { + case 4: + writel(data, addr); + break; + + case 8: + writeq(data, addr); + break; + + default: + ASSERT_UNREACHABLE(); + break; + } +} #endif /* CONFIG_HAS_VPCI */ diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c index 5b315757ef..b6720f1a1a 100644 --- a/xen/drivers/vpci/msix.c +++ b/xen/drivers/vpci/msix.c @@ -170,31 +170,7 @@ bool vpci_msix_read(struct vpci_msix *msix, unsigned long addr, return true; if ( VMSIX_ADDR_IN_RANGE(addr, msix->pdev->vpci, VPCI_MSIX_PBA) ) - { - /* - * Access to PBA. - * - * TODO: note that this relies on having the PBA identity mapped to the - * guest address space. If this changes the address will need to be - * translated. - */ - switch ( len ) - { - case 4: - *data = readl(addr); - break; - - case 8: - *data = readq(addr); - break; - - default: - ASSERT_UNREACHABLE(); - break; - } - - return true; - } + return vpci_msix_arch_pba_read(addr, len, data); spin_lock(&msix->pdev->vpci->lock); entry = get_entry(msix, addr); @@ -247,22 +223,7 @@ bool vpci_msix_write(struct vpci_msix *msix, unsigned long addr, { /* Ignore writes to PBA for DomUs, it's behavior is undefined. */ if ( is_hardware_domain(d) ) - { - switch ( len ) - { - case 4: - writel(data, addr); - break; - - case 8: - writeq(data, addr); - break; - - default: - ASSERT_UNREACHABLE(); - break; - } - } + vpci_msix_arch_pba_write(addr, len, data); return true; } diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index 1c36845abf..a61daf9d53 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -231,6 +231,12 @@ bool vpci_msix_write(struct vpci_msix *msix, unsigned long addr, bool vpci_msix_read(struct vpci_msix *msix, unsigned long addr, unsigned int len, unsigned long *data); +bool vpci_msix_arch_pba_read(unsigned long addr, unsigned int len, + unsigned long *data); + +void vpci_msix_arch_pba_write(unsigned long addr, unsigned int len, + unsigned long data); + #endif /* __XEN__ */ #else /* !CONFIG_HAS_VPCI */