From patchwork Thu Feb 17 03:53:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749328 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34E6BC433EF for ; Thu, 17 Feb 2022 03:54:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229604AbiBQDyT (ORCPT ); Wed, 16 Feb 2022 22:54:19 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:38860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233203AbiBQDyS (ORCPT ); Wed, 16 Feb 2022 22:54:18 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0D2F2A229E for ; Wed, 16 Feb 2022 19:54:03 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id bu29so7670196lfb.0 for ; Wed, 16 Feb 2022 19:54:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2AdJ+qrckMHTJcRwxA8dkshi8PG6FFViBpmjAV8cCbI=; b=YdeBlsi7Cyzf4Eq7wBVPnTETdHlYz6euXzIFkcUr+cR2wdgIgI1YnhPQVMwj0VQQa4 FZezexG9HiA/r7U7Wrbfo6UVTtfPfAh085oHq0rKVj0zyfhCZvbpGlE60CQccHo8tTNg GVvT0+k93R5zSgbiwBcte3drWUZwyPfCQMGiLYxXLwHX5W7kg0gfrPO3YllduuEmZNWJ Uyfvl4gPmNpii/3+gmD677VfDLTvosb/dxY03SWkMBEbjjrr27jutKebs0vCzpkMmoDl uFAjzc1S1IPfxOGfpAQEfx/1EwCRz/NphQB/n9xYAUMm4eimR5wddnZFGWvwzA7cFA7S Bavw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2AdJ+qrckMHTJcRwxA8dkshi8PG6FFViBpmjAV8cCbI=; b=AOUHitW0fG1qpBWqt+Lc3c5Xkjbb4eQeqgFSWC+qEV7hAUjH8fWMGCSoPeA5rsoES5 X7+aCFgl55qnchJQvAlvsYgE4F9dVB2dj9FZSUmRLtJde/I9IZlCTciP/KjpRSinb8Gv VgS3dR916MKz+MR2fYAdxY9wbkZAVYpi3S45pK9T837lZY4NzTnZuU5iXW36JU8Ci/h8 Oilp99aEaVXxxd6E0SCrpKBXJ2dnjsV3nTZuGcqhXsW89+nUpYQzwFRr9CYSYNgD3Bcp 9zHspUTd0MXHHYcJMhMF4tefy9srwPONa+cLzxQCswZbKaq3YTPm3Qb4AbcKpf+S9IB8 UWnQ== X-Gm-Message-State: AOAM531BegvzZEFZ2vO+MRZ5a+VZ9XS0TRxsoTO3vguHC3IeF7VlSAz+ OETwZ4XXqQo1k33nDjgIgok2mw== X-Google-Smtp-Source: ABdhPJyFslGnM3IMNPCamQzXQZWO667qKtPpEi0zc/zicfSSW+fwFF20dF3cNkNm6OSOOBid7Ik3mQ== X-Received: by 2002:a05:6512:481:b0:43d:f703:721e with SMTP id v1-20020a056512048100b0043df703721emr803431lfq.55.1645070041209; Wed, 16 Feb 2022 19:54:01 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:00 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 1/7] drm/msm/dpu: fix dp audio condition Date: Thu, 17 Feb 2022 06:53:52 +0300 Message-Id: <20220217035358.465904-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org DP audio enablement code which is comparing intf_type, DRM_MODE_ENCODER_TMDS (= 2) with DRM_MODE_CONNECTOR_DisplayPort (= 10). Which would never succeed. Fix it to check for DRM_MODE_ENCODER_TMDS. Fixes: d13e36d7d222 ("drm/msm/dp: add audio support for Display Port on MSM") Reviewed-by: Abhinav Kumar Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 1e648db439f9..02d0fae1c6dc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1099,7 +1099,7 @@ static void _dpu_encoder_virt_enable_helper(struct drm_encoder *drm_enc) } - if (dpu_enc->disp_info.intf_type == DRM_MODE_CONNECTOR_DisplayPort && + if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_TMDS && dpu_enc->cur_master->hw_mdptop && dpu_enc->cur_master->hw_mdptop->ops.intf_audio_select) dpu_enc->cur_master->hw_mdptop->ops.intf_audio_select( From patchwork Thu Feb 17 03:53:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90C57C433F5 for ; Thu, 17 Feb 2022 03:54:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233186AbiBQDyS (ORCPT ); Wed, 16 Feb 2022 22:54:18 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:38802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229598AbiBQDyR (ORCPT ); Wed, 16 Feb 2022 22:54:17 -0500 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39A302A229F for ; Wed, 16 Feb 2022 19:54:04 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id c15so6329138ljf.11 for ; Wed, 16 Feb 2022 19:54:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0kyxRMMBG2gpm69Eogx/Pqcstxzhu1JTR7Us2wGmBvY=; b=fKV36McY3ySvJQwBRVQSuXKAstnJZQcBQRIuW05OzVCs7WnOqmkmKW4/+PbXwA18n/ HiuJIUpyCQW87rPyh8GbIiZpfpNgXJtXBehB3MufCtb4XiQqriewEYgZXXQuKpOXq0gP 9FFOSnSZBCb19/h5skw6QKaT8ZtdyS4Coywy7gs+htHnrsOH+YKvTHzX04ANp+I4VCcl vbDysr3lHt8QGupfuz5WMrMRosE0J/gLlpuKXIfMAAK+xR44Uu3pxeMKixTzm/0t78cK N1Kok1Zldl0FNTr4ABFP6TNhYuSUQj7BhdIaGW3HB66VgNZer7Gi1RLFzm9PIScrKeBB ORtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0kyxRMMBG2gpm69Eogx/Pqcstxzhu1JTR7Us2wGmBvY=; b=U+D+4s1lM1SOF+UCG4EF7Pyheer5dzUbREaw2Uw1WebqXIpTSwpL35IuS58eNuyB8I DBsqOqU6Rg+ZBZ8hxq9P9EOOUzHIfU/zRFES8vHSks+EUiUVN13LN9S5i/CW7W/Lqjoy OdBIB6FXC1ry3POKHPAbMVEiFmKAGkd0hu5UVDJ/rNkBiFVMFYmsMr9pE94Uog9zKJPy o2001nu07DFiQNqhp4MXbowNfCANwAajhvh84QefEEtc5z6w9rC+bK4Zxlz6Dd9nil/4 RQ1Fki5o6cMA6rcBmc34gydKakXxUhMQwsH5ehL6K9zO49TJ8itQSp4dsWYO1ibMKnMT Bldw== X-Gm-Message-State: AOAM531REIAaELM/59gfmeveAosaLumSJKU3ohtJGT33jOraMWMuRSMX vBVXNPNnWaLzatAweR/5FNVzLw== X-Google-Smtp-Source: ABdhPJwjg6TalywIhRqRrSyVrQ9fIteRP0SsmFbcNLffktdUAwVe97wMS+C2UjwtwQCFO5vOAG1Psg== X-Received: by 2002:a05:651c:1547:b0:244:8a9b:d0a1 with SMTP id y7-20020a05651c154700b002448a9bd0a1mr882457ljp.53.1645070042135; Wed, 16 Feb 2022 19:54:02 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:01 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 2/7] drm/msm: move struct msm_display_info to dpu driver Date: Thu, 17 Feb 2022 06:53:53 +0300 Message-Id: <20220217035358.465904-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The msm_display_info structure is not used by the rest of msm driver, so move it into the dpu1 (dpu_encoder.h to be precise). Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 18 ++++++++++++++++++ drivers/gpu/drm/msm/msm_drv.h | 18 ------------------ 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index e241914a9677..ebe3944355bb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -34,6 +34,24 @@ struct dpu_encoder_hw_resources { void dpu_encoder_get_hw_resources(struct drm_encoder *encoder, struct dpu_encoder_hw_resources *hw_res); +/** + * struct msm_display_info - defines display properties + * @intf_type: DRM_MODE_ENCODER_ type + * @capabilities: Bitmask of display flags + * @num_of_h_tiles: Number of horizontal tiles in case of split interface + * @h_tile_instance: Controller instance used per tile. Number of elements is + * based on num_of_h_tiles + * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is + * used instead of panel TE in cmd mode panels + */ +struct msm_display_info { + int intf_type; + uint32_t capabilities; + uint32_t num_of_h_tiles; + uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; + bool is_te_using_watchdog_timer; +}; + /** * dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to * @encoder: encoder pointer diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index d7574e6bd4e4..16f9e25ee19e 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -109,24 +109,6 @@ struct msm_display_topology { u32 num_dspp; }; -/** - * struct msm_display_info - defines display properties - * @intf_type: DRM_MODE_ENCODER_ type - * @capabilities: Bitmask of display flags - * @num_of_h_tiles: Number of horizontal tiles in case of split interface - * @h_tile_instance: Controller instance used per tile. Number of elements is - * based on num_of_h_tiles - * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is - * used instead of panel TE in cmd mode panels - */ -struct msm_display_info { - int intf_type; - uint32_t capabilities; - uint32_t num_of_h_tiles; - uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; - bool is_te_using_watchdog_timer; -}; - /* Commit/Event thread specific structure */ struct msm_drm_thread { struct drm_device *dev; From patchwork Thu Feb 17 03:53:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749326 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC316C433FE for ; Thu, 17 Feb 2022 03:54:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229598AbiBQDyS (ORCPT ); Wed, 16 Feb 2022 22:54:18 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:38852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229604AbiBQDyS (ORCPT ); Wed, 16 Feb 2022 22:54:18 -0500 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCC632A0D72 for ; Wed, 16 Feb 2022 19:54:04 -0800 (PST) Received: by mail-lf1-x134.google.com with SMTP id b9so7550692lfv.7 for ; Wed, 16 Feb 2022 19:54:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RR1N4aPEBsDSrMkYWyN5C+eYSYGI+wdfjT+eCdTVa9U=; b=YCnwYlAvZ7/nS7LPvTABXHKm53V4PGUIaIBxHLF2KydqNgd1nAQ5/A/0ok7TobG8G7 vycvAQ2fh6huKnrHhICiT1Tr+0jbqcR3OAY136hQ6ZN7CxDJM0j00WsU92y9gutn8GIA 8ssmV6+Z0V3E0oYO+RpOiP0rIHJ4PzEFmNd6r/4UjKqqjQuSNVaB1QqdT33fzYE/qChu SA4smIhHj5xlikPyBa88uVO7J+7Kkp13NlHB/WMO/p9jI1P2FcrDJ3TlMYLwqTvtRCjX r1PTXx+QfICidSWTpCskAyDeMc6KOzYa0S6xfc2KG/oVhXojtHmewRZIEM/IQLtEZ+GH ON3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RR1N4aPEBsDSrMkYWyN5C+eYSYGI+wdfjT+eCdTVa9U=; b=S2zIvVmqdOtswXuztVkSwSmEQR03JbVNnCvDgiy2UC1B1Ho+QZ7jrPPL+VsuZXUi1n bN8gsjn3wVNpd8U5aNJe7w3pUeBG2wmIyJSMhMHfv5ozZZP2vlFX0XhBpRihnmHrWfJB h6SI8MyLxLgEHmr+Ql+V4lRliKNdo6S2/9ztJ8HBCKZOUOtmv2v6qV6tJ22XNSoa1APL eVryHqbCizXJ0yI9zbCCyqlKmwZ4CdycgZ5KJiyOnQdvh/V3RHXFikWzxrNE4CFFRcNC smCZqcEjZDIsEz11Jt+CPVqpF4zXMM14NJKZAbUXhNPwNTI4/kKZSap/FWatRf41GAZw Mpjg== X-Gm-Message-State: AOAM530Jjn6Kd1y6F6W7J6P1TnHuII/z3kC7AAGyRacvTHPsWdoRPgyb U4rCYG/rZ68w0JK0sLCug4syIw== X-Google-Smtp-Source: ABdhPJwvDOrFkan8mJU6iOjEP4Ula3Yq8VzKbdfOkj1/0kZ4ERxGTv8HZPueJb+vInWTQNDwkvEhkw== X-Received: by 2002:a05:6512:3157:b0:443:6407:ea58 with SMTP id s23-20020a056512315700b004436407ea58mr768650lfi.81.1645070043080; Wed, 16 Feb 2022 19:54:03 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:02 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 3/7] drm/msm/dpu: remove msm_dp cached in dpu_encoder_virt Date: Thu, 17 Feb 2022 06:53:54 +0300 Message-Id: <20220217035358.465904-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Stop caching msm_dp instance in dpu_encoder_virt since it's not used now. Fixes: 8a3b4c17f863 ("drm/msm/dp: employ bridge mechanism for display enable and disable") Reviewed-by: Abhinav Kumar Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 02d0fae1c6dc..16ae0cccbbb1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -168,7 +168,6 @@ enum dpu_enc_rc_states { * @vsync_event_work: worker to handle vsync event for autorefresh * @topology: topology of the display * @idle_timeout: idle timeout duration in milliseconds - * @dp: msm_dp pointer, for DP encoders */ struct dpu_encoder_virt { struct drm_encoder base; @@ -207,8 +206,6 @@ struct dpu_encoder_virt { struct msm_display_topology topology; u32 idle_timeout; - - struct msm_dp *dp; }; #define to_dpu_encoder_virt(x) container_of(x, struct dpu_encoder_virt, base) @@ -2128,8 +2125,6 @@ int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, timer_setup(&dpu_enc->vsync_event_timer, dpu_encoder_vsync_event_handler, 0); - else if (disp_info->intf_type == DRM_MODE_ENCODER_TMDS) - dpu_enc->dp = priv->dp[disp_info->h_tile_instance[0]]; INIT_DELAYED_WORK(&dpu_enc->delayed_off_work, dpu_encoder_off_work); From patchwork Thu Feb 17 03:53:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749327 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44836C4332F for ; Thu, 17 Feb 2022 03:54:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233210AbiBQDyU (ORCPT ); Wed, 16 Feb 2022 22:54:20 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:38978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233203AbiBQDyT (ORCPT ); Wed, 16 Feb 2022 22:54:19 -0500 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 132E22A0D72 for ; Wed, 16 Feb 2022 19:54:06 -0800 (PST) Received: by mail-lf1-x12f.google.com with SMTP id g39so7543369lfv.10 for ; Wed, 16 Feb 2022 19:54:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TB5gV/5sjwk2KpDc6LqRsCf8QAe1Jc0ZykwfWMWBIy0=; b=NEkeyH1AK3AiRscVBVwxQydnYnI103BFdWInRv0N2AdXNqA53V2TwmqG+DjWxmhPX2 Zfy/AoF9vLVRDP0HvY/qXu/290VDBdfr+EO7pHabrNOFgotcQyBL48Bf3QXhpJ17aJOe EcDJY14VgmbnP42HhxA6GxR05FAm4A3ETm7EnxvkUIEGAS8BEN6SL3LHQ3ns101W6lqq oYZmIvxLJV0zDlRwH/EqnS+7dzmPp/uc0g4KMzGRUISQ/KSiKrsz6QRTbaCKBDENztZd 1umaFB6p2lkohTyg9PSGAyh7UfjLkpQGhgV1jLU8f/pYiKWQlm+dNtUBNocLmpIH+uXx AhOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TB5gV/5sjwk2KpDc6LqRsCf8QAe1Jc0ZykwfWMWBIy0=; b=cJSVYxGNSPjT+HTWnRRX5crI0y4cnSlKnLqwA/uMt/2ilRzRZMkTjOGtkzQS5wrBQz XqM0kaeScIgyD1lNJ6IXTkhe3b2sJJOwfNhpa7Hc+Pkfq/mlI41RXhv/HfQpEdJKtrsp spuyUdA5LeLZlXnPcsO+3SbGEqPQxnLFvn4uguijCKwO4m0AbN1WL+iZv0MGt0aEEaZA FbmtsCklkeOI3aqfQbPwLexXgNuPF8TP8SPffxLCohacg5aizO2JhXKyP8ATlQFxFMjC Is1nnHjUL7QLZoTlxW8zPWCa42nuzexj5JQzN1Wm9T8eCrEECniDv36OnwrTuAqY+vsp OmSQ== X-Gm-Message-State: AOAM531t8WT82zQbn4HIpNA+6mui08MofQSmo9qGzGCe09HPWCClrLFI IEjYdWDrkFBzm/RoAkAXANN8mg== X-Google-Smtp-Source: ABdhPJwtyA5gG/LksjFEdbfLRT1Nr6ZbF8L/cuqKCgPctlNiAUIq77doptloSxqL2BIN5sNaqxExIA== X-Received: by 2002:a05:6512:31cf:b0:443:7eb6:3440 with SMTP id j15-20020a05651231cf00b004437eb63440mr772193lfe.367.1645070043961; Wed, 16 Feb 2022 19:54:03 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:03 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 4/7] drm/msm/dpu: drop bus_scaling_client field Date: Thu, 17 Feb 2022 06:53:55 +0300 Message-Id: <20220217035358.465904-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We do not use MSM bus client, so drop bus_scaling_client field from dpu_encoder_virt. Reviewed-by: Abhinav Kumar Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 16ae0cccbbb1..f5bc15b2e56e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -127,7 +127,6 @@ enum dpu_enc_rc_states { * Virtual encoder registers itself with the DRM Framework as the encoder. * @base: drm_encoder base class for registration with DRM * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes - * @bus_scaling_client: Client handle to the bus scaling interface * @enabled: True if the encoder is active, protected by enc_lock * @num_phys_encs: Actual number of physical encoders contained. * @phys_encs: Container of physical encoders managed. @@ -172,7 +171,6 @@ enum dpu_enc_rc_states { struct dpu_encoder_virt { struct drm_encoder base; spinlock_t enc_spinlock; - uint32_t bus_scaling_client; bool enabled; From patchwork Thu Feb 17 03:53:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EDF6C433FE for ; Thu, 17 Feb 2022 03:54:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233219AbiBQDyY (ORCPT ); Wed, 16 Feb 2022 22:54:24 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:39190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233220AbiBQDyW (ORCPT ); Wed, 16 Feb 2022 22:54:22 -0500 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F4062A0D72 for ; Wed, 16 Feb 2022 19:54:07 -0800 (PST) Received: by mail-lj1-x22b.google.com with SMTP id t14so6348815ljh.8 for ; Wed, 16 Feb 2022 19:54:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LeHMkFoNMl5wbtqitgFOACM/7bfBhWBbMxRXA4GQO3c=; b=xDioYM+nRwpRvXfxQySDt5SdFQTGBo0mhX+hMfNRSjFUlxmIcFJBgc06uCvTNgCaG5 B3h66Uou9fIGxPMo7HyCPbgblIcWQMQaF19lmzr7KatsujdAqHOSehyAcilrOPbqfMy1 uA/I/5OPtdD5JY144Q9zebvyzW8GIOUQ12LIWttCDAzBmPMLXKiF1qumTDbOqVMbNg6/ 2At+UEGHcGbGQoFUYYaXoO61WBxO4tmmFePEl58tWdgAPXEU1VRDWLh/5r1Ni3SBGH8A OFjmUZPfKdRYBSO7qOPJYk5C44Mf9FPHMk1meyjqbcfWIwwK743Jn9HqW0cXUWnUq/wA 59pQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LeHMkFoNMl5wbtqitgFOACM/7bfBhWBbMxRXA4GQO3c=; b=DneHbW5epsGwdSc6fRHlzbbeU9mKluYs7oRh3pU9OKd1prnD14bNd4bDVb6VTQfQWl v0rV4AgZ8Zh+qZpubQ+LkxyL3GxglEJBE/2DYlvI9CPTHVfgVrPBeGud8g15cDGae9JR dteaMMLrRlfhTR30Bikbvg4iSDoyKiCVGWpbeBl+JFdeO/2VGdzJg5r6ExSM8PqHoz4Z iOKh9xw/fwmVwI8AaVgHlyk9/a2qVVgZlzQ6JA9fJ4ZH0vGJ9XEMJixf8AZB/ZLHBGvr Wbf6fSF/1RGZrT+uAclsFv7x7hKwcSfjOVXapVmz2E6ZIIHvgK09VRj7cI9RfZD0MEAL oDIA== X-Gm-Message-State: AOAM531+wY3kZUxcO3cJsTv0d3sYgmv2d1xhruvpZYjbhxiFMjS2Jp93 k8y8yjbmQ6GFwAB4W7BlIefSbQ== X-Google-Smtp-Source: ABdhPJz+PKWLqFzChp7jfA7jBHOX8xftiL3eCkcqveRWvqbvaS4l2FiOK0ZSwpn+PFkSIlveg2cc0A== X-Received: by 2002:a2e:3c04:0:b0:238:eb48:5fc8 with SMTP id j4-20020a2e3c04000000b00238eb485fc8mr895475lja.148.1645070044755; Wed, 16 Feb 2022 19:54:04 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:04 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 5/7] drm/msm/dpu: encoder: drop unused mode_fixup callback Date: Thu, 17 Feb 2022 06:53:56 +0300 Message-Id: <20220217035358.465904-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Both cmd and vid backends provide useless mode_fixup() callback. Drop it. Reviewed-by: Bjorn Andersson Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ---- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 4 ---- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 10 ---------- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 -------------- 4 files changed, 32 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index f5bc15b2e56e..5b2eeea37d54 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -602,10 +602,6 @@ static int dpu_encoder_virt_atomic_check( if (phys->ops.atomic_check) ret = phys->ops.atomic_check(phys, crtc_state, conn_state); - else if (phys->ops.mode_fixup) - if (!phys->ops.mode_fixup(phys, mode, adj_mode)) - ret = -EINVAL; - if (ret) { DPU_ERROR_ENC(dpu_enc, "mode unsupported, phys idx %d\n", i); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index e7270eb6b84b..7b14948c4c87 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -84,7 +84,6 @@ struct dpu_encoder_virt_ops { * @is_master: Whether this phys_enc is the current master * encoder. Can be switched at enable time. Based * on split_role and current mode (CMD/VID). - * @mode_fixup: DRM Call. Fixup a DRM mode. * @mode_set: DRM Call. Set a DRM mode. * This likely caches the mode, for use at enable. * @enable: DRM Call. Enable a DRM mode. @@ -117,9 +116,6 @@ struct dpu_encoder_phys_ops { struct dentry *debugfs_root); void (*prepare_commit)(struct dpu_encoder_phys *encoder); bool (*is_master)(struct dpu_encoder_phys *encoder); - bool (*mode_fixup)(struct dpu_encoder_phys *encoder, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); void (*mode_set)(struct dpu_encoder_phys *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 34a6940d12c5..45fe97fb612d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -45,15 +45,6 @@ static bool dpu_encoder_phys_cmd_is_master(struct dpu_encoder_phys *phys_enc) return (phys_enc->split_role != ENC_ROLE_SLAVE); } -static bool dpu_encoder_phys_cmd_mode_fixup( - struct dpu_encoder_phys *phys_enc, - const struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - DPU_DEBUG_CMDENC(to_dpu_encoder_phys_cmd(phys_enc), "\n"); - return true; -} - static void _dpu_encoder_phys_cmd_update_intf_cfg( struct dpu_encoder_phys *phys_enc) { @@ -732,7 +723,6 @@ static void dpu_encoder_phys_cmd_init_ops( ops->prepare_commit = dpu_encoder_phys_cmd_prepare_commit; ops->is_master = dpu_encoder_phys_cmd_is_master; ops->mode_set = dpu_encoder_phys_cmd_mode_set; - ops->mode_fixup = dpu_encoder_phys_cmd_mode_fixup; ops->enable = dpu_encoder_phys_cmd_enable; ops->disable = dpu_encoder_phys_cmd_disable; ops->destroy = dpu_encoder_phys_cmd_destroy; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index ddd9d89cd456..1831fe37c88c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -225,19 +225,6 @@ static void programmable_fetch_config(struct dpu_encoder_phys *phys_enc, spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); } -static bool dpu_encoder_phys_vid_mode_fixup( - struct dpu_encoder_phys *phys_enc, - const struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - DPU_DEBUG_VIDENC(phys_enc, "\n"); - - /* - * Modifying mode has consequences when the mode comes back to us - */ - return true; -} - static void dpu_encoder_phys_vid_setup_timing_engine( struct dpu_encoder_phys *phys_enc) { @@ -676,7 +663,6 @@ static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops) { ops->is_master = dpu_encoder_phys_vid_is_master; ops->mode_set = dpu_encoder_phys_vid_mode_set; - ops->mode_fixup = dpu_encoder_phys_vid_mode_fixup; ops->enable = dpu_encoder_phys_vid_enable; ops->disable = dpu_encoder_phys_vid_disable; ops->destroy = dpu_encoder_phys_vid_destroy; From patchwork Thu Feb 17 03:53:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6340C4332F for ; Thu, 17 Feb 2022 03:54:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233234AbiBQDyY (ORCPT ); Wed, 16 Feb 2022 22:54:24 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:39220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233203AbiBQDyW (ORCPT ); Wed, 16 Feb 2022 22:54:22 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44B3C2A22A4 for ; Wed, 16 Feb 2022 19:54:08 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id g39so7543442lfv.10 for ; Wed, 16 Feb 2022 19:54:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YsUUu5BvoJNRI6RGzauZ8dUCGqmoZlgd2cuYyPZSuuo=; b=l8wJRykiNIfm33vrkQZTVrnWzsapuUXU9j/oX4jKf2rmddED6IEDRo6FyBCmcNj2/k KtQ3R1OqOYqsH3TWfO8uVyX8emrAwU6dt7H2xpP5JHO0ekUiL7LSf2CUm6CE06ZdtXjm 3K2HM3orUL/ahC/MUSVWRBgBj0XHQdQMAovdUifhAiyK9FcmE1F+fT/XaaJILJF+aLnP ftXCRcXi1L8rOPRDKam94f5OgqE2epHheHc48Bhl2acaIIHesufyBGwlny41/ajLdApW 2eOOdJbkUOjORvju2l0HKkA3ErS7Gecqq34gRYG3JW7kJVlotLHT2A72ReDA1CvwUpqZ NXiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YsUUu5BvoJNRI6RGzauZ8dUCGqmoZlgd2cuYyPZSuuo=; b=vog1w5W4I3Zj9sXhXIx5bjFSk/lIZxHdCF4roownWNLFPEp3Fbb8yTMRjbV1XitEuC UQIcnOtNXcSvNTrtXwby1GZP66D9fpeOHaocGyjnqklGzse2K1dADWFU5RG7tLlkxrL1 9NYbAnU4awXVdeEdIRs/4l42MUAIFdfkRjYUtCNp12qF5zMqzkCDxGEkhtAtJ19ENLtA GfAUbqFb2CHWjft8GMyCcTg2LXaPFVG6UOLm3EyGs36LgcAuiGlQHXj+8xxK0/OndR8/ f13ImjQFIZ2KPxOdQB+LhLspFe3yS1WmCX/HSZ1E9aKJ3fEdjIBhQ2TOm2oMfr0BIxFU n1hA== X-Gm-Message-State: AOAM531KnCDdIjmzhzpQVfoR3gqDU2EucM3C7XbvuipayRU2fEV25bHM ys+um1c1dosWe40+32jKuguV1Q== X-Google-Smtp-Source: ABdhPJzYbOw79uWenHEiWIZKhFaAmLRO4B0WdipbYwpS8Mfv+pgIa8bMQ8Nk4iR9X6KvG/UIq0wi+A== X-Received: by 2002:ac2:58d8:0:b0:442:bc4b:afb7 with SMTP id u24-20020ac258d8000000b00442bc4bafb7mr752514lfo.99.1645070045525; Wed, 16 Feb 2022 19:54:05 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:05 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 6/7] drm/msm/dpu: switch dpu_encoder to use atomic_mode_set Date: Thu, 17 Feb 2022 06:53:57 +0300 Message-Id: <20220217035358.465904-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Make dpu_encoder use atomic_mode_set to receive connector and CRTC states as arguments rather than finding connector and CRTC by manually looping through the respective lists. Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 37 +++++-------------- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 8 ++-- .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 18 ++------- .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 ++----- 4 files changed, 21 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 5b2eeea37d54..a8c9f5a4dd67 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -947,16 +947,13 @@ static int dpu_encoder_resource_control(struct drm_encoder *drm_enc, return 0; } -static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) +static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) { struct dpu_encoder_virt *dpu_enc; struct msm_drm_private *priv; struct dpu_kms *dpu_kms; - struct list_head *connector_list; - struct drm_connector *conn = NULL, *conn_iter; - struct drm_crtc *drm_crtc; struct dpu_crtc_state *cstate; struct dpu_global_state *global_state; struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC]; @@ -976,7 +973,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, priv = drm_enc->dev->dev_private; dpu_kms = to_dpu_kms(priv->kms); - connector_list = &dpu_kms->dev->mode_config.connector_list; global_state = dpu_kms_get_existing_global_state(dpu_kms); if (IS_ERR_OR_NULL(global_state)) { @@ -986,22 +982,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, trace_dpu_enc_mode_set(DRMID(drm_enc)); - list_for_each_entry(conn_iter, connector_list, head) - if (conn_iter->encoder == drm_enc) - conn = conn_iter; - - if (!conn) { - DPU_ERROR_ENC(dpu_enc, "failed to find attached connector\n"); - return; - } else if (!conn->state) { - DPU_ERROR_ENC(dpu_enc, "invalid connector state\n"); - return; - } - - drm_for_each_crtc(drm_crtc, drm_enc->dev) - if (drm_crtc->state->encoder_mask & drm_encoder_mask(drm_enc)) - break; - /* Query resource that have been reserved in atomic check step. */ num_pp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, drm_enc->base.id, DPU_HW_BLK_PINGPONG, hw_pp, @@ -1018,7 +998,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i]) : NULL; - cstate = to_dpu_crtc_state(drm_crtc->state); + cstate = to_dpu_crtc_state(crtc_state); for (i = 0; i < num_lm; i++) { int ctl_idx = (i < num_ctl) ? i : (num_ctl-1); @@ -1067,9 +1047,10 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, return; } - phys->connector = conn->state->connector; - if (phys->ops.mode_set) - phys->ops.mode_set(phys, mode, adj_mode); + phys->connector = conn_state->connector; + phys->cached_mode = crtc_state->adjusted_mode; + if (phys->ops.atomic_mode_set) + phys->ops.atomic_mode_set(phys, crtc_state, conn_state); } } @@ -2084,7 +2065,7 @@ static void dpu_encoder_frame_done_timeout(struct timer_list *t) } static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = { - .mode_set = dpu_encoder_virt_mode_set, + .atomic_mode_set = dpu_encoder_virt_atomic_mode_set, .disable = dpu_encoder_virt_disable, .enable = dpu_encoder_virt_enable, .atomic_check = dpu_encoder_virt_atomic_check, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 7b14948c4c87..6309c5e30d20 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -84,7 +84,7 @@ struct dpu_encoder_virt_ops { * @is_master: Whether this phys_enc is the current master * encoder. Can be switched at enable time. Based * on split_role and current mode (CMD/VID). - * @mode_set: DRM Call. Set a DRM mode. + * @atomic_mode_set: DRM Call. Set a DRM mode. * This likely caches the mode, for use at enable. * @enable: DRM Call. Enable a DRM mode. * @disable: DRM Call. Disable mode. @@ -116,9 +116,9 @@ struct dpu_encoder_phys_ops { struct dentry *debugfs_root); void (*prepare_commit)(struct dpu_encoder_phys *encoder); bool (*is_master)(struct dpu_encoder_phys *encoder); - void (*mode_set)(struct dpu_encoder_phys *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); + void (*atomic_mode_set)(struct dpu_encoder_phys *encoder, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state); void (*enable)(struct dpu_encoder_phys *encoder); void (*disable)(struct dpu_encoder_phys *encoder); int (*atomic_check)(struct dpu_encoder_phys *encoder, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 45fe97fb612d..6de298d521ce 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -135,23 +135,13 @@ static void dpu_encoder_phys_cmd_underrun_irq(void *arg, int irq_idx) phys_enc); } -static void dpu_encoder_phys_cmd_mode_set( +static void dpu_encoder_phys_cmd_atomic_mode_set( struct dpu_encoder_phys *phys_enc, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) { - struct dpu_encoder_phys_cmd *cmd_enc = - to_dpu_encoder_phys_cmd(phys_enc); struct dpu_encoder_irq *irq; - if (!mode || !adj_mode) { - DPU_ERROR("invalid args\n"); - return; - } - phys_enc->cached_mode = *adj_mode; - DPU_DEBUG_CMDENC(cmd_enc, "caching mode:\n"); - drm_mode_debug_printmodeline(adj_mode); - irq = &phys_enc->irq[INTR_IDX_CTL_START]; irq->irq_idx = phys_enc->hw_ctl->caps->intr_start; @@ -722,7 +712,7 @@ static void dpu_encoder_phys_cmd_init_ops( { ops->prepare_commit = dpu_encoder_phys_cmd_prepare_commit; ops->is_master = dpu_encoder_phys_cmd_is_master; - ops->mode_set = dpu_encoder_phys_cmd_mode_set; + ops->atomic_mode_set = dpu_encoder_phys_cmd_atomic_mode_set; ops->enable = dpu_encoder_phys_cmd_enable; ops->disable = dpu_encoder_phys_cmd_disable; ops->destroy = dpu_encoder_phys_cmd_destroy; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 1831fe37c88c..0c07db5021eb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -348,19 +348,13 @@ static bool dpu_encoder_phys_vid_needs_single_flush( return phys_enc->split_role != ENC_ROLE_SOLO; } -static void dpu_encoder_phys_vid_mode_set( +static void dpu_encoder_phys_vid_atomic_mode_set( struct dpu_encoder_phys *phys_enc, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) { struct dpu_encoder_irq *irq; - if (adj_mode) { - phys_enc->cached_mode = *adj_mode; - drm_mode_debug_printmodeline(adj_mode); - DPU_DEBUG_VIDENC(phys_enc, "caching mode:\n"); - } - irq = &phys_enc->irq[INTR_IDX_VSYNC]; irq->irq_idx = phys_enc->hw_intf->cap->intr_vsync; @@ -662,7 +656,7 @@ static int dpu_encoder_phys_vid_get_frame_count( static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops) { ops->is_master = dpu_encoder_phys_vid_is_master; - ops->mode_set = dpu_encoder_phys_vid_mode_set; + ops->atomic_mode_set = dpu_encoder_phys_vid_atomic_mode_set; ops->enable = dpu_encoder_phys_vid_enable; ops->disable = dpu_encoder_phys_vid_disable; ops->destroy = dpu_encoder_phys_vid_destroy; From patchwork Thu Feb 17 03:53:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12749331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 589E1C43217 for ; Thu, 17 Feb 2022 03:54:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233203AbiBQDyZ (ORCPT ); Wed, 16 Feb 2022 22:54:25 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:39396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233220AbiBQDyY (ORCPT ); Wed, 16 Feb 2022 22:54:24 -0500 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1EED62A22AA for ; Wed, 16 Feb 2022 19:54:09 -0800 (PST) Received: by mail-lf1-x12b.google.com with SMTP id d23so7511868lfv.13 for ; Wed, 16 Feb 2022 19:54:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xedxWSvx9ArNTGyT36JcyEF8rqvDUNlS4BZYi2FfR8w=; b=rVZE9qBJZLndJhlNOKlLZzK62wUYGptsMSkrLS+NeMLGQIIQqeJmvJ+O4UqFAPISYO 7kd550UaHIzijTAPvJ1yUcOeUkXT9uI4LOdTdBdphKvTnQuKzez8knxMWAT0lJYwVGmi tBwVt2REaCirHL1qVixNbTznBuxiwE1bd7Z5/bJVKhiS4gjMgOnoOiA6SVCQEvwwYfOH 4OiZRN/X+7vaZ7C40KmtArWt718BYiLy28tH1ccRNhjDQGfQ7rhCMMAOHkFJQjJWnzbY 2nInpAuMxtnS64Op02a993VpoW+UKQCu3QXaFU3LvCiPPYhfd5RthqjMqZ0qsKXhcepr g+7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xedxWSvx9ArNTGyT36JcyEF8rqvDUNlS4BZYi2FfR8w=; b=L4OOpNnmk6RZFZIZ+Zd4YWb2q8cmsNeqI0DdhypH+3/M8Bh8jVb5hBVfHz+sUizrtv 2+PUtBwtM01EQZMGQX/e/1ngPBq0/XpOMNoxxacIS3W3xiHEtSs6z2e7Lw0I+lLNukjR obGPIoflPqOMYfogMwuo4gc7m1pKwVc8IllPcWVeiJ50pHuor9genuQL5f7jBEcD/24P kX0iBHqrJg5dJoOfQLqX3+AoCvVWIVyWh3tjnAXneODlMp+ixL/PfLfTwyil5XTKj3V7 jkVSOE8OUXV1aB/5jV2haL33xcJYM9ksvouvhfLGmouC4r3kxgRsgJis08CJ7JDJ7ML4 xgUA== X-Gm-Message-State: AOAM5328RoBvUDHMyYp6j9572tHIt9ejQVHx1poOMZRAlB8OGiqOq8+K DV6KqYKGDFRqr74CF+c8VDIYRw== X-Google-Smtp-Source: ABdhPJwWetsx1UaiDYt5MGZF+Lw/m7+9qt6Fs5IFrgZVbVyCRbPSBs1EwLfO/diZE5O9YSKcH1F0GQ== X-Received: by 2002:a05:6512:104f:b0:443:15b3:ba57 with SMTP id c15-20020a056512104f00b0044315b3ba57mr825472lfb.239.1645070046318; Wed, 16 Feb 2022 19:54:06 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id h9sm1575454ljb.77.2022.02.16.19.54.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Feb 2022 19:54:05 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 7/7] drm/msm/dpu: pull connector from dpu_encoder_phys to dpu_encoder_virt Date: Thu, 17 Feb 2022 06:53:58 +0300 Message-Id: <20220217035358.465904-8-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> References: <20220217035358.465904-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org All physical encoders used by virtual encoder share the same connector, so pull the connector field from dpu_encoder_phys into dpu_encoder_virt structure. Otherwise code suggests that different phys_encs can have different connectors. Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 -- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index a8c9f5a4dd67..b23f12eb0e0e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -143,6 +143,7 @@ enum dpu_enc_rc_states { * link between encoder/crtc. However in this case we need * to track crtc in the disable() hook which is called * _after_ encoder_mask is cleared. + * @connector: If a mode is set, cached pointer to the active connector * @crtc_kickoff_cb: Callback into CRTC that will flush & start * all CTL paths * @crtc_kickoff_cb_data: Opaque user data given to crtc_kickoff_cb @@ -183,6 +184,7 @@ struct dpu_encoder_virt { bool intfs_swapped; struct drm_crtc *crtc; + struct drm_connector *connector; struct dentry *debugfs_root; struct mutex enc_lock; @@ -1010,6 +1012,8 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, cstate->num_mixers = num_lm; + dpu_enc->connector = conn_state->connector; + for (i = 0; i < dpu_enc->num_phys_encs; i++) { int num_blk; struct dpu_hw_blk *hw_blk[MAX_CHANNELS_PER_ENC]; @@ -1047,7 +1051,6 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, return; } - phys->connector = conn_state->connector; phys->cached_mode = crtc_state->adjusted_mode; if (phys->ops.atomic_mode_set) phys->ops.atomic_mode_set(phys, crtc_state, conn_state); @@ -1081,7 +1084,7 @@ static void _dpu_encoder_virt_enable_helper(struct drm_encoder *drm_enc) if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI && !WARN_ON(dpu_enc->num_phys_encs == 0)) { - unsigned bpc = dpu_enc->phys_encs[0]->connector->display_info.bpc; + unsigned bpc = dpu_enc->connector->display_info.bpc; for (i = 0; i < MAX_CHANNELS_PER_ENC; i++) { if (!dpu_enc->hw_pp[i]) continue; @@ -1185,9 +1188,7 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_STOP); - for (i = 0; i < dpu_enc->num_phys_encs; i++) { - dpu_enc->phys_encs[i]->connector = NULL; - } + dpu_enc->connector = NULL; DPU_DEBUG_ENC(dpu_enc, "encoder disabled\n"); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 6309c5e30d20..43ce56109c41 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -178,7 +178,6 @@ struct dpu_encoder_irq { * tied to a specific panel / sub-panel. Abstract type, sub-classed by * phys_vid or phys_cmd for video mode or command mode encs respectively. * @parent: Pointer to the containing virtual encoder - * @connector: If a mode is set, cached pointer to the active connector * @ops: Operations exposed to the virtual encoder * @parent_ops: Callbacks exposed by the parent to the phys_enc * @hw_mdptop: Hardware interface to the top registers @@ -207,7 +206,6 @@ struct dpu_encoder_irq { */ struct dpu_encoder_phys { struct drm_encoder *parent; - struct drm_connector *connector; struct dpu_encoder_phys_ops ops; const struct dpu_encoder_virt_ops *parent_ops; struct dpu_hw_mdp *hw_mdptop;