From patchwork Fri Feb 18 18:12:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751712 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 972ACC4167B for ; Fri, 18 Feb 2022 18:12:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239011AbiBRSMw (ORCPT ); Fri, 18 Feb 2022 13:12:52 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239010AbiBRSMw (ORCPT ); Fri, 18 Feb 2022 13:12:52 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1946836300; Fri, 18 Feb 2022 10:12:33 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id D612020003; Fri, 18 Feb 2022 18:12:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207950; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EGwulRQWUdeID+R0ltPV+hvVeG6IiTvELdB/8Uiez8g=; b=fMvtuvzDTQhJpik9Y3P03fMAIWHf+3oSPDDqzrvFd9cWhkXN1WB/7vhONcNwSb8h76PHKW Jj3YsSSiQOPVZSlnwdA6XtKv/H7AefRCSnItsBGtvtcein7WhM1qSMecGcbL/cnjX2pQJd 6p+Ns04xgUddG1qBtBcZv5rafOAMHkF+P6tye8HOSqV1yqdTDe4C4qp67n43tsMyzoNGYh 3yTVAmuEvvVs6cTRMjpfkY8KFVbUvo/jns/bfgX7rZ+zQPoYyc82eo9kf0WNI7acKhMROA gbml0rUJqR/4mwK66e/djDRIKvaZCltAxvTeoSkkB+xiij4fOoEgbXx4FIjcXQ== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 1/8] dt-bindings: dma: Introduce RZN1 dmamux bindings Date: Fri, 18 Feb 2022 19:12:19 +0100 Message-Id: <20220218181226.431098-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal --- .../bindings/dma/renesas,rzn1-dmamux.yaml | 42 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml new file mode 100644 index 000000000000..e2c82e43b8b1 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 DMA mux + +maintainers: + - Miquel Raynal + +allOf: + - $ref: "dma-router.yaml#" + +properties: + compatible: + const: renesas,rzn1-dmamux + + '#dma-cells': + const: 6 + description: + The first four cells are dedicated to the master DMA controller. The fifth + cell gives the DMA mux bit index that must be set starting from 0. The + sixth cell gives the binary value that must be written there, ie. 0 or 1. + + dma-masters: + minItems: 1 + maxItems: 2 + + dma-requests: + const: 32 + +additionalProperties: false + +examples: + - | + dma-router { + compatible = "renesas,rzn1-dmamux"; + #dma-cells = <6>; + dma-masters = <&dma0 &dma1>; + dma-requests = <32>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..c70c9c39a2f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18636,6 +18636,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h From patchwork Fri Feb 18 18:12:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751711 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1372C43219 for ; Fri, 18 Feb 2022 18:12:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239009AbiBRSMv (ORCPT ); Fri, 18 Feb 2022 13:12:51 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235805AbiBRSMv (ORCPT ); Fri, 18 Feb 2022 13:12:51 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8FCF36149; Fri, 18 Feb 2022 10:12:33 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 9AA482000A; Fri, 18 Feb 2022 18:12:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207952; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=sDtK9hjDeoaFWuwGcjB8l+ZpHGIK6PdXu+t6v6YSX+I=; b=nI4sDrdfSrUYVO5GV1lR8ZVV13TVVsWsKvQ2I+3QOsyx6bJ2gj0UxsVEOIdX3ksAwe4fVo VSQ3XJ84IY7Xgsf2Vz14iezvw3Gx2ehxDCovGMXgCwnc2ixVOhd98HDkaXE/Ci1c9QGoc4 Oqoc+hvG5is/jhSn3+I1/rOE+mF3T7biqb9xtku+0I9jYrrDTDsU+4Xspqf9md5ouzvaeg XNELQnv2PanFFbkZBSpqs/fZ+kr2EW9mR+eSWFI+0j3Lg5rdaMkRhZa06ay06e7FzLqQKk rFUIhjjTT7vZ5OBEP/N3Zhm8MZ54wpyZXHXPsEmpTiDNzcKjzxuZSYqnI0QmuA== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 2/8] dt-bindings: dma: Introduce RZN1 DMA compatible Date: Fri, 18 Feb 2022 19:12:20 +0100 Message-Id: <20220218181226.431098-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Just like for the NAND controller that is also on this SoC, let's provide a SoC generic and a more specific couple of compatibles. Signed-off-by: Miquel Raynal --- .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 6b35089ac017..c2e2dc637e0a 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -15,7 +15,13 @@ allOf: properties: compatible: - const: snps,dma-spear1340 + oneOf: + - const: snps,dma-spear1340 + - items: + - enum: + - renesas,r9a06g032-nandc + - const: renesas,rzn1-nandc + "#dma-cells": minimum: 3 From patchwork Fri Feb 18 18:12:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C474C46467 for ; Fri, 18 Feb 2022 18:12:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239010AbiBRSMy (ORCPT ); Fri, 18 Feb 2022 13:12:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239016AbiBRSMx (ORCPT ); Fri, 18 Feb 2022 13:12:53 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5EA4035DFC; Fri, 18 Feb 2022 10:12:35 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 6003D2000D; Fri, 18 Feb 2022 18:12:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207953; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/WsRY6Xgen9o25djTmhqLF7wHC9LXU0mBjNpNId5xwA=; b=JL/j8o9rnrcnJYOqKSTtcfAornE56vALLZ60MibNyu+cwdKSUQ/DR3ijR+yLS4ErCkA91T Yn7QMQG4Y3xzyaebKDdKAgCzH44tJyGyIzFxj14NPt1TTqfVW6YNExwNIR/kDbjh+eztpr OrxLFoCFqFMp8jog4X0MpUYFDNq+g4uDPgwR3bzYQDOFyHiFCtGgmF0GgvEy9fsBUq17Xf ji/OG+jUHMh9DYR1Cf3KhZGsIANa83orc28sMlPgI3EnBi1I8bpD4DdPId8Hy6Z1i+R7Qb sDl8Wie9W66UcoU31ldFR4YX1aL+eFAN83KdzVT2CdZt/H6WpLxB3EluUrwb7g== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 3/8] soc: renesas: rzn1-sysc: Export function to set dmamux Date: Fri, 18 Feb 2022 19:12:21 +0100 Message-Id: <20220218181226.431098-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal Reported-by: kernel test robot Reported-by: kernel test robot --- drivers/clk/renesas/r9a06g032-clocks.c | 27 +++++++++++++++++++ include/dt-bindings/clock/r9a06g032-sysctrl.h | 2 ++ include/linux/soc/renesas/r9a06g032-syscon.h | 11 ++++++++ 3 files changed, 40 insertions(+) create mode 100644 include/linux/soc/renesas/r9a06g032-syscon.h diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..3bca60fac21c 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -315,6 +315,27 @@ struct r9a06g032_priv { void __iomem *reg; }; +/* Exported helper to access the DMAMUX register */ +static struct r9a06g032_priv *syscon_priv; +int r9a06g032_syscon_set_dmamux(u32 mask, u32 val) +{ + u32 dmamux; + + if (!syscon_priv) + return -EPROBE_DEFER; + + spin_lock(&syscon_priv->lock); + + dmamux = readl(syscon_priv->reg + R9A06G032_SYSCON_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, syscon_priv->reg + R9A06G032_SYSCON_DMAMUX); + + spin_unlock(&syscon_priv->lock); + + return 0; +} + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -922,6 +943,12 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) clocks->reg = of_iomap(np, 0); if (WARN_ON(!clocks->reg)) return -ENOMEM; + + if (syscon_priv) + return -EBUSY; + + syscon_priv = clocks; + for (i = 0; i < ARRAY_SIZE(r9a06g032_clocks); ++i) { const struct r9a06g032_clkdesc *d = &r9a06g032_clocks[i]; const char *parent_name = d->source ? diff --git a/include/dt-bindings/clock/r9a06g032-sysctrl.h b/include/dt-bindings/clock/r9a06g032-sysctrl.h index 90c0f3dc1ba1..609e7fe8fcb1 100644 --- a/include/dt-bindings/clock/r9a06g032-sysctrl.h +++ b/include/dt-bindings/clock/r9a06g032-sysctrl.h @@ -145,4 +145,6 @@ #define R9A06G032_CLK_UART6 152 #define R9A06G032_CLK_UART7 153 +#define R9A06G032_SYSCON_DMAMUX 0xA0 + #endif /* __DT_BINDINGS_R9A06G032_SYSCTRL_H__ */ diff --git a/include/linux/soc/renesas/r9a06g032-syscon.h b/include/linux/soc/renesas/r9a06g032-syscon.h new file mode 100644 index 000000000000..d97e0e91cc6a --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-syscon.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCON_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCON_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_syscon_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_syscon_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCON_H__ */ From patchwork Fri Feb 18 18:12:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751714 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 256FBC433FE for ; Fri, 18 Feb 2022 18:12:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239020AbiBRSNA (ORCPT ); Fri, 18 Feb 2022 13:13:00 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239023AbiBRSM6 (ORCPT ); Fri, 18 Feb 2022 13:12:58 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3086B35DFC; Fri, 18 Feb 2022 10:12:39 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 1F65820004; Fri, 18 Feb 2022 18:12:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207955; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IC8lFvXRL1fNo+5ENEfO2RVo3H7nGIfCsrQqrZ/74nk=; b=jHPHZivsTTsI1vnJ/i/p0Kt78pXiE0v1bZ4Vv3TVpTe/Yd2cyWiZHY9gdFv+AFdRWQzJna FBmqbnPbQOy8SXH19jsFNqRG6FcfVO0Qq5Wt3b3gQL5ZnRwjbp6KTiXY6cOn52W4MPu5Uh Du2f6+boFc4x5F9p5hEqCam5WwHi49CUxcU75xV+rkmBD0Dm6w8u36TS4GHhtSIzbf1PMK PAlfYunut5SR5yTNUtoQVS8tpRiQuCyQE8J3goPLm39Uh0w+XjoIJu8Tqx+HRUYyjUP/zK iiflf5w6cuwHXJe9bK8UCqHr9d3I4fahprv9s526TXWa4//O/sudL9kow1DX1w== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 4/8] dma: dmamux: Introduce RZN1 DMA router support Date: Fri, 18 Feb 2022 19:12:22 +0100 Message-Id: <20220218181226.431098-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Signed-off-by: Miquel Raynal Reported-by: kernel test robot Reported-by: kernel test robot --- drivers/dma/dw/Makefile | 2 +- drivers/dma/dw/dmamux.c | 175 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 176 insertions(+), 1 deletion(-) create mode 100644 drivers/dma/dw/dmamux.c diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile index a6f358ad8591..d8cfbf36b381 100644 --- a/drivers/dma/dw/Makefile +++ b/drivers/dma/dw/Makefile @@ -4,7 +4,7 @@ dw_dmac_core-y := core.o dw.o idma32.o dw_dmac_core-$(CONFIG_ACPI) += acpi.o obj-$(CONFIG_DW_DMAC) += dw_dmac.o -dw_dmac-y := platform.o +dw_dmac-y := platform.o dmamux.o dw_dmac-$(CONFIG_OF) += of.o obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o diff --git a/drivers/dma/dw/dmamux.c b/drivers/dma/dw/dmamux.c new file mode 100644 index 000000000000..30de776f195e --- /dev/null +++ b/drivers/dma/dw/dmamux.c @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Schneider-Electric + * Author: Miquel Raynal + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RZN1_DMAMUX_LINES 64 + +struct rzn1_dmamux_data { + struct dma_router dmarouter; + unsigned int dmac_requests; + unsigned int dmamux_requests; + u32 used_chans; + struct mutex lock; +}; + +struct rzn1_dmamux_map { + unsigned int req_idx; +}; + +static void rzn1_dmamux_free(struct device *dev, void *route_data) +{ + struct rzn1_dmamux_data *dmamux = dev_get_drvdata(dev); + struct rzn1_dmamux_map *map = route_data; + + dev_dbg(dev, "Unmapping DMAMUX request %u\n", map->req_idx); + + mutex_lock(&dmamux->lock); + dmamux->used_chans &= ~BIT(map->req_idx); + mutex_unlock(&dmamux->lock); + + kfree(map); +} + +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct rzn1_dmamux_map *map; + unsigned int master, chan, val; + int ret; + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + if (dma_spec->args_count != 6) + return ERR_PTR(-EINVAL); + + chan = dma_spec->args[0]; + map->req_idx = dma_spec->args[4]; + val = dma_spec->args[5]; + dma_spec->args_count -= 2; + + if (chan >= dmamux->dmac_requests) { + dev_err(&pdev->dev, "Invalid DMA request line: %d\n", chan); + return ERR_PTR(-EINVAL); + } + + if (map->req_idx >= dmamux->dmamux_requests || + map->req_idx % dmamux->dmac_requests != chan) { + dev_err(&pdev->dev, "Invalid MUX request line: %d\n", map->req_idx); + return ERR_PTR(-EINVAL); + } + + /* The of_node_put() will be done in the core for the node */ + master = map->req_idx < dmamux->dmac_requests ? 0 : 1; + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", master); + if (!dma_spec->np) { + dev_err(&pdev->dev, "Can't get DMA master\n"); + return ERR_PTR(-EINVAL); + } + + dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n", + map->req_idx, master, chan); + + mutex_lock(&dmamux->lock); + dmamux->used_chans |= BIT(map->req_idx); + ret = r9a06g032_syscon_set_dmamux(BIT(map->req_idx), + val ? BIT(map->req_idx) : 0); + mutex_unlock(&dmamux->lock); + if (ret) { + rzn1_dmamux_free(&pdev->dev, map); + return ERR_PTR(ret); + } + + return map; +} + +static const struct of_device_id rzn1_dmac_match[] __maybe_unused = { + { .compatible = "renesas,rzn1-dma", }, + {}, +}; + +static int rzn1_dmamux_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + const struct of_device_id *match; + struct device_node *dmac_node; + struct rzn1_dmamux_data *dmamux; + + if (!node) + return -ENODEV; + + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); + if (!dmamux) + return -ENOMEM; + + mutex_init(&dmamux->lock); + + dmac_node = of_parse_phandle(node, "dma-masters", 0); + if (!dmac_node) { + dev_err(&pdev->dev, "Can't get DMA master node\n"); + return -ENODEV; + } + + match = of_match_node(rzn1_dmac_match, dmac_node); + if (!match) { + dev_err(&pdev->dev, "DMA master is not supported\n"); + of_node_put(dmac_node); + return -EINVAL; + } + + if (of_property_read_u32(dmac_node, "dma-requests", + &dmamux->dmac_requests)) { + dev_err(&pdev->dev, "Missing DMAC requests information\n"); + of_node_put(dmac_node); + return -EINVAL; + } + of_node_put(dmac_node); + + if (of_property_read_u32(node, "dma-requests", + &dmamux->dmamux_requests)) { + dev_err(&pdev->dev, "Missing DMA mux requests information\n"); + return -EINVAL; + } + + dmamux->dmarouter.dev = &pdev->dev; + dmamux->dmarouter.route_free = rzn1_dmamux_free; + + platform_set_drvdata(pdev, dmamux); + + return of_dma_router_register(node, rzn1_dmamux_route_allocate, + &dmamux->dmarouter); +} + +static const struct of_device_id rzn1_dmamux_match[] = { + { .compatible = "renesas,rzn1-dmamux", }, + {}, +}; + +static struct platform_driver rzn1_dmamux_driver = { + .driver = { + .name = "renesas,rzn1-dmamux", + .of_match_table = rzn1_dmamux_match, + }, + .probe = rzn1_dmamux_probe, +}; + +static int rzn1_dmamux_init(void) +{ + return platform_driver_register(&rzn1_dmamux_driver); +} +arch_initcall(rzn1_dmamux_init); From patchwork Fri Feb 18 18:12:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D84CC4321E for ; Fri, 18 Feb 2022 18:12:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239023AbiBRSNA (ORCPT ); Fri, 18 Feb 2022 13:13:00 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239026AbiBRSM7 (ORCPT ); Fri, 18 Feb 2022 13:12:59 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 109293630E; Fri, 18 Feb 2022 10:12:41 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id EC4D720007; Fri, 18 Feb 2022 18:12:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207958; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pO+KRyzg9QXvLLS1vxx5wuXMcb4+oWxgonKkd1sluA4=; b=Kgo34du3V2GiYduH6vpZpZRUPe8x5/MPmUYTpGwmr592Ufn1FM1TGvEsqyMvn5ETgEpNYF IgHIJV22opL8fGAkmxcfn3jTZpLUwHR31tGDv6tVqDgS7DUjSo9/oz9+EdCY6lKtz1nClS cAD+if4ba9fD+faeKJJTV7SkaRO1iE+pATDmBhWxlsPbSKe+Z7vNLmk6sEEuFBUiRuJwca R4NfWpZg+srzG7L3GnZmX41ZBV9mA5/NR13u+d3pHMAh3yVUM1IyYkzL0DIVs3dkVAzhga jYH/hDVps0lHxS1s0PpDpyt1X4cOBgKzY6GY8s0R74YYvLOMeETnjK1N/t0G4g== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Phil Edworthy , Miquel Raynal Subject: [PATCH 5/8] dma: dw: Avoid partial transfers Date: Fri, 18 Feb 2022 19:12:23 +0100 Message-Id: <20220218181226.431098-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org From: Phil Edworthy Pausing a partial transfer only causes data to be written to mem that is a multiple of the memory width setting. However, when a DMA client driver finishes DMA early, e.g. due to UART char timeout interrupt, all data read from the DEV must be written to MEM. Therefore, allow the slave to limit the memory width to ensure all data read from the DEV is written to MEM when DMA is paused. Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/dma/dw/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 7ab83fe601ed..48cdefe997f1 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -705,6 +705,9 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_P2M) : DWC_CTLL_FC(DW_DMA_FC_D_P2M); + if (sconfig->dst_addr_width && sconfig->dst_addr_width < data_width) + data_width = sconfig->dst_addr_width; + for_each_sg(sgl, sg, sg_len, i) { struct dw_desc *desc; u32 len, mem; From patchwork Fri Feb 18 18:12:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751716 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30BB1C41535 for ; Fri, 18 Feb 2022 18:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239025AbiBRSNC (ORCPT ); Fri, 18 Feb 2022 13:13:02 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239026AbiBRSNB (ORCPT ); Fri, 18 Feb 2022 13:13:01 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81CF436149; Fri, 18 Feb 2022 10:12:43 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 38E4020009; Fri, 18 Feb 2022 18:12:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207959; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GICbYbueSRfZD71SRVOSQS8vJpvhSm39Cdy68XtQVcw=; b=PqbhnTDyXYmk52Hr8UjUs1d9E1ztPq4ANRxmwSaxfWrCWqXEN1b1qRtPbJ5OVRqLLmNPEQ +60u1PJSTXQDEQW9SsmDunjhBX+2kEaO5BFdr2JpJ/Xp+3i5kAGtCFNQmof2EfQXON5X4V LOFsRll018Xi17zOuByR5En0Oa9CVPNaHCaWqVwxbv9u9BP73o8w7TwaZjiMI/QocjgYuO gGeULKHOhOuLJDY1L5/fPoPsutCLdnv+iXKDlmMOz6JnQLmABA4n244mp6dt5R6R5FN04a 7fIMjoN/D0O2aM8ZROswLAQFlylsaFZAli4pNCSH4fYJEhZRudPmSxw70Sp7SQ== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 6/8] dma: dw: Add RZN1 compatible Date: Fri, 18 Feb 2022 19:12:24 +0100 Message-Id: <20220218181226.431098-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is very close to the original DW DMA IP, a DMA routeur has been introduced to handle the wiring options that have been added. Signed-off-by: Miquel Raynal --- drivers/dma/dw/platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c index 246118955877..47f2292dba98 100644 --- a/drivers/dma/dw/platform.c +++ b/drivers/dma/dw/platform.c @@ -137,6 +137,7 @@ static void dw_shutdown(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, + { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); From patchwork Fri Feb 18 18:12:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C98DC43219 for ; Fri, 18 Feb 2022 18:12:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239030AbiBRSNE (ORCPT ); Fri, 18 Feb 2022 13:13:04 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:35970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239031AbiBRSND (ORCPT ); Fri, 18 Feb 2022 13:13:03 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D67535DFC; Fri, 18 Feb 2022 10:12:45 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id EBF6D2000A; Fri, 18 Feb 2022 18:12:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207964; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WeWTdPDyu4NpqtMlrcHJAByNbSFMRLqvNKamFBzDCiw=; b=hwrEYOrT3Q09uGn1ADsiKkh5rl59PBuo98xng1ZK2gQjJKtGQV1+cKK4PReH9k1dBG9AWI oQro+pnRxWSIjgAq9AnGFMWJLZ/TCPntTK7mO3JSYx2gHWrOCKhLdbHcWsJ7xXKcoft4Dc FtCZ2pJZ0flVYNIjqnnnc7JzQskq1o4Uo+pgXZEr+2XzKbDh/sMKEGQ8H43xUULojTxD8k 8hFjBAa/sENIBCm87/o19Q+A22YXGLU+fxRt8mrlRbsEPlWp2ddCY/D5Wyb4rjR6KJVx4L bnDh2yZxALfW6dCNrYv6opvxhjgiu4IFq0ZiIHT7P9IzySBwK4lwhpcG7JokBA== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 7/8] ARM: dts: r9a06g032: Add the two DMA nodes Date: Fri, 18 Feb 2022 19:12:25 +0100 Message-Id: <20220218181226.431098-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index db657224688a..640c3eb4bbcd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -184,6 +184,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; From patchwork Fri Feb 18 18:12:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12751718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF61BC433FE for ; Fri, 18 Feb 2022 18:12:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239026AbiBRSNI (ORCPT ); Fri, 18 Feb 2022 13:13:08 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:36306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238795AbiBRSNH (ORCPT ); Fri, 18 Feb 2022 13:13:07 -0500 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2237A36302; Fri, 18 Feb 2022 10:12:49 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id D5B1A20007; Fri, 18 Feb 2022 18:12:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645207966; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9DmvAJFX2U0qo86wiZbyP/58xIuEhZNsNjvYfvIL0Zw=; b=fXTIrpfk6ihAVCE7KFWybnOdSS6ItYmEU4QaNAGseyxApwFoy8+DrLW9qdXRGw/k+TtjVt MksSK4fQBIN34+DDaGatzQYxrlLS0tKUz0kzapVuiJFXr3H9bUYyb5DAkkkGCYSnkFzuOe LFf8eg3izI9lZl5/qEr9co0SYeYvTrzlijfAzvFf/DS1x5Ac49ppRcqB14n6QjmV+/280z gFtA3QOFomHR25ZozcbI7ozE6G6qgvQU15/EYbKEe1qP5LSfbnc19ZzThSw7dc2IjkmjaR WM93nCzFISLNB+MZAfHmkHeCdNJOTWLYBg2IOeHNp2har63SOYFprYtTVMVkvg== From: Miquel Raynal To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Geert Uytterhoeven , Magnus Damm , Michael Turquette , Stephen Boyd Cc: Rob Herring , , dmaengine@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Laetitia MARIOTTINI , Miquel Raynal Subject: [PATCH 8/8] ARM: dts: r9a06g032: Describe the DMA router Date: Fri, 18 Feb 2022 19:12:26 +0100 Message-Id: <20220218181226.431098-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220218181226.431098-1-miquel.raynal@bootlin.com> References: <20220218181226.431098-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 640c3eb4bbcd..0eb12c3d9cfd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -59,6 +59,13 @@ ext_rtc_clk: extrtcclk { clock-frequency = <0>; }; + dmamux: dma-router { + compatible = "renesas,rzn1-dmamux"; + #dma-cells = <6>; + dma-requests = <32>; + dma-masters = <&dma0 &dma1>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>;