From patchwork Mon Feb 21 21:03:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12754139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 440EAC433F5 for ; Mon, 21 Feb 2022 21:03:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234184AbiBUVEU (ORCPT ); Mon, 21 Feb 2022 16:04:20 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:36674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232450AbiBUVEU (ORCPT ); Mon, 21 Feb 2022 16:04:20 -0500 Received: from imap3.hz.codethink.co.uk (imap3.hz.codethink.co.uk [176.9.8.87]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00DD723BCD; Mon, 21 Feb 2022 13:03:55 -0800 (PST) Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap3.hz.codethink.co.uk with esmtpsa (Exim 4.92 #3 (Debian)) id 1nMFqW-0000u1-RF; Mon, 21 Feb 2022 21:03:48 +0000 Received: from ben by rainbowdash with local (Exim 4.95) (envelope-from ) id 1nMFqW-005bIY-9j; Mon, 21 Feb 2022 21:03:48 +0000 From: Ben Dooks To: paul.walmsley@sifive.com, greentime.hu@sifive.com Cc: lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Ben Dooks Subject: [PATCHv4 1/2] PCI: fu740: fix finding GPIOs Date: Mon, 21 Feb 2022 21:03:46 +0000 Message-Id: <20220221210347.1335004-1-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The calls to devm_gpiod_get_optional() have the -gpios at the end of the name but the GPIO core code is already adding the suffix during the lookup. This means the PCIe driver is not finding the necessary reset or power lines to allow initialisation of the PCIe. This bug has not been noticed as if U-Boot has setup the GPIO lines for the hardware when it does the PCIe initialisation (either by booting from PCIe or user command to access PCIe) then the PCIe will work in Linux. The U-Boot as supplied by SiFive does not by default initialise any PCIe component. Signed-off-by: Ben Dooks --- drivers/pci/controller/dwc/pcie-fu740.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c index 00cde9a248b5..842b7202b96e 100644 --- a/drivers/pci/controller/dwc/pcie-fu740.c +++ b/drivers/pci/controller/dwc/pcie-fu740.c @@ -259,11 +259,11 @@ static int fu740_pcie_probe(struct platform_device *pdev) return PTR_ERR(afp->mgmt_base); /* Fetch GPIOs */ - afp->reset = devm_gpiod_get_optional(dev, "reset-gpios", GPIOD_OUT_LOW); + afp->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(afp->reset)) return dev_err_probe(dev, PTR_ERR(afp->reset), "unable to get reset-gpios\n"); - afp->pwren = devm_gpiod_get_optional(dev, "pwren-gpios", GPIOD_OUT_LOW); + afp->pwren = devm_gpiod_get_optional(dev, "pwren", GPIOD_OUT_LOW); if (IS_ERR(afp->pwren)) return dev_err_probe(dev, PTR_ERR(afp->pwren), "unable to get pwren-gpios\n"); From patchwork Mon Feb 21 21:03:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12754140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD828C433EF for ; Mon, 21 Feb 2022 21:04:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232450AbiBUVEX (ORCPT ); Mon, 21 Feb 2022 16:04:23 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:36676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234175AbiBUVEU (ORCPT ); Mon, 21 Feb 2022 16:04:20 -0500 Received: from imap2.colo.codethink.co.uk (imap2.colo.codethink.co.uk [78.40.148.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1F8123BCE; Mon, 21 Feb 2022 13:03:56 -0800 (PST) Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122] helo=rainbowdash) by imap2.colo.codethink.co.uk with esmtpsa (Exim 4.92 #3 (Debian)) id 1nMFqW-0002Tl-NS; Mon, 21 Feb 2022 21:03:48 +0000 Received: from ben by rainbowdash with local (Exim 4.95) (envelope-from ) id 1nMFqW-005bIb-BU; Mon, 21 Feb 2022 21:03:48 +0000 From: Ben Dooks To: paul.walmsley@sifive.com, greentime.hu@sifive.com Cc: lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Ben Dooks Subject: [PATCHv4 2/2] PCI: fu740: Force gen1 for initial device probe Date: Mon, 21 Feb 2022 21:03:47 +0000 Message-Id: <20220221210347.1335004-2-ben.dooks@codethink.co.uk> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220221210347.1335004-1-ben.dooks@codethink.co.uk> References: <20220221210347.1335004-1-ben.dooks@codethink.co.uk> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The fu740 PCIe core does not probe any devices on the SiFive Unmatched board without this fix from U-Boot (or having U-Boot explicitly start the PCIe via either boot-script or user command). The fix claims to set the link-speed to gen1 to get the probe to work. As this is a copy from U-Boot, the code is assumed to be correct and does fix the issue on the Unmatched. The code is at: https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pci/pcie_dw_sifive.c#L271 The code has been this way since the driver was commited in: https://source.denx.de/u-boot/u-boot/-/commit/416395c772018c6bf52aad36aca163115001793f Signed-off-by: Ben Dooks --- drivers/pci/controller/dwc/pcie-fu740.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-fu740.c b/drivers/pci/controller/dwc/pcie-fu740.c index 842b7202b96e..19501ec8c487 100644 --- a/drivers/pci/controller/dwc/pcie-fu740.c +++ b/drivers/pci/controller/dwc/pcie-fu740.c @@ -177,11 +177,30 @@ static void fu740_pcie_init_phy(struct fu740_pcie *afp) fu740_phyregwrite(1, PCIEX8MGMT_PHY_LANE3_BASE, PCIEX8MGMT_PHY_INIT_VAL, afp); } +/* This is copied from u-boot. Force system to gen1 otherwise nothing probes + * as found on the SiFive Unmatched board. + */ +static void fu740_pcie_force_gen1(struct dw_pcie *dw, struct fu740_pcie *afp ) +{ + unsigned val; + + dw_pcie_dbi_ro_wr_en(dw); + + val = dw_pcie_readl_dbi(dw, 0x70 + PCI_EXP_LNKCAP); + pr_info("%s: link-cap was %08x\n", __func__, val); + dw_pcie_writel_dbi(dw, 0x70 + PCI_EXP_LNKCAP, val | 0xf); + + dw_pcie_dbi_ro_wr_dis(dw); +} + static int fu740_pcie_start_link(struct dw_pcie *pci) { struct device *dev = pci->dev; struct fu740_pcie *afp = dev_get_drvdata(dev); + /* Force PCIe gen1 otherwise Unmatched board does not probe */ + fu740_pcie_force_gen1(pci, afp); + /* Enable LTSSM */ writel_relaxed(0x1, afp->mgmt_base + PCIEX8MGMT_APP_LTSSM_ENABLE); return 0;