From patchwork Tue Feb 22 10:34:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A39BC433EF for ; Tue, 22 Feb 2022 10:34:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229729AbiBVKfV (ORCPT ); Tue, 22 Feb 2022 05:35:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230376AbiBVKfU (ORCPT ); Tue, 22 Feb 2022 05:35:20 -0500 X-Greylist: delayed 77721 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Tue, 22 Feb 2022 02:34:54 PST Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F58515B3D1; Tue, 22 Feb 2022 02:34:53 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 324D8FF811; Tue, 22 Feb 2022 10:34:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526092; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EGwulRQWUdeID+R0ltPV+hvVeG6IiTvELdB/8Uiez8g=; b=KKyyoIqm34chK07H4AXAR0SJuqmJY6H7rEwVUtb8UxOU9NVmoKiJ48IlrDwKaiG7oYEj/l XnvRjZ2ksfJ95MNXcBylnUBxd4wEtN40MOQdIR7mNrvbD4yLc/apDFMakGOEyRwbbWjD5G Y2tU0/Hx75PevQ5QENXSwLVzN7RuvRFlPa82gGu505cLStv2kc6nn7qKkfsUg9lx8MKxVO u+BFK7o/7S7MNgESNHpXWs4rL/jF9U2eZHF5t2bwaj3sgL87QM7WrD5GEQOnXfNNquMuz/ RdfHl9rLETOeyadPyeFFgMLUfYaWFgHMYugAB7IN94hLfiZYz/3v4NVQBaR6OQ== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 1/8] dt-bindings: dma: Introduce RZN1 dmamux bindings Date: Tue, 22 Feb 2022 11:34:30 +0100 Message-Id: <20220222103437.194779-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- .../bindings/dma/renesas,rzn1-dmamux.yaml | 42 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml new file mode 100644 index 000000000000..e2c82e43b8b1 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 DMA mux + +maintainers: + - Miquel Raynal + +allOf: + - $ref: "dma-router.yaml#" + +properties: + compatible: + const: renesas,rzn1-dmamux + + '#dma-cells': + const: 6 + description: + The first four cells are dedicated to the master DMA controller. The fifth + cell gives the DMA mux bit index that must be set starting from 0. The + sixth cell gives the binary value that must be written there, ie. 0 or 1. + + dma-masters: + minItems: 1 + maxItems: 2 + + dma-requests: + const: 32 + +additionalProperties: false + +examples: + - | + dma-router { + compatible = "renesas,rzn1-dmamux"; + #dma-cells = <6>; + dma-masters = <&dma0 &dma1>; + dma-requests = <32>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..c70c9c39a2f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18636,6 +18636,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h From patchwork Tue Feb 22 10:34:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EF07C4332F for ; Tue, 22 Feb 2022 10:35:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231250AbiBVKfY (ORCPT ); Tue, 22 Feb 2022 05:35:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230376AbiBVKfX (ORCPT ); Tue, 22 Feb 2022 05:35:23 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46E0115B3D3; Tue, 22 Feb 2022 02:34:57 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 18186FF808; Tue, 22 Feb 2022 10:34:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526096; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=O08Pcry/HWi2NEFBE62QX3hMBX74lPRjsdrIBYgSiTU=; b=pwq/Lza+I6j2V/lroXmmB3SPXTxbWWGLIDMLN/QY3/PAcjJ/QOQS/6PiFsiXyKDukbbUfp 0niL7J2m9fQkUH90F5yBZblNU4K7QAOzVzVJHfmhgnACEPGvE9lktrSrtaJB+ecoXtuLtl M/24lngGNn0/ILhoKzNqcjq7zcHFWEOzeeZ9pKjwzILKRILeqwoJDG0BRB5osRpHoMKQ62 94qxHSbonoh8KIUoD2FxbFaE3o7uBMFqUrlCfhD4LSgKZ9J28dNO9udFyLqoo6fNaQncuh IzRpoOQ4wKBN2yiJvuuRwmq496WqgH5al4b8aEWH5FhbllTVxJNSw2amAyXkeA== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 2/8] dt-bindings: dma: Introduce RZN1 DMA compatible Date: Tue, 22 Feb 2022 11:34:31 +0100 Message-Id: <20220222103437.194779-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Just like for the NAND controller that is also on this SoC, let's provide a SoC generic and a more specific couple of compatibles for the DMA controller. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 6b35089ac017..c13649bf7f19 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -15,7 +15,13 @@ allOf: properties: compatible: - const: snps,dma-spear1340 + oneOf: + - const: snps,dma-spear1340 + - items: + - enum: + - renesas,r9a06g032-dma + - const: renesas,rzn1-dma + "#dma-cells": minimum: 3 From patchwork Tue Feb 22 10:34:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754826 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20D72C433F5 for ; Tue, 22 Feb 2022 10:35:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231252AbiBVKf2 (ORCPT ); Tue, 22 Feb 2022 05:35:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230437AbiBVKf1 (ORCPT ); Tue, 22 Feb 2022 05:35:27 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B734E15B3DF; Tue, 22 Feb 2022 02:35:01 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 56BA0FF807; Tue, 22 Feb 2022 10:34:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526100; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F3+Oux1VnR7Sdvr4JNewwQWXvXdVydwtng7Wz92aPOw=; b=Rs5Thr7UPSPoBCcldQOzahowLYpB2rTIsHN/0iJ0sSvMqNBmPZqXszkHWfgHpLVLwyJGUc 8x8AqRU3xlhaevV7OXGRZT5u3Va6LwukmWtcgovR15gk3Kcdi/L+TbZFGWxLb2Ie6NxMTH FG2JWBhm1oMTfHMAsDzwHl+0bS7DaMs8c7SEoePbpXxhYrS/rSsv3Iuui2mOMkQCOJifze ScsFLUjm8UzXD9RmdNvNzsnbMhagV0NFGnyxiduUJ3XwbzEtWwGTAhpnChvGkvRVw3dPzb i29Kp20MpkwBhpRqDD7triCJfu4Y6IQJ9GIu3UsiYwOR3PdLajZXe2iW1ToLIw== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 3/8] soc: renesas: rzn1-sysc: Export function to set dmamux Date: Tue, 22 Feb 2022 11:34:32 +0100 Message-Id: <20220222103437.194779-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal --- drivers/clk/renesas/r9a06g032-clocks.c | 31 +++++++++++++++++++ include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 +++++++ 2 files changed, 42 insertions(+) create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..370c89490be9 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -20,9 +20,12 @@ #include #include #include +#include #include #include +#define R9A06G032_SYSCTRL_DMAMUX 0xA0 + struct r9a06g032_gate { u16 gate, reset, ready, midle, scon, mirack, mistat; @@ -315,6 +318,28 @@ struct r9a06g032_priv { void __iomem *reg; }; +/* Exported helper to access the DMAMUX register */ +static struct r9a06g032_priv *sysctrl_priv; +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) +{ + unsigned long flags; + u32 dmamux; + + if (!sysctrl_priv) + return -EPROBE_DEFER; + + spin_lock_irqsave(&sysctrl_priv->lock, flags); + + dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + + spin_unlock_irqrestore(&sysctrl_priv->lock, flags); + + return 0; +} + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -922,6 +947,12 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) clocks->reg = of_iomap(np, 0); if (WARN_ON(!clocks->reg)) return -ENOMEM; + + if (sysctrl_priv) + return -EBUSY; + + sysctrl_priv = clocks; + for (i = 0; i < ARRAY_SIZE(r9a06g032_clocks); ++i) { const struct r9a06g032_clkdesc *d = &r9a06g032_clocks[i]; const char *parent_name = d->source ? diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h new file mode 100644 index 000000000000..066dfb15cbdd --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */ From patchwork Tue Feb 22 10:34:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17237C433FE for ; Tue, 22 Feb 2022 10:35:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231245AbiBVKfg (ORCPT ); Tue, 22 Feb 2022 05:35:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230437AbiBVKfe (ORCPT ); Tue, 22 Feb 2022 05:35:34 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4FCD15B983; Tue, 22 Feb 2022 02:35:08 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id DCE6DFF811; Tue, 22 Feb 2022 10:35:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526107; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Epk2uTeuvShgaggsLxcN9kC/j5VSYJM1XeKDbbQfB8E=; b=n7TrvmfpRWupIlxSVQnlP2XwIArfX68MjNAemZTUDBIyjlVXi944fkoEhfqaNSovS+pazQ QlyM/R5ezqPTsj0G7X4aA0B9r6O/xB/A4WhcM4boqmphn3hTvRSVRpIKP0LXk4NywRzgog qK4TXBrMnWS56XCUFxOvJJoGGRg/+e8PDeRm3eLG8aOUwN46pocL6bndt9Jxj/f+kPCjzl nznCnGtoMjzcz0jEEUsGA+uEnSND3qA6VVXxzmbDMRy00JM1/3vMiilE4O1XMP8Tra1lkj 3XXZ4U9LPfTWgCqa82lh0xMk9pvQ44acRZB5rak1aDGcuGeOBJROZ9W1/6sfKA== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 4/8] dma: dmamux: Introduce RZN1 DMA router support Date: Tue, 22 Feb 2022 11:34:33 +0100 Message-Id: <20220222103437.194779-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Signed-off-by: Miquel Raynal Reported-by: kernel test robot --- drivers/dma/dw/Kconfig | 8 ++ drivers/dma/dw/Makefile | 2 + drivers/dma/dw/dmamux.c | 167 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 177 insertions(+) create mode 100644 drivers/dma/dw/dmamux.c diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig index db25f9b7778c..dd53d4a9fa92 100644 --- a/drivers/dma/dw/Kconfig +++ b/drivers/dma/dw/Kconfig @@ -16,6 +16,14 @@ config DW_DMAC Support the Synopsys DesignWare AHB DMA controller. This can be integrated in chips such as the Intel Cherrytrail. +config RZN1_DMAMUX + tristate "Renesas RZ/N1 DMAMUX driver" + depends on DW_DMAC + help + Support the Renesas RZ/N1 DMAMUX which is located in front of + the Synopsys DesignWare AHB DMA controller located on Renesas + SoCs. + config DW_DMAC_PCI tristate "Synopsys DesignWare AHB DMA PCI driver" depends on PCI diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile index a6f358ad8591..7c6e0ab6fcd8 100644 --- a/drivers/dma/dw/Makefile +++ b/drivers/dma/dw/Makefile @@ -7,5 +7,7 @@ obj-$(CONFIG_DW_DMAC) += dw_dmac.o dw_dmac-y := platform.o dw_dmac-$(CONFIG_OF) += of.o +obj-$(CONFIG_RZN1_DMAMUX) += dmamux.o + obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o dw_dmac_pci-y := pci.o diff --git a/drivers/dma/dw/dmamux.c b/drivers/dma/dw/dmamux.c new file mode 100644 index 000000000000..5fb3ffb82e88 --- /dev/null +++ b/drivers/dma/dw/dmamux.c @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Schneider-Electric + * Author: Miquel Raynal + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RZN1_DMAMUX_LINES 64 + +struct rzn1_dmamux_data { + struct dma_router dmarouter; + unsigned int dmac_requests; + unsigned int dmamux_requests; + u32 used_chans; + struct mutex lock; +}; + +struct rzn1_dmamux_map { + unsigned int req_idx; +}; + +static void rzn1_dmamux_free(struct device *dev, void *route_data) +{ + struct rzn1_dmamux_data *dmamux = dev_get_drvdata(dev); + struct rzn1_dmamux_map *map = route_data; + + dev_dbg(dev, "Unmapping DMAMUX request %u\n", map->req_idx); + + mutex_lock(&dmamux->lock); + dmamux->used_chans &= ~BIT(map->req_idx); + mutex_unlock(&dmamux->lock); + + kfree(map); +} + +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct rzn1_dmamux_map *map; + unsigned int master, chan, val; + u32 mask; + int ret; + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + if (dma_spec->args_count != 6) + return ERR_PTR(-EINVAL); + + chan = dma_spec->args[0]; + map->req_idx = dma_spec->args[4]; + val = dma_spec->args[5]; + dma_spec->args_count -= 2; + + if (chan >= dmamux->dmac_requests) { + dev_err(&pdev->dev, "Invalid DMA request line: %d\n", chan); + return ERR_PTR(-EINVAL); + } + + if (map->req_idx >= dmamux->dmamux_requests || + map->req_idx % dmamux->dmac_requests != chan) { + dev_err(&pdev->dev, "Invalid MUX request line: %d\n", map->req_idx); + return ERR_PTR(-EINVAL); + } + + /* The of_node_put() will be done in the core for the node */ + master = map->req_idx >= dmamux->dmac_requests ? 1 : 0; + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", master); + if (!dma_spec->np) { + dev_err(&pdev->dev, "Can't get DMA master\n"); + return ERR_PTR(-EINVAL); + } + + dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n", + map->req_idx, master, chan); + + mask = BIT(map->req_idx); + mutex_lock(&dmamux->lock); + dmamux->used_chans |= mask; + ret = r9a06g032_sysctrl_set_dmamux(mask, val ? mask : 0); + mutex_unlock(&dmamux->lock); + if (ret) { + rzn1_dmamux_free(&pdev->dev, map); + return ERR_PTR(ret); + } + + return map; +} + +static const struct of_device_id rzn1_dmac_match[] __maybe_unused = { + { .compatible = "renesas,rzn1-dma" }, + {}, +}; + +static int rzn1_dmamux_probe(struct platform_device *pdev) +{ + struct device_node *mux_node = pdev->dev.of_node; + const struct of_device_id *match; + struct device_node *dmac_node; + struct rzn1_dmamux_data *dmamux; + + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); + if (!dmamux) + return -ENOMEM; + + mutex_init(&dmamux->lock); + + dmac_node = of_parse_phandle(mux_node, "dma-masters", 0); + if (!dmac_node) + return dev_err_probe(&pdev->dev, -ENODEV, "Can't get DMA master node\n"); + + match = of_match_node(rzn1_dmac_match, dmac_node); + if (!match) { + of_node_put(dmac_node); + return dev_err_probe(&pdev->dev, -EINVAL, "DMA master is not supported\n"); + } + + if (of_property_read_u32(dmac_node, "dma-requests", &dmamux->dmac_requests)) { + of_node_put(dmac_node); + return dev_err_probe(&pdev->dev, -EINVAL, "Missing DMAC requests information\n"); + } + + of_node_put(dmac_node); + + if (of_property_read_u32(mux_node, "dma-requests", &dmamux->dmamux_requests)) { + return dev_err_probe(&pdev->dev, -EINVAL, "Missing mux requests information\n"); + } + + dmamux->dmarouter.dev = &pdev->dev; + dmamux->dmarouter.route_free = rzn1_dmamux_free; + + platform_set_drvdata(pdev, dmamux); + + return of_dma_router_register(mux_node, rzn1_dmamux_route_allocate, + &dmamux->dmarouter); +} + +static const struct of_device_id rzn1_dmamux_match[] = { + { .compatible = "renesas,rzn1-dmamux" }, + {}, +}; + +static struct platform_driver rzn1_dmamux_driver = { + .driver = { + .name = "renesas,rzn1-dmamux", + .of_match_table = rzn1_dmamux_match, + }, + .probe = rzn1_dmamux_probe, +}; + +static int rzn1_dmamux_init(void) +{ + return platform_driver_register(&rzn1_dmamux_driver); +} +arch_initcall(rzn1_dmamux_init); From patchwork Tue Feb 22 10:34:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4E56C433EF for ; Tue, 22 Feb 2022 10:35:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231272AbiBVKfk (ORCPT ); Tue, 22 Feb 2022 05:35:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231254AbiBVKfj (ORCPT ); Tue, 22 Feb 2022 05:35:39 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 148B015B982; Tue, 22 Feb 2022 02:35:13 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A87B9FF802; Tue, 22 Feb 2022 10:35:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526112; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RRNdYi6Xz1yqhHctAJQ2hLqQsjF5keNJokZ+KOZpDMs=; b=FqabDjkxfVRDyaq1p5LvqJoB00lu6GJi84Sr1VmWzxONSbW8vUGgpwgJ5qiBWIxvqbuhnX CdVabLbWaLpD8RG0eahDr8RNdmifflp48NdXk44mnqIgZSc7OoM93dPgfPEeepkSuj9CEH q9ZGFC3+WuCLybm1EPp4vIDsuB980KQFm9YN9q07p8K4UVXP2u/1IMFFiKzs58dmZqB3z+ FjGAT70kPSIGUHzKMp0Gii7MoCj0lnzQq9Djhya3YeZi+j3OstWGBh7QN9ZhmYDvNcUr+a Lqm4+CetYBsWY2o9xzvM9mqNubkGhrgCWpp7kPBfWkZdMK+Nq3evIFYIeiG/EA== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 5/8] dma: dw: Avoid partial transfers Date: Tue, 22 Feb 2022 11:34:34 +0100 Message-Id: <20220222103437.194779-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org From: Phil Edworthy Pausing a partial transfer only causes data to be written to memory that is a multiple of the memory width setting. However, when a DMA client driver finishes DMA early, e.g. due to UART char timeout interrupt, all data read from the device must be written to memory. Therefore, allow the slave to limit the memory width to ensure all data read from the device is written to memory when DMA is paused. This change only applies to the DMA_DEV_TO_MEM case. Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/dma/dw/core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 7ab83fe601ed..48cdefe997f1 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -705,6 +705,9 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_P2M) : DWC_CTLL_FC(DW_DMA_FC_D_P2M); + if (sconfig->dst_addr_width && sconfig->dst_addr_width < data_width) + data_width = sconfig->dst_addr_width; + for_each_sg(sgl, sg, sg_len, i) { struct dw_desc *desc; u32 len, mem; From patchwork Tue Feb 22 10:34:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A259DC433EF for ; Tue, 22 Feb 2022 10:35:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231269AbiBVKfo (ORCPT ); Tue, 22 Feb 2022 05:35:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231283AbiBVKfo (ORCPT ); Tue, 22 Feb 2022 05:35:44 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AFC215B9AB; Tue, 22 Feb 2022 02:35:18 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 44E7AFF804; Tue, 22 Feb 2022 10:35:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526117; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GICbYbueSRfZD71SRVOSQS8vJpvhSm39Cdy68XtQVcw=; b=AS1ISqd+51tbDKdepBeuQHQlcJgAagg4P3r8XNFjtAhmsh0Wlsmb5323xw+x/HU8aWWEbu EZaIYJiK9Av+mE3KIn5NnwPAivQmyQ4UcsuFZUbgRr892TO02JmsBV396eBBFy6eBVTx0D ZapJBb7xjX5BnxmkXFWJwWJd/La9ab1QT064Ou+4u0bpQ5u1rE2/P9HlHVglCdDlBg/Oiu UIHt+4XhNQA8DJ6SIUGSGfu6SmcEnJvNcdSNtMzmFt4Sb7qXlwsVspt7q8o4ZzCTNLXP41 9adrpNIfV7/KsjSu15B1kQF1Jl8hrk5UMW6Crs1PbvokOdHwXWvzDAey9PcQhA== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 6/8] dma: dw: Add RZN1 compatible Date: Tue, 22 Feb 2022 11:34:35 +0100 Message-Id: <20220222103437.194779-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is very close to the original DW DMA IP, a DMA routeur has been introduced to handle the wiring options that have been added. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- drivers/dma/dw/platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c index 246118955877..47f2292dba98 100644 --- a/drivers/dma/dw/platform.c +++ b/drivers/dma/dw/platform.c @@ -137,6 +137,7 @@ static void dw_shutdown(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, + { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); From patchwork Tue Feb 22 10:34:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC3A2C433FE for ; Tue, 22 Feb 2022 10:35:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231254AbiBVKfw (ORCPT ); Tue, 22 Feb 2022 05:35:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229487AbiBVKft (ORCPT ); Tue, 22 Feb 2022 05:35:49 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 532BA15B996; Tue, 22 Feb 2022 02:35:23 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 5DCE3FF809; Tue, 22 Feb 2022 10:35:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526121; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WeWTdPDyu4NpqtMlrcHJAByNbSFMRLqvNKamFBzDCiw=; b=VSRGmdPGgSLRWFydLNbZWxSiWIGxFGVo9aG9go6ynGxAi6eQC+8xdZSbkRSPgajdQV8cea 2JR9kMLvTiwPqBqfV3u2gxjhSDKOi4R+0yYztoZ8URpYt2OrMzY6O+O2BJ6bqwWW6XjcnR YVXfFSlISG6rgrfY17xlruvU0eOxgYK/N8N1l7HxfWF3p3WnQzOZ51S+P92fKV4wn/yrZo Kez4u4dy2huj1w3lxiRDzHqjBAkZKJzlBc63olh5ikzkO1xD44rMLgloiPM4ZVDUls+DlU oMUHh+gjnfmfg+6QG45mu5ShLxlNnSIJxfeZYJqM5Ru8MKu4YcLBk/zEazWiUQ== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 7/8] ARM: dts: r9a06g032: Add the two DMA nodes Date: Tue, 22 Feb 2022 11:34:36 +0100 Message-Id: <20220222103437.194779-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index db657224688a..640c3eb4bbcd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -184,6 +184,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; From patchwork Tue Feb 22 10:34:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12754831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE56AC4332F for ; Tue, 22 Feb 2022 10:35:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230138AbiBVKfz (ORCPT ); Tue, 22 Feb 2022 05:35:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230319AbiBVKfy (ORCPT ); Tue, 22 Feb 2022 05:35:54 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 965F815B98A; Tue, 22 Feb 2022 02:35:27 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 4743CFF80C; Tue, 22 Feb 2022 10:35:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645526126; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9DmvAJFX2U0qo86wiZbyP/58xIuEhZNsNjvYfvIL0Zw=; b=NY1vFjchNlrsA1wW/HjOQ7VpnvrTJeEV9oC5Pd2LnpAka8eopqNv/11cFCxRLBYSjupEJU 2SzanQqqsgWknJt1xDsbwFMyj5NmDx+Q6KoSxfSStvq3uE9AlDJ7nWuTrezrXsX9BwzlZh X/+e0i3Fh6iJBw4lKwp/fpiRDS3qLf6z66YjgEPKW1ubXc68+q5VOVL+eflMnG3gyqw4Q2 EU3vyzm5n2E0lhTSX4aOSifQ6G6p9W0n8F/sWPuyqzPV2Wdfr9jB2LfTns6cFzSZCi62of IWkSwT0INDDq/l8tvVjTSMecVCuq578IlZqknk9VP8wPbBqIjjdA/8Uru0pmdQ== From: Miquel Raynal To: Vinod Koul , Andy Shevchenko Cc: dmaengine@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Thomas Petazzoni , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Miquel Raynal Subject: [PATCH v2 8/8] ARM: dts: r9a06g032: Describe the DMA router Date: Tue, 22 Feb 2022 11:34:37 +0100 Message-Id: <20220222103437.194779-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220222103437.194779-1-miquel.raynal@bootlin.com> References: <20220222103437.194779-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 640c3eb4bbcd..0eb12c3d9cfd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -59,6 +59,13 @@ ext_rtc_clk: extrtcclk { clock-frequency = <0>; }; + dmamux: dma-router { + compatible = "renesas,rzn1-dmamux"; + #dma-cells = <6>; + dma-requests = <32>; + dma-masters = <&dma0 &dma1>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>;