From patchwork Fri Feb 25 00:07:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97073C433F5 for ; Fri, 25 Feb 2022 00:08:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232641AbiBYAIu (ORCPT ); Thu, 24 Feb 2022 19:08:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231324AbiBYAIt (ORCPT ); Thu, 24 Feb 2022 19:08:49 -0500 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45A69145AE1 for ; Thu, 24 Feb 2022 16:08:17 -0800 (PST) Received: by mail-wm1-x329.google.com with SMTP id c192so756760wma.4 for ; Thu, 24 Feb 2022 16:08:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tqBf7h+Gwzv+ebh5s+Kc+a57roM9u8c7DiABvHCuLsw=; b=b+3gfVogSzaoGlO+GSuW6EekrbTME9tPFEFOZeo3g1CUgUSIPJGBER9WE/wPZ0frL+ FfKd5/9HAEmg7W69txCpHLLXNcU0QJsn0Q2GghOhcQ/MdUsXWrDZYOVYqDzOxryF0pGd HoTCfKDrsnxSsUzZA91wcIHuGYxVGXz3wOWS7eqjU76HQEFJAOSUBUSO9As81HYuZZZl KD+jnCP3CXjSc/BH1DEzjQMOP3a7/mq6T/Mc+SAhpnoRtNdTq447HWzDgi9y1cfZzuUz P5RYVh/RlsPnEJd87pJzwxatnb92hVUPHrMx4P8CEN0EgVW/hAh/ddnFkIihee7Q7U6N R+ew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tqBf7h+Gwzv+ebh5s+Kc+a57roM9u8c7DiABvHCuLsw=; b=kFI5g9iGOYHjKPPb4bC35w4lhdm63xv+BJ+gICa3zrNobo18zxkSUguexmcEvZDS9L 17tiJvPbRbEj6a1VdyFQLi5DpXBlL92dRQErJEtCVHoqDLcdqQxtE1/otT+ilvOvWu6e oAZiE3F3YIggEY3xzAodavytTfNVVw67mxin5H+4EDxCmm0lPbnfSDheWUWOKW2aPHEL sv6AT93WRfwSk5kqdeQtZMCAQQ9O3o5ec/TvAyH0QpGBQlBnRkBCiAQuSHbe1PXjmbFz pmkK9ac7dhTzLhA/AgvUzaIsZWY2GHjJiYNUknNx7wLya4t9PHqzCt964tVnGD7bwUdI uH/w== X-Gm-Message-State: AOAM530/CWUs8buFInb5bsDPMbxqhD6YqZEi33wDdKZKBuod5ue4rUs8 mudHKswSe8g2H/BgXDXmGx52SxhFgav+0g== X-Google-Smtp-Source: ABdhPJxLgx+hft65LbspGNy8ZeAYAuT+AAjLaJSh+ZjR7PaBP++n2eFgp/QXLEwm3cR2S3EOr49mbQ== X-Received: by 2002:a05:600c:601a:b0:380:d09a:ca7 with SMTP id az26-20020a05600c601a00b00380d09a0ca7mr385987wmb.128.1645747695803; Thu, 24 Feb 2022 16:08:15 -0800 (PST) Received: from localhost.localdomain (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net. [86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:15 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl, Nicolas Dufresne Subject: [PATCH v2 01/11] media: uapi: Add IPU3 packed Y10 format Date: Fri, 25 Feb 2022 00:07:43 +0000 Message-Id: <20220225000753.511996-2-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Some platforms with an Intel IPU3 have an IR sensor producing 10 bit greyscale format data that is transmitted over a CSI-2 bus to a CIO2 device - this packs the data into 32 bytes per 25 pixels. Add an entry to the uAPI header defining that format. Reviewed-by: Nicolas Dufresne Signed-off-by: Daniel Scally --- Changes in v2: - Switched away from using the fourcc in the explanatory note for pixfmt-yuv-luma.rst (Nicolas) .../userspace-api/media/v4l/pixfmt-yuv-luma.rst | 14 +++++++++++++- drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 3 ++- 3 files changed, 16 insertions(+), 2 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst index 91942c4f0967..945a0058506b 100644 --- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst +++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst @@ -48,6 +48,17 @@ are often referred to as greyscale formats. - ... - ... + * .. _V4L2-PIX-FMT-IPU3-Y10: + + - ``V4L2_PIX_FMT_IPU3_Y10`` + - 'ip3y' + + - Y'\ :sub:`0`\ [7:0] + - Y'\ :sub:`1`\ [5:0] Y'\ :sub:`0`\ [9:8] + - Y'\ :sub:`2`\ [3:0] Y'\ :sub:`1`\ [9:6] + - Y'\ :sub:`3`\ [1:0] Y'\ :sub:`2`\ [9:4] + - Y'\ :sub:`3`\ [9:2] + * .. _V4L2-PIX-FMT-Y10: - ``V4L2_PIX_FMT_Y10`` @@ -133,4 +144,5 @@ are often referred to as greyscale formats. For the Y16 and Y16_BE formats, the actual sampling precision may be lower than 16 bits. For example, 10 bits per pixel uses values in the range 0 to - 1023. + 1023. For the IPU3_Y10 format 25 pixels are packed into 32 bytes, which + leaves the 6 most significant bits of the last byte padded with 0. diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 31d0109ce5a8..db46925003de 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1263,6 +1263,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_PIX_FMT_Y16_BE: descr = "16-bit Greyscale BE"; break; case V4L2_PIX_FMT_Y10BPACK: descr = "10-bit Greyscale (Packed)"; break; case V4L2_PIX_FMT_Y10P: descr = "10-bit Greyscale (MIPI Packed)"; break; + case V4L2_PIX_FMT_IPU3_Y10: descr = "10-bit greyscale (IPU3 Packed)"; break; case V4L2_PIX_FMT_Y8I: descr = "Interleaved 8-bit Greyscale"; break; case V4L2_PIX_FMT_Y12I: descr = "Interleaved 12-bit Greyscale"; break; case V4L2_PIX_FMT_Z16: descr = "16-bit Depth"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index f118fe7a9f58..d49bde41785b 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -569,6 +569,7 @@ struct v4l2_pix_format { /* Grey bit-packed formats */ #define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ #define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */ +#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */ /* Palette formats */ #define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ @@ -744,7 +745,7 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */ #define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */ -/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ +/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */ #define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */ #define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */ #define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */ From patchwork Fri Feb 25 00:07:44 2022 Content-Type: text/plain; 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[86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:16 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 02/11] media: ipu3-cio2: Add support for V4L2_PIX_FMT_IPU3_Y10 Date: Fri, 25 Feb 2022 00:07:44 +0000 Message-Id: <20220225000753.511996-3-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org We have platforms where a camera sensor transmits Y10 data to the CIO2 device - add support for that (packed) format to the ipu3-cio2 driver. Signed-off-by: Daniel Scally --- Changes in v2: - None drivers/media/pci/intel/ipu3/ipu3-cio2-main.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c b/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c index 0e9b0503b62a..ea2f9f70a64e 100644 --- a/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c +++ b/drivers/media/pci/intel/ipu3/ipu3-cio2-main.c @@ -65,7 +65,12 @@ static const struct ipu3_cio2_fmt formats[] = { .fourcc = V4L2_PIX_FMT_IPU3_SRGGB10, .mipicode = 0x2b, .bpp = 10, - }, + }, { + .mbus_code = MEDIA_BUS_FMT_Y10_1X10, + .fourcc = V4L2_PIX_FMT_IPU3_Y10, + .mipicode = 0x2b, + .bpp = 10, + } }; /* From patchwork Fri Feb 25 00:07:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE6A8C43217 for ; Fri, 25 Feb 2022 00:08:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233831AbiBYAIx (ORCPT ); Thu, 24 Feb 2022 19:08:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231324AbiBYAIu (ORCPT ); Thu, 24 Feb 2022 19:08:50 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3EA4145E3E for ; Thu, 24 Feb 2022 16:08:18 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id d3so2065399wrf.1 for ; Thu, 24 Feb 2022 16:08:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9Ggtdfs6xUCAEq1TnXtNlY6irAHHG7sOgSjdYFohxjU=; b=LFi1WglF2fSgMQGPVRwsXCoHK6v63I8U8/Yycf6ZefWgc/KuvKuOhLBRnZ/T57P3nW em4F+JS2zele004n1x1BzXizpNPbshdfWyDeaiBg8IsPjlDv9qTkCESUDovfukDOrTZ6 z/F660U9KtDjp0KZBKQfOF8gUUMz0X6/1n2SDOrbdHG4BUiVCVNK2GlpGeXq9xIokiIB KDGz9dxnwr5kJw67tolfEmrfEJT/JjfoiqKrqHLOJ9Jfkf3XH/EASMNRCAQN7S+Q5VSV HCpeW5js0nRfRB65qxxdghzc2OKdR0xSq7Bs6oXa1XNw59aM+/f3d6Si87NSUzJSLs3o yY8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9Ggtdfs6xUCAEq1TnXtNlY6irAHHG7sOgSjdYFohxjU=; b=cqthZ4LNmVULVKLuPdTm1vu00Q3z2CA2fx7d7kyeTKFmQ7p36AFl5AxVHaByRtOXIK 8KRLzfzoBr05I8IbpkRkSPmpK2VVVqgLU39aH7inGCb9gUBLLaaMJu+NFMte2Deo+Yu8 3PoahNQVrHE1mfegakh43Ahhc5WbNADBY0sGddE8Y/fGSGMb/K2Ah1n9EsviK81TyzrC 28nJZBMJzgYP0e04sHraF0SjeoORCPa1Jw+DOp2HCty3o5kfh8y18n3+GiTSvs7BAXOP EL5zkF6P24Ag/yz+PWww9DhfwpriRf4+T6u0770pMc0rTvBf/ReLxuxAunqHcva3i8Zr sJcg== X-Gm-Message-State: AOAM533CLnxIh4R3McrCpwJsEp2J0HgUz7rl/5yUXkStNOetIaZ0gpH+ lSMTHMNPf5wjoDtJkPWeIXHER+yGuAuwQw== X-Google-Smtp-Source: ABdhPJx89AvKA3uncBqDeSNDYygU0jDA4JN0ucjA649nx81qmkzdjfUXpx6z7n0zAlUzx02y+bCI3w== X-Received: by 2002:adf:d1c3:0:b0:1ea:911c:bf84 with SMTP id b3-20020adfd1c3000000b001ea911cbf84mr4173815wrd.355.1645747697573; Thu, 24 Feb 2022 16:08:17 -0800 (PST) Received: from localhost.localdomain (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net. [86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:17 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 03/11] media: i2c: Add acpi support to ov7251 Date: Fri, 25 Feb 2022 00:07:45 +0000 Message-Id: <20220225000753.511996-4-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add support for enumeration through ACPI to the ov7251 driver Signed-off-by: Daniel Scally --- Changes in v2: - None drivers/media/i2c/ov7251.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index ebb299f207e5..d6fe574cb9e0 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -1490,9 +1491,16 @@ static const struct of_device_id ov7251_of_match[] = { }; MODULE_DEVICE_TABLE(of, ov7251_of_match); +static const struct acpi_device_id ov7251_acpi_match[] = { + { "INT347E" }, + { } +}; +MODULE_DEVICE_TABLE(acpi, ov7251_acpi_match); + static struct i2c_driver ov7251_i2c_driver = { .driver = { .of_match_table = ov7251_of_match, + .acpi_match_table = ov7251_acpi_match, .name = "ov7251", }, .probe_new = ov7251_probe, From patchwork Fri Feb 25 00:07:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3301FC4332F for ; Fri, 25 Feb 2022 00:08:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233391AbiBYAIw (ORCPT ); Thu, 24 Feb 2022 19:08:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232684AbiBYAIu (ORCPT ); Thu, 24 Feb 2022 19:08:50 -0500 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CED3A14562A for ; Thu, 24 Feb 2022 16:08:19 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id n14so2020626wrq.7 for ; Thu, 24 Feb 2022 16:08:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CrSfojKpUTMrs7bPseKEErlNvIzPQpe6PW4G21xUlQw=; b=nf3ZPuygGzA9MvMqBvdm41tqsy1t0uDlteLZXIafcYEvyBlLhBHts6iNDDlOBcmllO IgqC3onyBuMjDCvWqmekNQvnl51iwFuaV7LkjAoyTNFQLDDpXYjnKsUsrdl/RWlyLB/x m0mJqjqIhX+oQQyVzXc5jl1MgbBHi4KxpvpHO+QK6HYqAXbGCsW09+4WD4tv8FFxjYPT W/doFg00VCLcRAOeTVQ3qHIKK+mhcB+vyqWRyksgwZBKuwZB3Zpm/4Q/kfcaLkhmQebw nLVzPktU7BqtOMxq/GQ3a+xOTT7xQZol51mUuk9RQMxufkVIp/WuO1ePGo/2QNK6WXpl 9URw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CrSfojKpUTMrs7bPseKEErlNvIzPQpe6PW4G21xUlQw=; b=yOX6QZFpDrMufruRLo9f+zVL29auwirQl4LD1IVIHdcxlfY/Ke2Fz6fOIdh+0Ve+UG A134ty95maFMMyGerGq58NhImgA+puwrwCtTPBHHhKkAuLCuLcZLt3h0ttzSKMh0q6BU MHudBveErIFtJbnoMQN+2Gbq7kSX9L1MHGTqaSkNrD4wJ0p24ZX7YbyTV+CuCtYT5owl yDOC/BH8O3uy7kSAXc9r5yE9V7PvY7CpFlB1sN0LK743BqeYKD1jfxpWn4u5OIvqL+bg PN7WJqFqM9PTgkaSI/C8s+BlgD71v6L3kJAMpJd0rhVLVAQFY1QBglUZbQnEqpBTdjcz n1GQ== X-Gm-Message-State: AOAM532G+Ls4vUxnwf/hn4UdwH7qS+uS6twc1sJuqoUzxHvxhV8ZBSTO SSItdTNDrgMYhG2WZ9hhbQi5jtS0vg0C1w== X-Google-Smtp-Source: ABdhPJw2QHy/gqoaQFpeOfwFTicZDse7wdhvuwf0+OUgJMyOZ2rKH+ZRTEPYKWVBsZcry8gejKY09g== X-Received: by 2002:adf:9f0f:0:b0:1ed:c016:dfe5 with SMTP id l15-20020adf9f0f000000b001edc016dfe5mr3904497wrf.675.1645747698377; Thu, 24 Feb 2022 16:08:18 -0800 (PST) Received: from localhost.localdomain (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net. [86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:18 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 04/11] media: i2c: Provide ov7251_check_hwcfg() Date: Fri, 25 Feb 2022 00:07:46 +0000 Message-Id: <20220225000753.511996-5-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Move the endpoint checking from .probe() to a dedicated function, and additionally check that the firmware provided link frequencies are a match for those supported by the driver. Store the index to the matching link frequency so it can be easily identified later. Signed-off-by: Daniel Scally --- Changes in v2: - Switched to use unsigned int (Sakari) - Dropped the checks for bus_type and number of data lanes (Sakari) - Fixed the double-loop break (Dave) - Stored the index to the configured link frequency so it can be used later on. drivers/media/i2c/ov7251.c | 78 +++++++++++++++++++++++++++++--------- 1 file changed, 60 insertions(+), 18 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index d6fe574cb9e0..613b2c80a2a8 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -60,6 +60,11 @@ struct ov7251_mode_info { struct v4l2_fract timeperframe; }; +enum supported_link_freqs { + OV7251_LINK_FREQ_240_MHZ, + OV7251_NUM_SUPPORTED_LINK_FREQS +}; + struct ov7251 { struct i2c_client *i2c_client; struct device *dev; @@ -75,6 +80,7 @@ struct ov7251 { struct regulator *core_regulator; struct regulator *analog_regulator; + enum supported_link_freqs link_freq_idx; const struct ov7251_mode_info *current_mode; struct v4l2_ctrl_handler ctrls; @@ -1255,10 +1261,61 @@ static const struct v4l2_subdev_ops ov7251_subdev_ops = { .pad = &ov7251_subdev_pad_ops, }; +static int ov7251_check_hwcfg(struct ov7251 *ov7251) +{ + struct fwnode_handle *fwnode = dev_fwnode(ov7251->dev); + struct v4l2_fwnode_endpoint bus_cfg = { + .bus_type = V4L2_MBUS_CSI2_DPHY, + }; + struct fwnode_handle *endpoint; + bool freq_found = false; + unsigned int i, j; + int ret; + + endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); + if (!endpoint) + return -EPROBE_DEFER; /* could be provided by cio2-bridge */ + + ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg); + fwnode_handle_put(endpoint); + if (ret) + return dev_err_probe(ov7251->dev, ret, + "parsing endpoint node failed\n"); + + if (!bus_cfg.nr_of_link_frequencies) { + dev_err(ov7251->dev, "no link frequencies defined\n"); + ret = -EINVAL; + goto out_free_bus_cfg; + } + + for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) { + for (j = 0; j < ARRAY_SIZE(link_freq); j++) + if (bus_cfg.link_frequencies[i] == link_freq[j]) { + freq_found = true; + break; + } + + if (freq_found) + break; + } + + if (i == bus_cfg.nr_of_link_frequencies) { + dev_err(ov7251->dev, "no supported link freq found\n"); + ret = -EINVAL; + goto out_free_bus_cfg; + } + + ov7251->link_freq_idx = i; + +out_free_bus_cfg: + v4l2_fwnode_endpoint_free(&bus_cfg); + + return ret; +} + static int ov7251_probe(struct i2c_client *client) { struct device *dev = &client->dev; - struct fwnode_handle *endpoint; struct ov7251 *ov7251; u8 chip_id_high, chip_id_low, chip_rev; int ret; @@ -1270,24 +1327,9 @@ static int ov7251_probe(struct i2c_client *client) ov7251->i2c_client = client; ov7251->dev = dev; - endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); - if (!endpoint) { - dev_err(dev, "endpoint node not found\n"); - return -EINVAL; - } - - ret = v4l2_fwnode_endpoint_parse(endpoint, &ov7251->ep); - fwnode_handle_put(endpoint); - if (ret < 0) { - dev_err(dev, "parsing endpoint node failed\n"); + ret = ov7251_check_hwcfg(ov7251); + if (ret) return ret; - } - - if (ov7251->ep.bus_type != V4L2_MBUS_CSI2_DPHY) { - dev_err(dev, "invalid bus type (%u), must be CSI2 (%u)\n", - ov7251->ep.bus_type, V4L2_MBUS_CSI2_DPHY); - return -EINVAL; - } /* get system clock (xclk) */ ov7251->xclk = devm_clk_get(dev, "xclk"); From patchwork Fri Feb 25 00:07:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81613C433FE for ; Fri, 25 Feb 2022 00:08:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234368AbiBYAIx (ORCPT ); Thu, 24 Feb 2022 19:08:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233916AbiBYAIv (ORCPT ); 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[86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:18 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 05/11] media: i2c: Remove per-mode frequencies from ov7251 Date: Fri, 25 Feb 2022 00:07:47 +0000 Message-Id: <20220225000753.511996-6-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Each of the defined modes in the ov7251 driver uses the same link frequency and pixel rate; just drop those members of the modes and set the controls to read only during initialisation. Add a new table defining the supported pixel rates to substitue for the values hardcoded in the modes. Signed-off-by: Daniel Scally --- Changes in v2: - New patch drivers/media/i2c/ov7251.c | 43 +++++++++++++------------------------- 1 file changed, 14 insertions(+), 29 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index 613b2c80a2a8..90bf6a868741 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -526,7 +526,11 @@ static const struct reg_value ov7251_setting_vga_90fps[] = { }; static const s64 link_freq[] = { - 240000000, + [OV7251_LINK_FREQ_240_MHZ] = 240000000, +}; + +static const s64 pixel_rates[] = { + [OV7251_LINK_FREQ_240_MHZ] = 48000000, }; static const struct ov7251_mode_info ov7251_mode_info_data[] = { @@ -535,8 +539,6 @@ static const struct ov7251_mode_info ov7251_mode_info_data[] = { .height = 480, .data = ov7251_setting_vga_30fps, .data_size = ARRAY_SIZE(ov7251_setting_vga_30fps), - .pixel_clock = 48000000, - .link_freq = 0, /* an index in link_freq[] */ .exposure_max = 1704, .exposure_def = 504, .timeperframe = { @@ -549,8 +551,6 @@ static const struct ov7251_mode_info ov7251_mode_info_data[] = { .height = 480, .data = ov7251_setting_vga_60fps, .data_size = ARRAY_SIZE(ov7251_setting_vga_60fps), - .pixel_clock = 48000000, - .link_freq = 0, /* an index in link_freq[] */ .exposure_max = 840, .exposure_def = 504, .timeperframe = { @@ -563,8 +563,6 @@ static const struct ov7251_mode_info ov7251_mode_info_data[] = { .height = 480, .data = ov7251_setting_vga_90fps, .data_size = ARRAY_SIZE(ov7251_setting_vga_90fps), - .pixel_clock = 48000000, - .link_freq = 0, /* an index in link_freq[] */ .exposure_max = 552, .exposure_def = 504, .timeperframe = { @@ -1059,16 +1057,6 @@ static int ov7251_set_format(struct v4l2_subdev *sd, __crop->height = new_mode->height; if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { - ret = __v4l2_ctrl_s_ctrl_int64(ov7251->pixel_clock, - new_mode->pixel_clock); - if (ret < 0) - goto exit; - - ret = __v4l2_ctrl_s_ctrl(ov7251->link_freq, - new_mode->link_freq); - if (ret < 0) - goto exit; - ret = __v4l2_ctrl_modify_range(ov7251->exposure, 1, new_mode->exposure_max, 1, new_mode->exposure_def); @@ -1199,16 +1187,6 @@ static int ov7251_set_frame_interval(struct v4l2_subdev *subdev, new_mode = ov7251_find_mode_by_ival(ov7251, &fi->interval); if (new_mode != ov7251->current_mode) { - ret = __v4l2_ctrl_s_ctrl_int64(ov7251->pixel_clock, - new_mode->pixel_clock); - if (ret < 0) - goto exit; - - ret = __v4l2_ctrl_s_ctrl(ov7251->link_freq, - new_mode->link_freq); - if (ret < 0) - goto exit; - ret = __v4l2_ctrl_modify_range(ov7251->exposure, 1, new_mode->exposure_max, 1, new_mode->exposure_def); @@ -1318,6 +1296,7 @@ static int ov7251_probe(struct i2c_client *client) struct device *dev = &client->dev; struct ov7251 *ov7251; u8 chip_id_high, chip_id_low, chip_rev; + s64 pixel_rate; int ret; ov7251 = devm_kzalloc(dev, sizeof(struct ov7251), GFP_KERNEL); @@ -1399,17 +1378,23 @@ static int ov7251_probe(struct i2c_client *client) V4L2_CID_TEST_PATTERN, ARRAY_SIZE(ov7251_test_pattern_menu) - 1, 0, 0, ov7251_test_pattern_menu); + + pixel_rate = pixel_rates[ov7251->link_freq_idx]; ov7251->pixel_clock = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops, V4L2_CID_PIXEL_RATE, - 1, INT_MAX, 1, 1); + pixel_rate, INT_MAX, + pixel_rate, pixel_rate); ov7251->link_freq = v4l2_ctrl_new_int_menu(&ov7251->ctrls, &ov7251_ctrl_ops, V4L2_CID_LINK_FREQ, ARRAY_SIZE(link_freq) - 1, - 0, link_freq); + ov7251->link_freq_idx, + link_freq); if (ov7251->link_freq) ov7251->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + if (ov7251->pixel_clock) + ov7251->pixel_clock->flags |= V4L2_CTRL_FLAG_READ_ONLY; ov7251->sd.ctrl_handler = &ov7251->ctrls; From patchwork Fri Feb 25 00:07:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759446 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F8D4C433F5 for ; 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[86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:19 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 06/11] media: i2c: Add ov7251_pll_configure() Date: Fri, 25 Feb 2022 00:07:48 +0000 Message-Id: <20220225000753.511996-7-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Rather than having the pll settings hidden inside mode blobs, define them in structs and use a dedicated function to set them. This makes it simpler to extend the driver to support other frequencies for both the external clock and desired link frequency. Signed-off-by: Daniel Scally --- Changes in v2: - Updated to support different link-frequencies in addition to different external clock frequencies. drivers/media/i2c/ov7251.c | 175 ++++++++++++++++++++++++++++++------- 1 file changed, 145 insertions(+), 30 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index 90bf6a868741..4e88bbf4d828 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -42,6 +42,16 @@ #define OV7251_TIMING_FORMAT2_MIRROR BIT(2) #define OV7251_PRE_ISP_00 0x5e00 #define OV7251_PRE_ISP_00_TEST_PATTERN BIT(7) +#define OV7251_PLL1_PRE_DIV_REG 0x30b4 +#define OV7251_PLL1_MULT_REG 0x30b3 +#define OV7251_PLL1_DIVIDER_REG 0x30b1 +#define OV7251_PLL1_PIX_DIV_REG 0x30b0 +#define OV7251_PLL1_MIPI_DIV_REG 0x30b5 +#define OV7251_PLL2_PRE_DIV_REG 0x3098 +#define OV7251_PLL2_MULT_REG 0x3099 +#define OV7251_PLL2_DIVIDER_REG 0x309d +#define OV7251_PLL2_SYS_DIV_REG 0x309a +#define OV7251_PLL2_ADC_DIV_REG 0x309b struct reg_value { u16 reg; @@ -60,6 +70,36 @@ struct ov7251_mode_info { struct v4l2_fract timeperframe; }; +struct ov7251_pll1_cfg { + unsigned int pre_div; + unsigned int mult; + unsigned int div; + unsigned int pix_div; + unsigned int mipi_div; +}; + +struct ov7251_pll2_cfg { + unsigned int pre_div; + unsigned int mult; + unsigned int div; + unsigned int sys_div; + unsigned int adc_div; +}; + +/* + * Rubbish ordering, but only PLL1 needs to have a separate configuration per + * link frequency and the array member needs to be last. + */ +struct ov7251_pll_cfgs { + const struct ov7251_pll2_cfg *pll2; + const struct ov7251_pll1_cfg *pll1[]; +}; + +enum xclk_rate { + OV7251_24_MHZ, + OV7251_NUM_SUPPORTED_RATES +}; + enum supported_link_freqs { OV7251_LINK_FREQ_240_MHZ, OV7251_NUM_SUPPORTED_LINK_FREQS @@ -80,6 +120,7 @@ struct ov7251 { struct regulator *core_regulator; struct regulator *analog_regulator; + const struct ov7251_pll_cfgs *pll_cfgs; enum supported_link_freqs link_freq_idx; const struct ov7251_mode_info *current_mode; @@ -106,6 +147,33 @@ static inline struct ov7251 *to_ov7251(struct v4l2_subdev *sd) return container_of(sd, struct ov7251, sd); } +static const struct ov7251_pll1_cfg ov7251_pll1_cfg_24_mhz_240_mhz = { + .pre_div = 0x03, + .mult = 0x64, + .div = 0x01, + .pix_div = 0x0a, + .mipi_div = 0x05 +}; + +static const struct ov7251_pll2_cfg ov7251_pll2_cfg_24_mhz = { + .pre_div = 0x04, + .mult = 0x28, + .div = 0x00, + .sys_div = 0x05, + .adc_div = 0x04 +}; + +static const struct ov7251_pll_cfgs ov7251_pll_cfgs_24_mhz = { + .pll2 = &ov7251_pll2_cfg_24_mhz, + .pll1 = { + [OV7251_LINK_FREQ_240_MHZ] = &ov7251_pll1_cfg_24_mhz_240_mhz, + } +}; + +static const struct ov7251_pll_cfgs *ov7251_pll_cfgs[] = { + [OV7251_24_MHZ] = &ov7251_pll_cfgs_24_mhz +}; + static const struct reg_value ov7251_global_init_setting[] = { { 0x0103, 0x01 }, { 0x303b, 0x02 }, @@ -124,16 +192,6 @@ static const struct reg_value ov7251_setting_vga_30fps[] = { { 0x301c, 0xf0 }, { 0x3023, 0x05 }, { 0x3037, 0xf0 }, - { 0x3098, 0x04 }, /* pll2 pre divider */ - { 0x3099, 0x28 }, /* pll2 multiplier */ - { 0x309a, 0x05 }, /* pll2 sys divider */ - { 0x309b, 0x04 }, /* pll2 adc divider */ - { 0x309d, 0x00 }, /* pll2 divider */ - { 0x30b0, 0x0a }, /* pll1 pix divider */ - { 0x30b1, 0x01 }, /* pll1 divider */ - { 0x30b3, 0x64 }, /* pll1 multiplier */ - { 0x30b4, 0x03 }, /* pll1 pre divider */ - { 0x30b5, 0x05 }, /* pll1 mipi divider */ { 0x3106, 0xda }, { 0x3503, 0x07 }, { 0x3509, 0x10 }, @@ -262,16 +320,6 @@ static const struct reg_value ov7251_setting_vga_60fps[] = { { 0x301c, 0x00 }, { 0x3023, 0x05 }, { 0x3037, 0xf0 }, - { 0x3098, 0x04 }, /* pll2 pre divider */ - { 0x3099, 0x28 }, /* pll2 multiplier */ - { 0x309a, 0x05 }, /* pll2 sys divider */ - { 0x309b, 0x04 }, /* pll2 adc divider */ - { 0x309d, 0x00 }, /* pll2 divider */ - { 0x30b0, 0x0a }, /* pll1 pix divider */ - { 0x30b1, 0x01 }, /* pll1 divider */ - { 0x30b3, 0x64 }, /* pll1 multiplier */ - { 0x30b4, 0x03 }, /* pll1 pre divider */ - { 0x30b5, 0x05 }, /* pll1 mipi divider */ { 0x3106, 0xda }, { 0x3503, 0x07 }, { 0x3509, 0x10 }, @@ -400,16 +448,6 @@ static const struct reg_value ov7251_setting_vga_90fps[] = { { 0x301c, 0x00 }, { 0x3023, 0x05 }, { 0x3037, 0xf0 }, - { 0x3098, 0x04 }, /* pll2 pre divider */ - { 0x3099, 0x28 }, /* pll2 multiplier */ - { 0x309a, 0x05 }, /* pll2 sys divider */ - { 0x309b, 0x04 }, /* pll2 adc divider */ - { 0x309d, 0x00 }, /* pll2 divider */ - { 0x30b0, 0x0a }, /* pll1 pix divider */ - { 0x30b1, 0x01 }, /* pll1 divider */ - { 0x30b3, 0x64 }, /* pll1 multiplier */ - { 0x30b4, 0x03 }, /* pll1 pre divider */ - { 0x30b5, 0x05 }, /* pll1 mipi divider */ { 0x3106, 0xda }, { 0x3503, 0x07 }, { 0x3509, 0x10 }, @@ -525,6 +563,10 @@ static const struct reg_value ov7251_setting_vga_90fps[] = { { 0x5001, 0x80 }, }; +static const unsigned long supported_xclk_rates[] = { + [OV7251_24_MHZ] = 24000000, +}; + static const s64 link_freq[] = { [OV7251_LINK_FREQ_240_MHZ] = 240000000, }; @@ -696,6 +738,63 @@ static int ov7251_read_reg(struct ov7251 *ov7251, u16 reg, u8 *val) return 0; } +static int ov7251_pll_configure(struct ov7251 *ov7251) +{ + const struct ov7251_pll_cfgs *configs; + int ret; + + configs = ov7251->pll_cfgs; + + ret = ov7251_write_reg(ov7251, OV7251_PLL1_PRE_DIV_REG, + configs->pll1[ov7251->link_freq_idx]->pre_div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL1_MULT_REG, + configs->pll1[ov7251->link_freq_idx]->mult); + if (ret < 0) + return ret; + ret = ov7251_write_reg(ov7251, OV7251_PLL1_DIVIDER_REG, + configs->pll1[ov7251->link_freq_idx]->div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL1_PIX_DIV_REG, + configs->pll1[ov7251->link_freq_idx]->pix_div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL1_MIPI_DIV_REG, + configs->pll1[ov7251->link_freq_idx]->mipi_div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL2_PRE_DIV_REG, + configs->pll2->pre_div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL2_MULT_REG, + configs->pll2->mult); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL2_DIVIDER_REG, + configs->pll2->div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL2_SYS_DIV_REG, + configs->pll2->sys_div); + if (ret < 0) + return ret; + + ret = ov7251_write_reg(ov7251, OV7251_PLL2_ADC_DIV_REG, + configs->pll2->adc_div); + + return ret; +} + static int ov7251_set_exposure(struct ov7251 *ov7251, s32 exposure) { u16 reg; @@ -1137,6 +1236,11 @@ static int ov7251_s_stream(struct v4l2_subdev *subdev, int enable) mutex_lock(&ov7251->lock); if (enable) { + ret = ov7251_pll_configure(ov7251); + if (ret) + return dev_err_probe(ov7251->dev, ret, + "error configuring PLLs\n"); + ret = ov7251_set_register_array(ov7251, ov7251->current_mode->data, ov7251->current_mode->data_size); @@ -1298,6 +1402,7 @@ static int ov7251_probe(struct i2c_client *client) u8 chip_id_high, chip_id_low, chip_rev; s64 pixel_rate; int ret; + int i; ov7251 = devm_kzalloc(dev, sizeof(struct ov7251), GFP_KERNEL); if (!ov7251) @@ -1336,6 +1441,16 @@ static int ov7251_probe(struct i2c_client *client) dev_err(dev, "could not set xclk frequency\n"); return ret; } + for (i = 0; i < ARRAY_SIZE(supported_xclk_rates); i++) + if (ov7251->xclk_freq == supported_xclk_rates[i]) + break; + + if (i == ARRAY_SIZE(supported_xclk_rates)) + return dev_err_probe(dev, -EINVAL, + "clock rate %u Hz is unsupported\n", + ov7251->xclk_freq); + + ov7251->pll_cfgs = ov7251_pll_cfgs[i]; ov7251->io_regulator = devm_regulator_get(dev, "vdddo"); if (IS_ERR(ov7251->io_regulator)) { From patchwork Fri Feb 25 00:07:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58FFAC43219 for ; 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[86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:20 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 07/11] media: i2c: Add support for new frequencies to ov7251 Date: Fri, 25 Feb 2022 00:07:49 +0000 Message-Id: <20220225000753.511996-8-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The OV7251 sensor is used as the IR camera sensor on the Microsoft Surface line of tablets; this provides a 19.2MHz external clock, and the Windows driver for this sensor configures a 319.2MHz link freq to the CSI-2 receiver. Add the ability to support those rate to the driver by defining a new set of PLL configs. Signed-off-by: Daniel Scally --- Changes in v2: - Added support for 319.2MHz link frequency drivers/media/i2c/ov7251.c | 79 ++++++++++++++++++++++++++++++-------- 1 file changed, 63 insertions(+), 16 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index 4e88bbf4d828..d4843e797568 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -96,12 +96,14 @@ struct ov7251_pll_cfgs { }; enum xclk_rate { + OV7251_19_2_MHZ, OV7251_24_MHZ, OV7251_NUM_SUPPORTED_RATES }; enum supported_link_freqs { OV7251_LINK_FREQ_240_MHZ, + OV7251_LINK_FREQ_319_2_MHZ, OV7251_NUM_SUPPORTED_LINK_FREQS }; @@ -147,6 +149,22 @@ static inline struct ov7251 *to_ov7251(struct v4l2_subdev *sd) return container_of(sd, struct ov7251, sd); } +static const struct ov7251_pll1_cfg ov7251_pll1_cfg_19_2_mhz_240_mhz = { + .pre_div = 0x03, + .mult = 0x4b, + .div = 0x01, + .pix_div = 0x0a, + .mipi_div = 0x05 +}; + +static const struct ov7251_pll1_cfg ov7251_pll1_cfg_19_2_mhz_319_2_mhz = { + .pre_div = 0x01, + .mult = 0x85, + .div = 0x04, + .pix_div = 0x0a, + .mipi_div = 0x05 +}; + static const struct ov7251_pll1_cfg ov7251_pll1_cfg_24_mhz_240_mhz = { .pre_div = 0x03, .mult = 0x64, @@ -155,6 +173,22 @@ static const struct ov7251_pll1_cfg ov7251_pll1_cfg_24_mhz_240_mhz = { .mipi_div = 0x05 }; +static const struct ov7251_pll1_cfg ov7251_pll1_cfg_24_mhz_319_2_mhz = { + .pre_div = 0x05, + .mult = 0x85, + .div = 0x02, + .pix_div = 0x0a, + .mipi_div = 0x05 +}; + +static const struct ov7251_pll2_cfg ov7251_pll2_cfg_19_2_mhz = { + .pre_div = 0x04, + .mult = 0x32, + .div = 0x00, + .sys_div = 0x05, + .adc_div = 0x04 +}; + static const struct ov7251_pll2_cfg ov7251_pll2_cfg_24_mhz = { .pre_div = 0x04, .mult = 0x28, @@ -163,14 +197,24 @@ static const struct ov7251_pll2_cfg ov7251_pll2_cfg_24_mhz = { .adc_div = 0x04 }; +static const struct ov7251_pll_cfgs ov7251_pll_cfgs_19_2_mhz = { + .pll2 = &ov7251_pll2_cfg_19_2_mhz, + .pll1 = { + [OV7251_LINK_FREQ_240_MHZ] = &ov7251_pll1_cfg_19_2_mhz_240_mhz, + [OV7251_LINK_FREQ_319_2_MHZ] = &ov7251_pll1_cfg_19_2_mhz_319_2_mhz, + } +}; + static const struct ov7251_pll_cfgs ov7251_pll_cfgs_24_mhz = { .pll2 = &ov7251_pll2_cfg_24_mhz, .pll1 = { [OV7251_LINK_FREQ_240_MHZ] = &ov7251_pll1_cfg_24_mhz_240_mhz, + [OV7251_LINK_FREQ_319_2_MHZ] = &ov7251_pll1_cfg_24_mhz_319_2_mhz, } }; static const struct ov7251_pll_cfgs *ov7251_pll_cfgs[] = { + [OV7251_19_2_MHZ] = &ov7251_pll_cfgs_19_2_mhz, [OV7251_24_MHZ] = &ov7251_pll_cfgs_24_mhz }; @@ -564,15 +608,18 @@ static const struct reg_value ov7251_setting_vga_90fps[] = { }; static const unsigned long supported_xclk_rates[] = { + [OV7251_19_2_MHZ] = 19200000, [OV7251_24_MHZ] = 24000000, }; static const s64 link_freq[] = { [OV7251_LINK_FREQ_240_MHZ] = 240000000, + [OV7251_LINK_FREQ_319_2_MHZ] = 319200000, }; static const s64 pixel_rates[] = { [OV7251_LINK_FREQ_240_MHZ] = 48000000, + [OV7251_LINK_FREQ_319_2_MHZ] = 63840000, }; static const struct ov7251_mode_info ov7251_mode_info_data[] = { @@ -1400,6 +1447,7 @@ static int ov7251_probe(struct i2c_client *client) struct device *dev = &client->dev; struct ov7251 *ov7251; u8 chip_id_high, chip_id_low, chip_rev; + unsigned int rate = 0; s64 pixel_rate; int ret; int i; @@ -1416,31 +1464,30 @@ static int ov7251_probe(struct i2c_client *client) return ret; /* get system clock (xclk) */ - ov7251->xclk = devm_clk_get(dev, "xclk"); + ov7251->xclk = devm_clk_get(dev, NULL); if (IS_ERR(ov7251->xclk)) { dev_err(dev, "could not get xclk"); return PTR_ERR(ov7251->xclk); } + /* + * We could have either a 24MHz or 19.2MHz clock rate from either dt or + * ACPI. We also need to support the IPU3 case which will have both an + * external clock AND a clock-frequency property. + */ ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", - &ov7251->xclk_freq); - if (ret) { - dev_err(dev, "could not get xclk frequency\n"); - return ret; + &rate); + if (!ret && ov7251->xclk) { + ret = clk_set_rate(ov7251->xclk, rate); + if (ret) + return dev_err_probe(dev, ret, + "failed to set clock rate\n"); + } else if (ret && !ov7251->xclk) { + return dev_err_probe(dev, ret, "invalid clock config\n"); } - /* external clock must be 24MHz, allow 1% tolerance */ - if (ov7251->xclk_freq < 23760000 || ov7251->xclk_freq > 24240000) { - dev_err(dev, "external clock frequency %u is not supported\n", - ov7251->xclk_freq); - return -EINVAL; - } + ov7251->xclk_freq = rate ? rate : clk_get_rate(ov7251->xclk); - ret = clk_set_rate(ov7251->xclk, ov7251->xclk_freq); - if (ret) { - dev_err(dev, "could not set xclk frequency\n"); - return ret; - } for (i = 0; i < ARRAY_SIZE(supported_xclk_rates); i++) if (ov7251->xclk_freq == supported_xclk_rates[i]) break; From patchwork Fri Feb 25 00:07:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6A6DC433EF for ; Fri, 25 Feb 2022 00:08:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235035AbiBYAIz (ORCPT ); Thu, 24 Feb 2022 19:08:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234542AbiBYAIy (ORCPT ); Thu, 24 Feb 2022 19:08:54 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B55F14562A for ; Thu, 24 Feb 2022 16:08:23 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id s13so2030241wrb.6 for ; Thu, 24 Feb 2022 16:08:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gtexmTF7iAzwBQml2a/LaIYAccUirTFqnqgi2qHcXv0=; b=EG2JhitasINNRO3s2Fa93O+h+k6Ld3ef7YfIJVO7VNgRLyLzaeIYq3TkypxhhPyWGB 2yfv/8eC+vvvDUcFzvMYP7TgWLwMnXeyJ6+kn9vCsZ1dZLuTQw6o7fUC4JGTWwjQRfu2 J5E4H8Gd2G8gQ6kubJe9OZB0ieAcpNmMbssLG4jUTNK3SX2i3biNo8nEblxBkz41Bo27 I+oW7fh+MzglDYSg2lB4FyQnQUSc6pl+vyeyj8bP1QYPLuH66jaLPr+K/TDoHqmVC6kl tz4umZbDE4TXO80Jbj7GiOJk5ZTvvy3NaqqrSvYiyXBgXT1spaOqI5ud1EOxrVLVWuql 6FAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gtexmTF7iAzwBQml2a/LaIYAccUirTFqnqgi2qHcXv0=; b=g7jFFAqM88moblisaZyRt1m2h/1geiQrGmeLUNexUDe9hlyatfPrrV4O3rV9hr9N17 zChD/Y9r8+xlEWQiujxqQROJU9EixJiSA7d3z1kzqMM4FFsUqekbksfwT4FbufUkJVyz jTV/GKqn3z7q7FlkoSAdbajeAX/FUf/gVVlwsHC2hdjAhMzijh3JeiVhAyHqT3KAUT2h sn7nmNqA5sPIlDOZvQ+ssqFemwmyKlTTl8M01kZj1xtsMvWK5cXWXKl0tdO+xr/5LBRD WP5fTa/g+K02mVqFo7RaoD5KxqbM7bqf/3c9N/+DM5+UuN7X465Ya9lCPO9ijHnsSpWC lbdA== X-Gm-Message-State: AOAM531ZSf6vlWuW45wueFKQap0jk3IlvzvZqcbccjJ2tUmlTAUYR4bl FYHBaOftNN5WJ9MiUkivEY1479C+DyIq3w== X-Google-Smtp-Source: ABdhPJyZAC80yXunuzsfBVesuIwOJXJjbH8ioWzqgMKzzSEG9mwkBuwOyDjcuXYnLWcfAZHT6Wc2uw== X-Received: by 2002:adf:f1ca:0:b0:1ed:e2d7:b5f3 with SMTP id z10-20020adff1ca000000b001ede2d7b5f3mr4147035wro.75.1645747701877; Thu, 24 Feb 2022 16:08:21 -0800 (PST) Received: from localhost.localdomain (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net. [86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:21 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 08/11] media: i2c: Add ov7251_detect_chip() Date: Fri, 25 Feb 2022 00:07:50 +0000 Message-Id: <20220225000753.511996-9-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org .probe() is quite busy for this driver; make it cleaner by moving the chip verification to a dedicated function. Signed-off-by: Daniel Scally --- Changes in v2: - None drivers/media/i2c/ov7251.c | 62 +++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 27 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index d4843e797568..0c6970b01c6b 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -1442,11 +1442,43 @@ static int ov7251_check_hwcfg(struct ov7251 *ov7251) return ret; } +static int ov7251_detect_chip(struct ov7251 *ov7251) +{ + u8 chip_id_high, chip_id_low, chip_rev; + int ret; + + ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_HIGH, &chip_id_high); + if (ret < 0 || chip_id_high != OV7251_CHIP_ID_HIGH_BYTE) + return dev_err_probe(ov7251->dev, -ENODEV, + "could not read ID high\n"); + + ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_LOW, &chip_id_low); + if (ret < 0 || chip_id_low != OV7251_CHIP_ID_LOW_BYTE) + return dev_err_probe(ov7251->dev, -ENODEV, + "could not read ID low\n"); + + ret = ov7251_read_reg(ov7251, OV7251_SC_GP_IO_IN1, &chip_rev); + if (ret < 0) + return dev_err_probe(ov7251->dev, -ENODEV, + "could not read revision\n"); + chip_rev >>= 4; + + dev_info(ov7251->dev, + "OV7251 revision %x (%s) detected at address 0x%02x\n", + chip_rev, + chip_rev == 0x4 ? "1A / 1B" : + chip_rev == 0x5 ? "1C / 1D" : + chip_rev == 0x6 ? "1E" : + chip_rev == 0x7 ? "1F" : "unknown", + ov7251->i2c_client->addr); + + return 0; +} + static int ov7251_probe(struct i2c_client *client) { struct device *dev = &client->dev; struct ov7251 *ov7251; - u8 chip_id_high, chip_id_low, chip_rev; unsigned int rate = 0; s64 pixel_rate; int ret; @@ -1585,34 +1617,10 @@ static int ov7251_probe(struct i2c_client *client) goto free_entity; } - ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_HIGH, &chip_id_high); - if (ret < 0 || chip_id_high != OV7251_CHIP_ID_HIGH_BYTE) { - dev_err(dev, "could not read ID high\n"); - ret = -ENODEV; - goto power_down; - } - ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_LOW, &chip_id_low); - if (ret < 0 || chip_id_low != OV7251_CHIP_ID_LOW_BYTE) { - dev_err(dev, "could not read ID low\n"); - ret = -ENODEV; - goto power_down; - } - - ret = ov7251_read_reg(ov7251, OV7251_SC_GP_IO_IN1, &chip_rev); - if (ret < 0) { - dev_err(dev, "could not read revision\n"); - ret = -ENODEV; + ret = ov7251_detect_chip(ov7251); + if (ret) goto power_down; - } - chip_rev >>= 4; - dev_info(dev, "OV7251 revision %x (%s) detected at address 0x%02x\n", - chip_rev, - chip_rev == 0x4 ? "1A / 1B" : - chip_rev == 0x5 ? "1C / 1D" : - chip_rev == 0x6 ? "1E" : - chip_rev == 0x7 ? "1F" : "unknown", - client->addr); ret = ov7251_read_reg(ov7251, OV7251_PRE_ISP_00, &ov7251->pre_isp_00); From patchwork Fri Feb 25 00:07:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759448 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EADF3C433EF for ; Fri, 25 Feb 2022 00:08:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235434AbiBYAI5 (ORCPT ); Thu, 24 Feb 2022 19:08:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235118AbiBYAIz (ORCPT ); Thu, 24 Feb 2022 19:08:55 -0500 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F96F145AF1 for ; Thu, 24 Feb 2022 16:08:24 -0800 (PST) Received: by mail-wr1-x430.google.com with SMTP id n14so2020766wrq.7 for ; Thu, 24 Feb 2022 16:08:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YMyJh52bjz22zVGTjYAVVvMzXE1AZXkz4nt9vXd2P3I=; b=Q1ykHtu8UIFOqIE77jCE99+tkuAO7QhnWy+9V2d5yTvUaLEY2DxrDZORpzMsbNtokp PPz7F4WP79dHTOHWViqBdJObEIb7lSegBHy9XLqHuMPtkKrftyQwflcIps4++bcL5f5n NTBQlhQMSEE4FDgMovo9vecBlxuJ33OK7LutPMFYq9DD/iRd9uiPilJaG/O4Kq14HzNz sBY3iWXNr6AOQFjfaWSSuaSs6S5QqFqgi7P+sepCKyRMfaCGyIjxslZtO4mvj0+93/xH 2H5cc6KMV6DeRvDTZu/ZPVcfj5vRDDbv+WiLypK6IcJh5h0dC1F7jWLTV5VEmghpbBFX ygNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YMyJh52bjz22zVGTjYAVVvMzXE1AZXkz4nt9vXd2P3I=; b=MJW0ryFWYctiLJOGt7iA1B3/tfrnHI17J7LZVs1691/M40yEb7wETTbqlelsblAeJK HeOpWFp6NjqKzMoqHJqO5thcfcQ9WkrYNbVbBTKiYkbgIvmeo1nwPGwBKg3z/tm4I4yD 2SNm6ex4gstuPR4cn1H6Y0+B8H5LMhRtm9MHpuyatYk2weSNe/X559wZT8RzHZ0qJn5N /z3gcDQueT1nWfy6cPaa1GiNKixpjGNp9YVPwRAHCqMZmn5Nm2cU6XX2inhUVlo8vWNV Vx/ifsrZJ4rqXMOts/hr1Hb3Ofva8bmbV4UaTxdFuUF1A0sMk516Ma/0u6dLQbeWPh2f 7P9w== X-Gm-Message-State: AOAM533WZKAkHysivpsYCqBNWW4L7OEDBhncHY8bozD//dLYCikNrIf3 7lckt649tKxYh50XWWc4AyjWxFt77As8IA== X-Google-Smtp-Source: ABdhPJwSsLyVwVKDiawk9+FZejp3GN3KCyWW+pmvilWVqNWJBrMdlGGTeFh5VE4UaUKP9COLXCYRyQ== X-Received: by 2002:a05:6000:16c5:b0:1ed:b04d:300 with SMTP id h5-20020a05600016c500b001edb04d0300mr4108441wrf.347.1645747702736; Thu, 24 Feb 2022 16:08:22 -0800 (PST) Received: from localhost.localdomain (cpc141996-chfd3-2-0-cust928.12-3.cable.virginm.net. [86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:22 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 09/11] media: i2c: Add pm_runtime support to ov7251 Date: Fri, 25 Feb 2022 00:07:51 +0000 Message-Id: <20220225000753.511996-10-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add pm_runtime support to the ov7251 driver. Signed-off-by: Daniel Scally --- Changes in v2: - Switched ov7251_set_power_[on|off]() to take a struct device * as the input parameter and used those functions for pm_runtime instead of adding wrappers (Sakari) drivers/media/i2c/ov7251.c | 81 ++++++++++++++++++++++++++++---------- 1 file changed, 60 insertions(+), 21 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index 0c6970b01c6b..724f651212f1 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -883,8 +884,11 @@ static int ov7251_set_register_array(struct ov7251 *ov7251, return 0; } -static int ov7251_set_power_on(struct ov7251 *ov7251) +static int ov7251_set_power_on(struct device *dev) { + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov7251 *ov7251 = to_ov7251(sd); int ret; u32 wait_us; @@ -909,11 +913,17 @@ static int ov7251_set_power_on(struct ov7251 *ov7251) return 0; } -static void ov7251_set_power_off(struct ov7251 *ov7251) +static int ov7251_set_power_off(struct device *dev) { + struct i2c_client *client = container_of(dev, struct i2c_client, dev); + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct ov7251 *ov7251 = to_ov7251(sd); + clk_disable_unprepare(ov7251->xclk); gpiod_set_value_cansleep(ov7251->enable_gpio, 0); ov7251_regulators_disable(ov7251); + + return 0; } static int ov7251_s_power(struct v4l2_subdev *sd, int on) @@ -928,7 +938,7 @@ static int ov7251_s_power(struct v4l2_subdev *sd, int on) goto exit; if (on) { - ret = ov7251_set_power_on(ov7251); + ret = ov7251_set_power_on(ov7251->dev); if (ret < 0) goto exit; @@ -937,13 +947,13 @@ static int ov7251_s_power(struct v4l2_subdev *sd, int on) ARRAY_SIZE(ov7251_global_init_setting)); if (ret < 0) { dev_err(ov7251->dev, "could not set init registers\n"); - ov7251_set_power_off(ov7251); + ov7251_set_power_off(ov7251->dev); goto exit; } ov7251->power_on = true; } else { - ov7251_set_power_off(ov7251); + ov7251_set_power_off(ov7251->dev); ov7251->power_on = false; } @@ -1017,7 +1027,7 @@ static int ov7251_s_ctrl(struct v4l2_ctrl *ctrl) /* v4l2_ctrl_lock() locks our mutex */ - if (!ov7251->power_on) + if (!pm_runtime_get_if_in_use(ov7251->dev)) return 0; switch (ctrl->id) { @@ -1041,6 +1051,8 @@ static int ov7251_s_ctrl(struct v4l2_ctrl *ctrl) break; } + pm_runtime_put(ov7251->dev); + return ret; } @@ -1283,10 +1295,15 @@ static int ov7251_s_stream(struct v4l2_subdev *subdev, int enable) mutex_lock(&ov7251->lock); if (enable) { + ret = pm_runtime_get_sync(ov7251->dev); + if (ret < 0) + goto unlock_out; + ret = ov7251_pll_configure(ov7251); - if (ret) - return dev_err_probe(ov7251->dev, ret, - "error configuring PLLs\n"); + if (ret) { + dev_err(ov7251->dev, "error configuring PLLs\n"); + goto err_power_down; + } ret = ov7251_set_register_array(ov7251, ov7251->current_mode->data, @@ -1295,23 +1312,29 @@ static int ov7251_s_stream(struct v4l2_subdev *subdev, int enable) dev_err(ov7251->dev, "could not set mode %dx%d\n", ov7251->current_mode->width, ov7251->current_mode->height); - goto exit; + goto err_power_down; } ret = __v4l2_ctrl_handler_setup(&ov7251->ctrls); if (ret < 0) { dev_err(ov7251->dev, "could not sync v4l2 controls\n"); - goto exit; + goto err_power_down; } ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT, OV7251_SC_MODE_SELECT_STREAMING); + if (ret) + goto err_power_down; } else { ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT, OV7251_SC_MODE_SELECT_SW_STANDBY); + pm_runtime_put(ov7251->dev); } -exit: +unlock_out: mutex_unlock(&ov7251->lock); + return ret; +err_power_down: + pm_runtime_put_noidle(ov7251->dev); return ret; } @@ -1611,23 +1634,24 @@ static int ov7251_probe(struct i2c_client *client) goto free_ctrl; } - ret = ov7251_s_power(&ov7251->sd, true); - if (ret < 0) { - dev_err(dev, "could not power up OV7251\n"); + ret = ov7251_set_power_on(ov7251->dev); + if (ret) goto free_entity; - } ret = ov7251_detect_chip(ov7251); if (ret) goto power_down; + pm_runtime_set_active(&client->dev); + pm_runtime_get_noresume(&client->dev); + pm_runtime_enable(&client->dev); ret = ov7251_read_reg(ov7251, OV7251_PRE_ISP_00, &ov7251->pre_isp_00); if (ret < 0) { dev_err(dev, "could not read test pattern value\n"); ret = -ENODEV; - goto power_down; + goto err_pm_runtime; } ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT1, @@ -1635,7 +1659,7 @@ static int ov7251_probe(struct i2c_client *client) if (ret < 0) { dev_err(dev, "could not read vflip value\n"); ret = -ENODEV; - goto power_down; + goto err_pm_runtime; } ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT2, @@ -1643,10 +1667,12 @@ static int ov7251_probe(struct i2c_client *client) if (ret < 0) { dev_err(dev, "could not read hflip value\n"); ret = -ENODEV; - goto power_down; + goto err_pm_runtime; } - ov7251_s_power(&ov7251->sd, false); + pm_runtime_set_autosuspend_delay(&client->dev, 1000); + pm_runtime_use_autosuspend(&client->dev); + pm_runtime_put_autosuspend(&client->dev); ret = v4l2_async_register_subdev(&ov7251->sd); if (ret < 0) { @@ -1658,8 +1684,11 @@ static int ov7251_probe(struct i2c_client *client) return 0; +err_pm_runtime: + pm_runtime_disable(ov7251->dev); + pm_runtime_put_noidle(ov7251->dev); power_down: - ov7251_s_power(&ov7251->sd, false); + ov7251_set_power_off(ov7251->dev); free_entity: media_entity_cleanup(&ov7251->sd.entity); free_ctrl: @@ -1679,9 +1708,18 @@ static int ov7251_remove(struct i2c_client *client) v4l2_ctrl_handler_free(&ov7251->ctrls); mutex_destroy(&ov7251->lock); + pm_runtime_disable(ov7251->dev); + if (!pm_runtime_status_suspended(ov7251->dev)) + ov7251_set_power_off(ov7251->dev); + pm_runtime_set_suspended(ov7251->dev); + return 0; } +static const struct dev_pm_ops ov7251_pm_ops = { + SET_RUNTIME_PM_OPS(ov7251_set_power_off, ov7251_set_power_on, NULL) +}; + static const struct of_device_id ov7251_of_match[] = { { .compatible = "ovti,ov7251" }, { /* sentinel */ } @@ -1699,6 +1737,7 @@ static struct i2c_driver ov7251_i2c_driver = { .of_match_table = ov7251_of_match, .acpi_match_table = ov7251_acpi_match, .name = "ov7251", + .pm = &ov7251_pm_ops, }, .probe_new = ov7251_probe, .remove = ov7251_remove, From patchwork Fri Feb 25 00:07:52 2022 Content-Type: text/plain; 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[86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:23 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 10/11] media: i2c: Remove .s_power() from ov7251 Date: Fri, 25 Feb 2022 00:07:52 +0000 Message-Id: <20220225000753.511996-11-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The .s_power() callback is deprecated, and now that we have pm_runtime functionality in the driver there's no further use for it. Delete the function. Signed-off-by: Daniel Scally --- Changes in v2: - Set the global init registers as part of ov7251_set_power_on() (Sakari) drivers/media/i2c/ov7251.c | 53 +++++++------------------------------- 1 file changed, 10 insertions(+), 43 deletions(-) diff --git a/drivers/media/i2c/ov7251.c b/drivers/media/i2c/ov7251.c index 724f651212f1..e41d8ea5b712 100644 --- a/drivers/media/i2c/ov7251.c +++ b/drivers/media/i2c/ov7251.c @@ -910,7 +910,16 @@ static int ov7251_set_power_on(struct device *dev) DIV_ROUND_UP(ov7251->xclk_freq, 1000)); usleep_range(wait_us, wait_us + 1000); - return 0; + ret = ov7251_set_register_array(ov7251, + ov7251_global_init_setting, + ARRAY_SIZE(ov7251_global_init_setting)); + if (ret < 0) { + dev_err(ov7251->dev, "error during global init\n"); + ov7251_regulators_disable(ov7251); + return ret; + } + + return ret; } static int ov7251_set_power_off(struct device *dev) @@ -926,43 +935,6 @@ static int ov7251_set_power_off(struct device *dev) return 0; } -static int ov7251_s_power(struct v4l2_subdev *sd, int on) -{ - struct ov7251 *ov7251 = to_ov7251(sd); - int ret = 0; - - mutex_lock(&ov7251->lock); - - /* If the power state is not modified - no work to do. */ - if (ov7251->power_on == !!on) - goto exit; - - if (on) { - ret = ov7251_set_power_on(ov7251->dev); - if (ret < 0) - goto exit; - - ret = ov7251_set_register_array(ov7251, - ov7251_global_init_setting, - ARRAY_SIZE(ov7251_global_init_setting)); - if (ret < 0) { - dev_err(ov7251->dev, "could not set init registers\n"); - ov7251_set_power_off(ov7251->dev); - goto exit; - } - - ov7251->power_on = true; - } else { - ov7251_set_power_off(ov7251->dev); - ov7251->power_on = false; - } - -exit: - mutex_unlock(&ov7251->lock); - - return ret; -} - static int ov7251_set_hflip(struct ov7251 *ov7251, s32 value) { u8 val = ov7251->timing_format2; @@ -1387,10 +1359,6 @@ static int ov7251_set_frame_interval(struct v4l2_subdev *subdev, return ret; } -static const struct v4l2_subdev_core_ops ov7251_core_ops = { - .s_power = ov7251_s_power, -}; - static const struct v4l2_subdev_video_ops ov7251_video_ops = { .s_stream = ov7251_s_stream, .g_frame_interval = ov7251_get_frame_interval, @@ -1408,7 +1376,6 @@ static const struct v4l2_subdev_pad_ops ov7251_subdev_pad_ops = { }; static const struct v4l2_subdev_ops ov7251_subdev_ops = { - .core = &ov7251_core_ops, .video = &ov7251_video_ops, .pad = &ov7251_subdev_pad_ops, }; From patchwork Fri Feb 25 00:07:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Scally X-Patchwork-Id: 12759449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B8E9C4332F for ; Fri, 25 Feb 2022 00:08:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235439AbiBYAI5 (ORCPT ); Thu, 24 Feb 2022 19:08:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235259AbiBYAI4 (ORCPT ); Thu, 24 Feb 2022 19:08:56 -0500 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9656145AE1 for ; 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[86.13.91.161]) by smtp.gmail.com with ESMTPSA id a3-20020adfe5c3000000b001e68a5e1c20sm742668wrn.4.2022.02.24.16.08.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Feb 2022 16:08:24 -0800 (PST) From: Daniel Scally To: linux-media@vger.kernel.org Cc: yong.zhi@intel.com, sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, andriy.shevchenko@linux.intel.com, hverkuil-cisco@xs4all.nl Subject: [PATCH v2 11/11] media: ipu3-cio2: Add INT347E to cio2-bridge Date: Fri, 25 Feb 2022 00:07:53 +0000 Message-Id: <20220225000753.511996-12-djrscally@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220225000753.511996-1-djrscally@gmail.com> References: <20220225000753.511996-1-djrscally@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The OVTI7251 sensor can be found on x86 laptops with an IPU3, and so needs to be supported by the cio2-bridge. Add it to the table of supported sensors. Signed-off-by: Daniel Scally --- Changes in v2: - Switched to 319.2MHz link frequency drivers/media/pci/intel/ipu3/cio2-bridge.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/pci/intel/ipu3/cio2-bridge.c b/drivers/media/pci/intel/ipu3/cio2-bridge.c index 6bcec05ee5a8..74a971ea05cc 100644 --- a/drivers/media/pci/intel/ipu3/cio2-bridge.c +++ b/drivers/media/pci/intel/ipu3/cio2-bridge.c @@ -25,6 +25,8 @@ static const struct cio2_sensor_config cio2_supported_sensors[] = { CIO2_SENSOR_CONFIG("INT33BE", 1, 419200000), /* Omnivision OV8865 */ CIO2_SENSOR_CONFIG("INT347A", 1, 360000000), + /* Omnivision OV7251 */ + CIO2_SENSOR_CONFIG("INT347E", 1, 319200000), /* Omnivision OV2680 */ CIO2_SENSOR_CONFIG("OVTI2680", 0), };