From patchwork Fri Feb 25 02:33:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wong Vee Khee X-Patchwork-Id: 12759550 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F58DC433EF for ; Fri, 25 Feb 2022 02:27:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235390AbiBYC1m (ORCPT ); Thu, 24 Feb 2022 21:27:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55104 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231263AbiBYC1l (ORCPT ); Thu, 24 Feb 2022 21:27:41 -0500 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F3E040912; Thu, 24 Feb 2022 18:27:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645756029; x=1677292029; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=pGMxtqj6fQbBiqvL8b0jEE020+1PJHR6Ska29JmSylg=; b=ZwtE9RVNVEyFNPwaYM1RxUMkTNN56BilkbjHQQ248kMvPsNFcStVG+pu xm/J2TbbU2yyOaSzB3udNFdOvG0vfXM7AADMdmrE1dKpj054gkkm6/WUE MMF84VE7Kzk23xUUQL239f08zQkFpywAfBJnzEi08WwLkjYmx1A1teBaQ DMKDVS2/A+lIWVWL5vg9so/zlT7wwG/WEFb82rPZ52dYVrhspPF6wCi3U uRCvLQGVPndy7e+zmXyE9Ny4ev7aSyh8G27z8N+k6MZTSqNSo4hg/H9fL ZjTnbPFw77CaqDzQVSTheXPAtEXbzu3idBZl7kO8cNqwdEPP6iOemq8+M A==; X-IronPort-AV: E=McAfee;i="6200,9189,10268"; a="252132192" X-IronPort-AV: E=Sophos;i="5.90,134,1643702400"; d="scan'208";a="252132192" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2022 18:27:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,134,1643702400"; d="scan'208";a="509107432" Received: from linux.intel.com ([10.54.29.200]) by orsmga006.jf.intel.com with ESMTP; 24 Feb 2022 18:27:09 -0800 Received: from P12HL01TMIN.png.intel.com (P12HL01TMIN.png.intel.com [10.158.65.75]) by linux.intel.com (Postfix) with ESMTP id CC0B5580A6C; Thu, 24 Feb 2022 18:27:06 -0800 (PST) From: Wong Vee Khee To: "David S . Miller" , Jakub Kicinski , Maxime Coquelin Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/1] stmmac: intel: Enable 2.5Gbps for Intel AlderLake-S Date: Fri, 25 Feb 2022 10:33:25 +0800 Message-Id: <20220225023325.474242-1-vee.khee.wong@linux.intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Intel AlderLake-S platform is capable of running on 2.5GBps link speed. This patch enables 2.5Gbps link speed on AlderLake-S platform. Signed-off-by: Wong Vee Khee --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 5943ff9f21c2..32ef3df4e266 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -721,6 +721,7 @@ static int tgl_common_data(struct pci_dev *pdev, plat->rx_queues_to_use = 6; plat->tx_queues_to_use = 4; plat->clk_ptp_rate = 200000000; + plat->speed_mode_2500 = intel_speed_mode_2500; plat->safety_feat_cfg->tsoee = 1; plat->safety_feat_cfg->mrxpee = 0; @@ -740,7 +741,6 @@ static int tgl_sgmii_phy0_data(struct pci_dev *pdev, { plat->bus_id = 1; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; - plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; return tgl_common_data(pdev, plat); @@ -755,7 +755,6 @@ static int tgl_sgmii_phy1_data(struct pci_dev *pdev, { plat->bus_id = 2; plat->phy_interface = PHY_INTERFACE_MODE_SGMII; - plat->speed_mode_2500 = intel_speed_mode_2500; plat->serdes_powerup = intel_serdes_powerup; plat->serdes_powerdown = intel_serdes_powerdown; return tgl_common_data(pdev, plat);