From patchwork Fri Feb 25 11:23:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12760112 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDB8FC43219 for ; Fri, 25 Feb 2022 11:24:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240025AbiBYLYm (ORCPT ); Fri, 25 Feb 2022 06:24:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237386AbiBYLYl (ORCPT ); Fri, 25 Feb 2022 06:24:41 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42AD8222187; Fri, 25 Feb 2022 03:24:09 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E38F2FF802; Fri, 25 Feb 2022 11:24:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788247; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gSWR43aaToblAqFv5P191IJOrx2IZ9iEFW5z+SZ2EYQ=; b=Laxu9l/EgOK/pwUVbs9YdRJaGTlRjAp3kx6uAZzD4/6zNl/up28TTHSSHqLXNKN7ModAZ0 4mamyYEPZF6fdRadkQnEDy1bv37S8xcpjw7+AMnwiHo+tYSr4P6ArNyXlRp24nQuWb58VF uEtTmuYTiUvYomB00cIrmlOmCURQKLDVcFimzTFjQtN0Ecp9SNnenj3cO5uJXmWKDNLMc+ iUQTMMyz3Vl8BradOPKugD++ks+P/uBvUatPBrLqITp8pciB+Ghu36lE9+EEGx8uWEuL3g 4Ayrh+kM8RPPzUDABSHzUh5cVWSCmnJYGBZfNCrGK7hpgzaonx8ggpTNyvpKTw== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal , Geert Uytterhoeven Subject: [PATCH v3 1/7] dt-bindings: dma: Introduce RZN1 dmamux bindings Date: Fri, 25 Feb 2022 12:23:56 +0100 Message-Id: <20220225112403.505562-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- .../bindings/dma/renesas,rzn1-dmamux.yaml | 42 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml new file mode 100644 index 000000000000..e2c82e43b8b1 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 DMA mux + +maintainers: + - Miquel Raynal + +allOf: + - $ref: "dma-router.yaml#" + +properties: + compatible: + const: renesas,rzn1-dmamux + + '#dma-cells': + const: 6 + description: + The first four cells are dedicated to the master DMA controller. The fifth + cell gives the DMA mux bit index that must be set starting from 0. The + sixth cell gives the binary value that must be written there, ie. 0 or 1. + + dma-masters: + minItems: 1 + maxItems: 2 + + dma-requests: + const: 32 + +additionalProperties: false + +examples: + - | + dma-router { + compatible = "renesas,rzn1-dmamux"; + #dma-cells = <6>; + dma-masters = <&dma0 &dma1>; + dma-requests = <32>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..c70c9c39a2f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18636,6 +18636,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h From patchwork Fri Feb 25 11:23:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12760113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DD50C4332F for ; Fri, 25 Feb 2022 11:24:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240035AbiBYLYp (ORCPT ); Fri, 25 Feb 2022 06:24:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240029AbiBYLYn (ORCPT ); Fri, 25 Feb 2022 06:24:43 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2280D22322B; Fri, 25 Feb 2022 03:24:10 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id DD2BBFF80D; Fri, 25 Feb 2022 11:24:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788249; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R8STiDmAJEjWbGiRpyxIHvmf8yZDa3NwroDANq9+kYI=; b=KUh5zcZbMEeMdle5acglyJFo+4t0LPudxXWDEWcug4H7ROnrXa2zNvmuOnPE/v4vGTxkrS zPp6HEzxbzqdtwsg1mhnaEAdFm8m9F0l6pZjtMRvkRyCvw1K9kqwF3Ek0POZSP6tXvXbrV 45u8BRlndCKUb8bkEoXsn7gnQYCkLyR9Yv8YZNQ60rWQdSpFJfb2vNna9/UkHWZVcHwY9Q NUB0rQ0QT9yCHLqlzL8ubrzuirDmgPVHpMlVwwxPwzkoBgC6ZHnHESoyqevqtFrNTT545N E3NS9OwuV3FK2xr35GznFw4iHAyfaw/fmwJNjk9zEsspL50hJ1C61cYIKub+lA== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal , Geert Uytterhoeven Subject: [PATCH v3 2/7] dt-bindings: dma: Introduce RZN1 DMA compatible Date: Fri, 25 Feb 2022 12:23:57 +0100 Message-Id: <20220225112403.505562-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Just like for the NAND controller that is also on this SoC, let's provide a SoC generic and a more specific couple of compatibles for the DMA controller. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 6b35089ac017..c13649bf7f19 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -15,7 +15,13 @@ allOf: properties: compatible: - const: snps,dma-spear1340 + oneOf: + - const: snps,dma-spear1340 + - items: + - enum: + - renesas,r9a06g032-dma + - const: renesas,rzn1-dma + "#dma-cells": minimum: 3 From patchwork Fri Feb 25 11:23:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12760114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFBB0C433FE for ; Fri, 25 Feb 2022 11:24:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240042AbiBYLYr (ORCPT ); Fri, 25 Feb 2022 06:24:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240040AbiBYLYp (ORCPT ); Fri, 25 Feb 2022 06:24:45 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 28BA022322E; Fri, 25 Feb 2022 03:24:12 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id C3B78FF805; Fri, 25 Feb 2022 11:24:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788251; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2BHcC2Mozxe9quG5Eiy3NcwKha2bq8lG36BM7haylRE=; b=M1Stfuss90uANKhJ6+wnu77mrKDnufvXttF0VuBqWIYDYSDHtDEDbQJJC3dfmxMwgpW5+v ky2+KLu1UCoPoU0ZevO1tk6VgiP7g3e+9b66OpmFWpL1fHdzAJrcFDP8z0Miz/qCvwVO14 r6HyvCuE0cxVIPObH+WEfFXuzObfVAVDkL+E2QSXTGO/A2z6Bx4ZBdFBEeqVThAoUd+ngu yjGPrG0b6CeCIbm4Tm9pZE71Nlromr9q7AVg/2HuRmz7r28i7pJjHiGUJYOiLR4J1vIJIT vi7dWA9x4w+TvTvdVso1VnGsOrZ2XcpoYkW9ChXjn+axg2PR+Zp6iOnCpx4cPg== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal Subject: [PATCH v3 3/7] soc: renesas: rzn1-sysc: Export function to set dmamux Date: Fri, 25 Feb 2022 12:23:58 +0100 Message-Id: <20220225112403.505562-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal --- drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++- include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..edcdbe3152f0 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -20,9 +20,12 @@ #include #include #include +#include #include #include +#define R9A06G032_SYSCTRL_DMAMUX 0xA0 + struct r9a06g032_gate { u16 gate, reset, ready, midle, scon, mirack, mistat; @@ -315,6 +318,29 @@ struct r9a06g032_priv { void __iomem *reg; }; +/* Exported helper to access the DMAMUX register */ +static struct r9a06g032_priv *sysctrl_priv; +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) +{ + unsigned long flags; + u32 dmamux; + + if (!sysctrl_priv) + return -EPROBE_DEFER; + + spin_lock_irqsave(&sysctrl_priv->lock, flags); + + dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + + spin_unlock_irqrestore(&sysctrl_priv->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_set_dmamux); + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -922,6 +948,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) clocks->reg = of_iomap(np, 0); if (WARN_ON(!clocks->reg)) return -ENOMEM; + for (i = 0; i < ARRAY_SIZE(r9a06g032_clocks); ++i) { const struct r9a06g032_clkdesc *d = &r9a06g032_clocks[i]; const char *parent_name = d->source ? @@ -963,7 +990,13 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) if (error) return error; - return r9a06g032_add_clk_domain(dev); + error = r9a06g032_add_clk_domain(dev); + if (error) + return error; + + sysctrl_priv = clocks; + + return 0; } static const struct of_device_id r9a06g032_match[] = { diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h new file mode 100644 index 000000000000..066dfb15cbdd --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */ From patchwork Fri Feb 25 11:23:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12760115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3617C433EF for ; Fri, 25 Feb 2022 11:24:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240053AbiBYLYu (ORCPT ); Fri, 25 Feb 2022 06:24:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240050AbiBYLYs (ORCPT ); Fri, 25 Feb 2022 06:24:48 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFECB22320F; Fri, 25 Feb 2022 03:24:15 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 033B7FF806; Fri, 25 Feb 2022 11:24:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788254; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4alF5GmAT5Za2RaFUiWrz2PPXf/YVS2l/t9CGG8/NLI=; b=cBmMI2YL+da4M/dsi5R7v5T2prHbF4PMS5rCueZCyfV2c3k/pKiDRtaf232LbyhTSdvgqQ RTTyRerRwMZ+1ecYgqSn6Q0o1IWg5YqmzkRbpch2IYdGbuwOpLQcxcPva2PFIOyjefdhoc yzNAs/bp+pBxQyaQrZnQI/VyRJD/qojC+F+VnboPYScDiDamYWlYvA60Qd/+y7VlPxA6xh DOcUNe8MQX2gtg6MsrP9d9koQQYKUhyWjHYGiB3F4RvLEANze3Ph/9Oohwij7x/7NO45c2 5NgSOJ94XFCcI535a0ttwGh7BlK3QadZov9KV2brPSLWyBPknu60mz3ePplRKg== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal Subject: [PATCH v3 4/7] dma: dmamux: Introduce RZN1 DMA router support Date: Fri, 25 Feb 2022 12:23:59 +0100 Message-Id: <20220225112403.505562-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is a based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Signed-off-by: Miquel Raynal --- drivers/dma/dw/Kconfig | 8 ++ drivers/dma/dw/Makefile | 2 + drivers/dma/dw/rzn1-dmamux.c | 152 +++++++++++++++++++++++++++++++++++ 3 files changed, 162 insertions(+) create mode 100644 drivers/dma/dw/rzn1-dmamux.c diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig index db25f9b7778c..dd53d4a9fa92 100644 --- a/drivers/dma/dw/Kconfig +++ b/drivers/dma/dw/Kconfig @@ -16,6 +16,14 @@ config DW_DMAC Support the Synopsys DesignWare AHB DMA controller. This can be integrated in chips such as the Intel Cherrytrail. +config RZN1_DMAMUX + tristate "Renesas RZ/N1 DMAMUX driver" + depends on DW_DMAC + help + Support the Renesas RZ/N1 DMAMUX which is located in front of + the Synopsys DesignWare AHB DMA controller located on Renesas + SoCs. + config DW_DMAC_PCI tristate "Synopsys DesignWare AHB DMA PCI driver" depends on PCI diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile index a6f358ad8591..8025f75e589c 100644 --- a/drivers/dma/dw/Makefile +++ b/drivers/dma/dw/Makefile @@ -7,5 +7,7 @@ obj-$(CONFIG_DW_DMAC) += dw_dmac.o dw_dmac-y := platform.o dw_dmac-$(CONFIG_OF) += of.o +obj-$(CONFIG_RZN1_DMAMUX) += rzn1-dmamux.o + obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o dw_dmac_pci-y := pci.o diff --git a/drivers/dma/dw/rzn1-dmamux.c b/drivers/dma/dw/rzn1-dmamux.c new file mode 100644 index 000000000000..bc4e2e7c3d18 --- /dev/null +++ b/drivers/dma/dw/rzn1-dmamux.c @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Schneider-Electric + * Author: Miquel Raynal + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RZN1_DMAMUX_LINES 64 +#define RZN1_DMAMUX_SPLIT 16 + +struct rzn1_dmamux_data { + struct dma_router dmarouter; + u32 used_chans; + struct mutex lock; +}; + +struct rzn1_dmamux_map { + unsigned int req_idx; +}; + +static void rzn1_dmamux_free(struct device *dev, void *route_data) +{ + struct rzn1_dmamux_data *dmamux = dev_get_drvdata(dev); + struct rzn1_dmamux_map *map = route_data; + + dev_dbg(dev, "Unmapping DMAMUX request %u\n", map->req_idx); + + mutex_lock(&dmamux->lock); + dmamux->used_chans &= ~BIT(map->req_idx); + mutex_unlock(&dmamux->lock); + + kfree(map); +} + +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct rzn1_dmamux_map *map; + unsigned int dmac_idx, chan, val; + u32 mask; + int ret; + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + if (dma_spec->args_count != 6) + return ERR_PTR(-EINVAL); + + chan = dma_spec->args[0]; + map->req_idx = dma_spec->args[4]; + val = dma_spec->args[5]; + dma_spec->args_count -= 2; + + if (chan >= RZN1_DMAMUX_SPLIT) { + dev_err(&pdev->dev, "Invalid DMA request line: %u\n", chan); + return ERR_PTR(-EINVAL); + } + + if (map->req_idx >= RZN1_DMAMUX_LINES || + (map->req_idx % RZN1_DMAMUX_SPLIT) != chan) { + dev_err(&pdev->dev, "Invalid MUX request line: %u\n", map->req_idx); + return ERR_PTR(-EINVAL); + } + + dmac_idx = map->req_idx < RZN1_DMAMUX_SPLIT ? 0 : 1; + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", dmac_idx); + if (!dma_spec->np) { + dev_err(&pdev->dev, "Can't get DMA master\n"); + return ERR_PTR(-EINVAL); + } + + dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n", + map->req_idx, dmac_idx, chan); + + mask = BIT(map->req_idx); + mutex_lock(&dmamux->lock); + dmamux->used_chans |= mask; + ret = r9a06g032_sysctrl_set_dmamux(mask, val ? mask : 0); + mutex_unlock(&dmamux->lock); + if (ret) { + rzn1_dmamux_free(&pdev->dev, map); + return ERR_PTR(ret); + } + + return map; +} + +static const struct of_device_id rzn1_dmac_match[] __maybe_unused = { + { .compatible = "renesas,rzn1-dma" }, + {}, +}; + +static int rzn1_dmamux_probe(struct platform_device *pdev) +{ + struct device_node *mux_node = pdev->dev.of_node; + const struct of_device_id *match; + struct device_node *dmac_node; + struct rzn1_dmamux_data *dmamux; + + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); + if (!dmamux) + return -ENOMEM; + + mutex_init(&dmamux->lock); + + dmac_node = of_parse_phandle(mux_node, "dma-masters", 0); + if (!dmac_node) + return dev_err_probe(&pdev->dev, -ENODEV, "Can't get DMA master node\n"); + + match = of_match_node(rzn1_dmac_match, dmac_node); + of_node_put(dmac_node); + if (!match) + return dev_err_probe(&pdev->dev, -EINVAL, "DMA master is not supported\n"); + + dmamux->dmarouter.dev = &pdev->dev; + dmamux->dmarouter.route_free = rzn1_dmamux_free; + + platform_set_drvdata(pdev, dmamux); + + return of_dma_router_register(mux_node, rzn1_dmamux_route_allocate, + &dmamux->dmarouter); +} + +static const struct of_device_id rzn1_dmamux_match[] = { + { .compatible = "renesas,rzn1-dmamux" }, + {}, +}; + +static struct platform_driver rzn1_dmamux_driver = { + .driver = { + .name = "renesas,rzn1-dmamux", + .of_match_table = rzn1_dmamux_match, + }, + .probe = rzn1_dmamux_probe, +}; +module_platform_driver(rzn1_dmamux_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Miquel Raynal X-Patchwork-Id: 12760117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DEABC4167E for ; Fri, 25 Feb 2022 11:24:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240071AbiBYLYz (ORCPT ); Fri, 25 Feb 2022 06:24:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240060AbiBYLYx (ORCPT ); Fri, 25 Feb 2022 06:24:53 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1AE7D222193; Fri, 25 Feb 2022 03:24:18 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 9F1C3FF804; Fri, 25 Feb 2022 11:24:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788257; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GcS1gM79z1ubwsDkiDMnQBqYcbRumBBw75m5IkrMpwU=; b=Kt94FyWCqQ16uTYQO6xJWn5Em91SXfjN6J/2KdGZ/wsMpWtpcOrkvpiNeD1XvIz7MOnT7O Y4OpdnpsmK0KN7NntQkOfnsWlVcSEZfyT1DMSZWKoztX7utQ0eYuFCF20KLyOF3rnCM2Qw AYceKjlJC53vt8Y6FbqX6y9KiJyHGxLhoOmR/jsB/abM1YhddQM0QtnLNSR2od6EUBatg2 yF2bNLqRlM+Yp16+OD4H0byOpvkGjtakHJ6WeBvqX5J0nky+lbWr+2ZZ+evJIFklKGFGvu lbwFPRmhmxqyWBgQgoyn1DQOt9UzrP58Qa5eCotcmZivWAeOXOHu6lYJqsvsOg== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal , Geert Uytterhoeven Subject: [PATCH v3 5/7] dma: dw: Add RZN1 compatible Date: Fri, 25 Feb 2022 12:24:00 +0100 Message-Id: <20220225112403.505562-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is very close to the original DW DMA IP, a DMA router has been introduced to handle the wiring options that have been added. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- drivers/dma/dw/platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c index 246118955877..47f2292dba98 100644 --- a/drivers/dma/dw/platform.c +++ b/drivers/dma/dw/platform.c @@ -137,6 +137,7 @@ static void dw_shutdown(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, + { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); From patchwork Fri Feb 25 11:24:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12760116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8ABE1C43217 for ; Fri, 25 Feb 2022 11:24:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240064AbiBYLYy (ORCPT ); Fri, 25 Feb 2022 06:24:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240062AbiBYLYx (ORCPT ); Fri, 25 Feb 2022 06:24:53 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6A9E22A243; Fri, 25 Feb 2022 03:24:20 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 3AFCEFF805; Fri, 25 Feb 2022 11:24:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788259; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nb1Fpg+5tL7svJUmDu7ANYF/3248Po4JwTI/DfjWflc=; b=F/eeFEs58ywP3zEn1GxpdpcyUJRz+KN+OiOr1gWxv3PcdyFSV1jmlAqGSqwsPCoTOx+Fau e0KRZDtib0Sgy0954neKQTbnLsDCTvpzvT2klROR1a+lLdK/ftQpCZOcn+lR3U0r+KBI7O Y0avHf6DtQ3IZCQOEJ6T25J/IEA0nA3xTWpfZZEz8sknT1tuCZRkhQadvbd1DO8k/MthVL ng3Ftll4t74uxU71TpMqbVqGNBXxrnJiGF+lzeTR6dy6Bm/yS4d7Wl+VAP6auRhKETMjqf fuQO7LT3+KprIcZGKyKdAthxL1NrxEff8S8lJAqerX+40sD8gkFmXBBXJ+zE8w== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal , Geert Uytterhoeven Subject: [PATCH v3 6/7] ARM: dts: r9a06g032: Add the two DMA nodes Date: Fri, 25 Feb 2022 12:24:01 +0100 Message-Id: <20220225112403.505562-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index db657224688a..640c3eb4bbcd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -184,6 +184,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; From patchwork Fri Feb 25 11:24:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12760118 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4FCA4C4707A for ; Fri, 25 Feb 2022 11:24:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240074AbiBYLYz (ORCPT ); Fri, 25 Feb 2022 06:24:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240062AbiBYLYz (ORCPT ); Fri, 25 Feb 2022 06:24:55 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C562421EBBF; Fri, 25 Feb 2022 03:24:22 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A8245FF80A; Fri, 25 Feb 2022 11:24:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1645788261; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9DmvAJFX2U0qo86wiZbyP/58xIuEhZNsNjvYfvIL0Zw=; b=XUhlkgSpZSKwRwuiAHWutyIIxAVUTw7TtR7oD8sJ08p/H/VP1QBfFL+pThTCycV7jNr6Ht qj94LKBXG0VmQt/MwK23JSdL3dDE7ZzgVz6CcNAtKxsRfzHnd9WBFSnnYV2LtimuqAeG41 tyS8uuVbi/PxeweBdm+J3fWyBcwPfgosurbnGggx1gJ8k1xEBMgKUp38I4bSL8xAv3GWQv 4sUjswYRB9UGYZn90vjOnmdXtpKPdvKtADBpSbtPF93LRnCR0rBtbx3wrzwdJ+yUFcSn/f gDwmZYxDfTP++TJz4V8Vrg1qWwe4AoKbH9Fz5Tz8MHC/mVvQcTuzrmVElFFV1w== From: Miquel Raynal To: Vinod Koul , dmaengine@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Thomas Petazzoni , Miquel Raynal Subject: [PATCH v3 7/7] ARM: dts: r9a06g032: Describe the DMA router Date: Fri, 25 Feb 2022 12:24:02 +0100 Message-Id: <20220225112403.505562-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220225112403.505562-1-miquel.raynal@bootlin.com> References: <20220225112403.505562-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 640c3eb4bbcd..0eb12c3d9cfd 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -59,6 +59,13 @@ ext_rtc_clk: extrtcclk { clock-frequency = <0>; }; + dmamux: dma-router { + compatible = "renesas,rzn1-dmamux"; + #dma-cells = <6>; + dma-requests = <32>; + dma-masters = <&dma0 &dma1>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>;