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Scott Phillips" , Ilkka Koskinen , stable@vger.kernel.org Subject: [PATCH 1/1] arm64: smp: Skip MC sched domain on SoCs with no LLC Date: Mon, 28 Feb 2022 16:29:00 -0800 Message-Id: <84e7cb911936f032318b6b376cf88009c90d93d5.1646094455.git.darren@os.amperecomputing.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: X-ClientProxiedBy: CH2PR05CA0066.namprd05.prod.outlook.com (2603:10b6:610:38::43) To SA0PR01MB6329.prod.exchangelabs.com (2603:10b6:806:ee::12) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e6ae8d2e-a3e0-440b-8672-08d9fb1b6993 X-MS-TrafficTypeDiagnostic: BL0PR01MB5219:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VvahVvEj7PK6U/JUv4KVMnESttjRn6tde03zC+sCRfC1so1PgnlFkGu4uvED6hUf4fRX2vhN04RybQPzkGr2paXFZ1koT/iXwX6gumTzJinkhEf47wjwHros1AinP+FUHZ+MbnYHi7sPQyaSn3QmEAVbmAChDabt682ciGy3ZNpX8ieKVN2SYNqgcyH4ZjHUkyoz9zrM7oj7VaZ9v8L238r76vunPqKl5MveAJfMHdtMEejZc8e9i9ZLdW71Kbr7G448oNRfatmI2jm+V502ckRY1sX98ROWsHPZAfhuK40xxCTsCeGLkajlEO17+Z7i57NXrBvkvA9LSqorAYsXKxxARhxwSSiopWalXyL7nmpHBSGaFW+9SYESMhaiXBrs5xqwlYNO5rwkLVDku5RE9jrjfLZ+MVUNxljB8vg6tsUEP3mGXfi8rMFx4Dj/yPp44Anj+ttdHnCtif5GfVELMa4MnaQ7ofAIv50/pYiUddg/tG6+YYrtP9N/f+CGQ2tXaR3fI+XxG0eqiQQhEE2lzEV0/uMcOHEMT8zblu2aDoh8h2+37LRJJqBB71Ls6WhS38jTS3npF/3fwLwqSbqEROlyCuT9tsJKXdNWyK9+1OJh1JFUukUY3CjpY6B23k0LNh1wXgMSl9nEle6lIFj+yKdidK1O3WGKse9+bHIVCkf9BXSxJK8K8zXHK2g04u+VBeDY0fIJ8R/keQyLSQ8X5g== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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They share a Snoop Control Unit, but have no shared CPU-side last level cache. cpu_coregroup_mask() will return a cpumask with weight 1, while cpu_clustergroup_mask() will return a cpumask with weight 2. As a result, build_sched_domain() will BUG() once per CPU with: BUG: arch topology borken the CLS domain not a subset of the MC domain The MC level cpumask is then extended to that of the CLS child, and is later removed entirely as redundant. This sched domain topology is an improvement over previous topologies, or those built without SCHED_CLUSTER, particularly for certain latency sensitive workloads. With the current scheduler model and heuristics, this is a desirable default topology for Ampere Altra and Altra Max system. Introduce an alternate sched domain topology for arm64 without the MC level and test for llc_sibling weight 1 across all CPUs to enable it. Do this in arch/arm64/kernel/smp.c (as opposed to arch/arm64/kernel/topology.c) as all the CPU sibling maps are now populated and we avoid needing to extend the drivers/acpi/pptt.c API to detect the cluster level being above the cpu llc level. This is consistent with other architectures and provides a readily extensible mechanism for other alternate topologies. The final sched domain topology for a 2 socket Ampere Altra system is unchanged with or without CONFIG_SCHED_CLUSTER, and the BUG is avoided: For CPU0: CONFIG_SCHED_CLUSTER=y CLS [0-1] DIE [0-79] NUMA [0-159] CONFIG_SCHED_CLUSTER is not set DIE [0-79] NUMA [0-159] Cc: Catalin Marinas Cc: Will Deacon Cc: Peter Zijlstra Cc: Vincent Guittot Cc: Barry Song Cc: Valentin Schneider Cc: D. Scott Phillips Cc: Ilkka Koskinen Cc: # 5.16.x Signed-off-by: Darren Hart --- arch/arm64/kernel/smp.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 27df5c1e6baa..3597e75645e1 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -433,6 +433,33 @@ static void __init hyp_mode_check(void) } } +static struct sched_domain_topology_level arm64_no_mc_topology[] = { +#ifdef CONFIG_SCHED_SMT + { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, +#endif + +#ifdef CONFIG_SCHED_CLUSTER + { cpu_clustergroup_mask, cpu_cluster_flags, SD_INIT_NAME(CLS) }, +#endif + + { cpu_cpu_mask, SD_INIT_NAME(DIE) }, + { NULL, }, +}; + +static void __init update_sched_domain_topology(void) +{ + int cpu; + + for_each_possible_cpu(cpu) { + if (cpu_topology[cpu].llc_id != -1 && + cpumask_weight(&cpu_topology[cpu].llc_sibling) > 1) + return; + } + + pr_info("No LLC siblings, using No MC sched domains topology\n"); + set_sched_topology(arm64_no_mc_topology); +} + void __init smp_cpus_done(unsigned int max_cpus) { pr_info("SMP: Total of %d processors activated.\n", num_online_cpus()); @@ -440,6 +467,7 @@ void __init smp_cpus_done(unsigned int max_cpus) hyp_mode_check(); apply_alternatives_all(); mark_linear_text_alias_ro(); + update_sched_domain_topology(); } void __init smp_prepare_boot_cpu(void)