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Wed, 02 Mar 2022 03:05:34 -0800 (PST) Received: from localhost.localdomain ([171.50.175.145]) by smtp.gmail.com with ESMTPSA id hk1-20020a17090b224100b001b8cff17f89sm5049186pjb.12.2022.03.02.03.05.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Mar 2022 03:05:34 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, tdas@codeaurora.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, robh+dt@kernel.org, Vinod Koul , Rob Herring Subject: [PATCH v2 1/5] dt-bindings: net: qcom,ethqos: Document SM8150 SoC compatible Date: Wed, 2 Mar 2022 16:35:04 +0530 Message-Id: <20220302110508.69053-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220302110508.69053-1-bhupesh.sharma@linaro.org> References: <20220302110508.69053-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Vinod Koul SM8150 has a ethernet controller and needs a different configuration so add a new compatible for this Acked-by: Rob Herring Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/net/qcom,ethqos.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.txt b/Documentation/devicetree/bindings/net/qcom,ethqos.txt index fcf5035810b5..1f5746849a71 100644 --- a/Documentation/devicetree/bindings/net/qcom,ethqos.txt +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.txt @@ -7,7 +7,9 @@ This device has following properties: Required properties: -- compatible: Should be qcom,qcs404-ethqos" +- compatible: Should be one of: + "qcom,qcs404-ethqos" + "qcom,sm8150-ethqos" - reg: Address and length of the register set for the device From patchwork Wed Mar 2 11:05:05 2022 Content-Type: text/plain; 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Wed, 02 Mar 2022 03:05:38 -0800 (PST) Received: from localhost.localdomain ([171.50.175.145]) by smtp.gmail.com with ESMTPSA id hk1-20020a17090b224100b001b8cff17f89sm5049186pjb.12.2022.03.02.03.05.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Mar 2022 03:05:38 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, tdas@codeaurora.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, robh+dt@kernel.org, Bjorn Andersson Subject: [PATCH v2 2/5] clk: qcom: gcc: Add emac GDSC support for SM8150 Date: Wed, 2 Mar 2022 16:35:05 +0530 Message-Id: <20220302110508.69053-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220302110508.69053-1-bhupesh.sharma@linaro.org> References: <20220302110508.69053-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add the EMAC GDSC defines and driver structures for SM8150. Cc: Stephen Boyd Cc: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- drivers/clk/qcom/gcc-sm8150.c | 34 +++++++++++++-------- include/dt-bindings/clock/qcom,gcc-sm8150.h | 1 + 2 files changed, 23 insertions(+), 12 deletions(-) diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c index 245794485719..08ba29e3a835 100644 --- a/drivers/clk/qcom/gcc-sm8150.c +++ b/drivers/clk/qcom/gcc-sm8150.c @@ -3448,22 +3448,31 @@ static struct clk_branch gcc_video_xo_clk = { }, }; +static struct gdsc emac_gdsc = { + .gdscr = 0x6004, + .pd = { + .name = "emac_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = POLL_CFG_GDSCR, +}; + static struct gdsc usb30_prim_gdsc = { - .gdscr = 0xf004, - .pd = { - .name = "usb30_prim_gdsc", - }, - .pwrsts = PWRSTS_OFF_ON, - .flags = POLL_CFG_GDSCR, + .gdscr = 0xf004, + .pd = { + .name = "usb30_prim_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = POLL_CFG_GDSCR, }; static struct gdsc usb30_sec_gdsc = { - .gdscr = 0x10004, - .pd = { - .name = "usb30_sec_gdsc", - }, - .pwrsts = PWRSTS_OFF_ON, - .flags = POLL_CFG_GDSCR, + .gdscr = 0x10004, + .pd = { + .name = "usb30_sec_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, + .flags = POLL_CFG_GDSCR, }; static struct clk_regmap *gcc_sm8150_clocks[] = { @@ -3714,6 +3723,7 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = { }; static struct gdsc *gcc_sm8150_gdscs[] = { + [EMAC_GDSC] = &emac_gdsc, [USB30_PRIM_GDSC] = &usb30_prim_gdsc, [USB30_SEC_GDSC] = &usb30_sec_gdsc, }; diff --git a/include/dt-bindings/clock/qcom,gcc-sm8150.h b/include/dt-bindings/clock/qcom,gcc-sm8150.h index 3e1a91876610..40596b9ded06 100644 --- a/include/dt-bindings/clock/qcom,gcc-sm8150.h +++ b/include/dt-bindings/clock/qcom,gcc-sm8150.h @@ -243,5 +243,6 @@ /* GCC GDSCRs */ #define USB30_PRIM_GDSC 4 #define USB30_SEC_GDSC 5 +#define EMAC_GDSC 6 #endif From patchwork Wed Mar 2 11:05:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12765754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6187C433EF for ; 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Wed, 02 Mar 2022 03:05:43 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, tdas@codeaurora.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, robh+dt@kernel.org, Bjorn Andersson Subject: [PATCH v2 3/5] clk: qcom: gcc-sm8150: Use ALWAYS_ON flag as a workaround for emac gdsc Date: Wed, 2 Mar 2022 16:35:06 +0530 Message-Id: <20220302110508.69053-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220302110508.69053-1-bhupesh.sharma@linaro.org> References: <20220302110508.69053-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org emac GDSC currently has issues (seen on SA8155p-ADP) when its turn'ed ON, once its already in OFF state. So when the 'eth' interface is turned up, it fails (as RGMII CLK is unavailable, which is gated by emac GDSC) with the following logs: qcom-ethqos 20000.ethernet eth0: PHY [stmmac-0:07] driver [Micrel KSZ9031 Gigabit PHY] (irq=150) <..snip..> qcom-ethqos 20000.ethernet: Failed to reset the dma qcom-ethqos 20000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed qcom-ethqos 20000.ethernet eth0: stmmac_open: Hw setup failed So, use the 'ALWAYS_ON' flag as a workaround to describe emac GDSC for now. Cc: Bjorn Andersson Cc: Stephen Boyd Signed-off-by: Bhupesh Sharma --- drivers/clk/qcom/gcc-sm8150.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c index 08ba29e3a835..76485bff7240 100644 --- a/drivers/clk/qcom/gcc-sm8150.c +++ b/drivers/clk/qcom/gcc-sm8150.c @@ -3454,7 +3454,13 @@ static struct gdsc emac_gdsc = { .name = "emac_gdsc", }, .pwrsts = PWRSTS_OFF_ON, - .flags = POLL_CFG_GDSCR, + /* + * FIXME: emac GDSC cannot resume after GDSC power off: + * qcom-ethqos 20000.ethernet: Failed to reset the dma + * + * So use ALWAYS_ON flag as a workaround. + */ + .flags = ALWAYS_ON, }; static struct gdsc usb30_prim_gdsc = { From patchwork Wed Mar 2 11:05:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12765755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E970C433F5 for ; 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Wed, 02 Mar 2022 03:05:47 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, tdas@codeaurora.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, robh+dt@kernel.org, Vinod Koul , Bjorn Andersson Subject: [PATCH v2 4/5] arm64: dts: qcom: sm8150: add ethernet node Date: Wed, 2 Mar 2022 16:35:07 +0530 Message-Id: <20220302110508.69053-5-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220302110508.69053-1-bhupesh.sharma@linaro.org> References: <20220302110508.69053-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Vinod Koul SM8150 SoC supports ethqos ethernet controller so add the node for it Cc: Bjorn Andersson Signed-off-by: Vinod Koul [bhsharma: Correct ethernet interrupt numbers and add power-domain] Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 6012322a5984..2ed231767535 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -915,6 +915,33 @@ gpi_dma0: dma-controller@800000 { status = "disabled"; }; + ethernet: ethernet@20000 { + compatible = "qcom,sm8150-ethqos"; + reg = <0x0 0x00020000 0x0 0x10000>, + <0x0 0x00036000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + clocks = <&gcc GCC_EMAC_AXI_CLK>, + <&gcc GCC_EMAC_SLV_AHB_CLK>, + <&gcc GCC_EMAC_PTP_CLK>, + <&gcc GCC_EMAC_RGMII_CLK>; + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + + power-domains = <&gcc EMAC_GDSC>; + resets = <&gcc GCC_EMAC_BCR>; + + iommus = <&apps_smmu 0x3C0 0x0>; + + snps,tso; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + status = "disabled"; + }; + + qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x008c0000 0x0 0x6000>; From patchwork Wed Mar 2 11:05:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 12765756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9B8CC433EF for ; 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Wed, 02 Mar 2022 03:05:52 -0800 (PST) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, agross@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, tdas@codeaurora.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, robh+dt@kernel.org, Vinod Koul , Bjorn Andersson Subject: [PATCH v2 5/5] arm64: dts: qcom: sa8155p-adp: Enable ethernet node Date: Wed, 2 Mar 2022 16:35:08 +0530 Message-Id: <20220302110508.69053-6-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220302110508.69053-1-bhupesh.sharma@linaro.org> References: <20220302110508.69053-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Vinod Koul Enable the etheret node, add the phy node and pinctrl for ethernet. Cc: Bjorn Andersson Signed-off-by: Vinod Koul [bhsharma: Correct ethernet/rgmii related pinmuxs, specify multi-queues and plug in the PHY interrupt for WOL] Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 144 +++++++++++++++++++++++ 1 file changed, 144 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts index 8756c2b25c7e..474f688f14a2 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -47,6 +47,65 @@ vreg_s4a_1p8: smps4 { vin-supply = <&vreg_3p3>; }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xC>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-wrr; + + queue0 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x0>; + }; + + queue1 { + snps,weight = <0x11>; + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + + queue2 { + snps,weight = <0x12>; + snps,dcb-algorithm; + snps,priority = <0x2>; + }; + + queue3 { + snps,weight = <0x13>; + snps,dcb-algorithm; + snps,priority = <0x3>; + }; + }; }; &apps_rsc { @@ -317,6 +376,42 @@ &remoteproc_cdsp { firmware-name = "qcom/sa8155p/cdsp.mdt"; }; +ðernet { + status = "okay"; + + snps,reset-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 11000 70000>; + + snps,ptp-ref-clk-rate = <250000000>; + snps,ptp-req-clk-rate = <96000000>; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet_defaults>; + + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii"; + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + compatible = "snps,dwmac-mdio"; + + /* Micrel KSZ9031RNZ PHY */ + rgmii_phy: phy@7 { + reg = <0x7>; + + interrupt-parent = <&tlmm>; + interrupts-extended = <&tlmm 124 IRQ_TYPE_EDGE_FALLING>; /* phy intr */ + device_type = "ethernet-phy"; + compatible = "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + &uart2 { status = "okay"; }; @@ -407,4 +502,53 @@ mux { drive-strength = <2>; }; }; + + ethernet_defaults: ethernet-defaults { + mdc { + pins = "gpio7"; + function = "rgmii"; + bias-pull-up; + }; + + mdio { + pins = "gpio59"; + function = "rgmii"; + bias-pull-up; + }; + + rgmii-rx { + pins = "gpio117", "gpio118", "gpio119", "gpio120", "gpio115", "gpio116"; + function = "rgmii"; + bias-disable; + drive-strength = <2>; + }; + + rgmii-tx { + pins = "gpio122", "gpio4", "gpio5", "gpio6", "gpio114", "gpio121"; + function = "rgmii"; + bias-pull-up; + drive-strength = <16>; + }; + + phy-intr { + pins = "gpio124"; + function = "emac_phy"; + bias-disable; + drive-strength = <8>; + }; + + pps { + pins = "gpio81"; + function = "emac_pps"; + bias-disable; + drive-strength = <8>; + }; + + phy-reset { + pins = "gpio79"; + function = "gpio"; + bias-pull-up; + drive-strength = <16>; + }; + }; };