From patchwork Fri Mar 4 12:24:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12769033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 07122C433EF for ; Fri, 4 Mar 2022 12:27:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9g78AqvoiI12LNz/HvvrRbZdZvdyjpTQZY7ufoKhljo=; b=omhnjODCik29UH CAoeYaY0G1tFi7xUm2lDi/j4ne85+AnRFPLxTqufralnqbiPw3P40F0thaadE0Qab/qrL2c1LZqrV LkP93MyvQi2cPyM4oeRBTLnnYQ/qEyGmlBQGkCI8OVwgEuGAFaQBquTOlxZDSZ37VjSpnNgOs20Wb 6f3SbouyUWu9SXl63vQGEJ2aHTgcPpSjnRfhfsjJXTtiKjXGHxPJdRyDWKduhvDyGjBstVERp0r8q M2zFpwkrIIsoHOWFwJgyMeWQK73TW5Eh4dV4p0LjZ2GzQBl0iWpXigo5QOdbx6GclFutcyKJPlgL1 cUgZ35EWdgTGvJB8wjWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ70E-009wcb-9u; Fri, 04 Mar 2022 12:25:46 +0000 Received: from smtp-relay-internal-1.canonical.com ([185.125.188.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ6zf-009wNs-Av for linux-arm-kernel@lists.infradead.org; Fri, 04 Mar 2022 12:25:13 +0000 Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 7696F3F60A for ; Fri, 4 Mar 2022 12:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1646396707; bh=kgcW8NoeEKgqEQpiOeMGrdb/y3sIE8kBcUfOjO129hk=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fQNI9Uhm4NJdl9xhP2x3BlXd2S0fXP9eztnguiTwhpmg/+FpA02kmLh4wZzjCkTLr Ml5+6vEhP3Fr5u9jykiWvz62Voc5oBMEM8AI0BzQz58st4DStfwAsEiOjbzDisJ976 HL6ZmRxKbD8MW0qnwobKZfy4SOCHaAwSfweCNoARf2+2qBErkFNLpUF0x04l/gXmuL iGhBsPpv49tMCSKkqHrUkDuhmYq9F/Ala/6YaK8Pg+gN+HzANPoiZhYXukaZJfN1eO 8UcnokuFzjmRsDFmmP/kdam+v5tDqf0/XGvW7nW6WMF5DLf7gWcmAjn8MH1MnA7A4Y uT/NfHGL5r4qw== Received: by mail-ej1-f72.google.com with SMTP id r18-20020a17090609d200b006a6e943d09eso4301512eje.20 for ; Fri, 04 Mar 2022 04:25:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kgcW8NoeEKgqEQpiOeMGrdb/y3sIE8kBcUfOjO129hk=; b=gBAlO8CVxF7CIS9sZCi/YlryIh4lS+I48T3GedMc7XUfOZrqyERFe+ZDpn8anlHmzb Z8TFuWnZ93l8qory1Hb+a3BPS0EBrtu0AfO1viTWhuHeFyVsHa5zIaxJOVLBvLulx0Im X5itkwCkJHonRju3SluCwsc1XcSu6T/IngA1GOpGakz/aWP4DASSij31LELBfWeWo9FA WIwpcbNQ7V3NHPZmDVJrGx/+TLdZ12HRUeY86ygqnJU0pSfu12kBz0bj9RQ22BZ6zqoc YBDRH03habjs0dUNQnznNX4PGM2jRg9miLUu2SzFYF0HwYgeTx9DpT+UbhWZzXGCs3MX ZRJA== X-Gm-Message-State: AOAM530ieeAT6w0IBnBZm0/WJ8hkY1/F8ec84itW5In1snaHZLi2xH0X gKhSwRSi4LWdebGMLOMZHsOMIHnCMqg4FoRkiJNGdsHRQWqfn71nM55byo5Q2HtYe0GUTtnQY3H 21quvedmCFQTFJ3NxUV0wyWeZfm8/fPCA6uDBO3NLjjJjIP2jAjDN X-Received: by 2002:a17:907:70c1:b0:6ce:78ff:bad4 with SMTP id yk1-20020a17090770c100b006ce78ffbad4mr31164821ejb.68.1646396701951; Fri, 04 Mar 2022 04:25:01 -0800 (PST) X-Google-Smtp-Source: ABdhPJy6Wvt1ALjXyOY5O7427bhp34XMAl6I3Ap8zIOpaKncvQpm4/ZUjYymTNh6SzZvWw89ZXr/bw== X-Received: by 2002:a17:907:70c1:b0:6ce:78ff:bad4 with SMTP id yk1-20020a17090770c100b006ce78ffbad4mr31164791ejb.68.1646396701612; Fri, 04 Mar 2022 04:25:01 -0800 (PST) Received: from localhost.localdomain (xdsl-188-155-181-108.adslplus.ch. [188.155.181.108]) by smtp.gmail.com with ESMTPSA id r23-20020aa7da17000000b00415a1431488sm2047368eds.4.2022.03.04.04.25.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 04:25:00 -0800 (PST) From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 1/4] dt-bindings: timer: exynos4210-mct: describe known hardware and its interrupts Date: Fri, 4 Mar 2022 13:24:21 +0100 Message-Id: <20220304122424.307885-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> References: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_042511_560325_535B8C84 X-CRM114-Status: GOOD ( 13.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Most of the Samsung Exynos SoCs use almost the same Multi-Core Timer block, so only two compatibles were used so far (for Exynos4210 and Exynos4412 flavors) with Exynos4210-one being used in most of the SoCs. However the Exynos4210 flavor actually differs by number of interrupts. Add new compatibles, maintaining backward compatibility with Exynos4210, and constraints for number of interrupts. This allows to exactly match the Exynos MCT hardware. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar Reviewed-by: Rob Herring --- .../timer/samsung,exynos4210-mct.yaml | 67 ++++++++++++++++++- 1 file changed, 64 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml index f11cbc7ccc14..1584944c7ac4 100644 --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml @@ -19,9 +19,20 @@ description: |+ properties: compatible: - enum: - - samsung,exynos4210-mct - - samsung,exynos4412-mct + oneOf: + - enum: + - samsung,exynos4210-mct + - samsung,exynos4412-mct + - items: + - enum: + - samsung,exynos3250-mct + - samsung,exynos5250-mct + - samsung,exynos5260-mct + - samsung,exynos5420-mct + - samsung,exynos5433-mct + - samsung,exynos850-mct + - tesla,fsd-mct + - const: samsung,exynos4210-mct clocks: minItems: 2 @@ -63,6 +74,56 @@ required: - interrupts - reg +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos3250-mct + then: + properties: + interrupts: + minItems: 8 + maxItems: 8 + + - if: + properties: + compatible: + contains: + const: samsung,exynos5250-mct + then: + properties: + interrupts: + minItems: 6 + maxItems: 6 + + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos5260-mct + - samsung,exynos5420-mct + - samsung,exynos5433-mct + - samsung,exynos850-mct + then: + properties: + interrupts: + minItems: 12 + maxItems: 12 + + - if: + properties: + compatible: + contains: + enum: + - tesla,fsd-mct + then: + properties: + interrupts: + minItems: 16 + maxItems: 16 + additionalProperties: false examples: From patchwork Fri Mar 4 12:24:22 2022 Content-Type: text/plain; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id r23-20020aa7da17000000b00415a1431488sm2047368eds.4.2022.03.04.04.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 04:25:02 -0800 (PST) From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 2/4] ARM: dts: exynos: add a specific compatible to MCT Date: Fri, 4 Mar 2022 13:24:22 +0100 Message-Id: <20220304122424.307885-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> References: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_042511_575550_1BD89FE9 X-CRM114-Status: GOOD ( 16.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos3250 and all Exynos5 SoCs. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- arch/arm/boot/dts/exynos3250.dtsi | 3 ++- arch/arm/boot/dts/exynos5250.dtsi | 3 ++- arch/arm/boot/dts/exynos5260.dtsi | 3 ++- arch/arm/boot/dts/exynos54xx.dtsi | 3 ++- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index ae644315855d..41bb421e67c2 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -269,7 +269,8 @@ gic: interrupt-controller@10481000 { }; timer@10050000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos3250-mct", + "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; interrupts = , , diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 5baaa7eb71a4..63d1dcf2c55c 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -245,7 +245,8 @@ clock_audss: audss-clock-controller@3810000 { }; timer@101c0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5250-mct", + "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index 56271e7c4587..ff1ee409eff3 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -333,7 +333,8 @@ chipid: chipid@10000000 { }; mct: timer@100b0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5260-mct", + "samsung,exynos4210-mct"; reg = <0x100B0000 0x1000>; clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>; clock-names = "fin_pll", "mct"; diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 2ddb7a5f12b3..3ec43761d8b9 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -74,7 +74,8 @@ smp-sram@53000 { }; mct: timer@101c0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5420-mct", + "samsung,exynos4210-mct"; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id r23-20020aa7da17000000b00415a1431488sm2047368eds.4.2022.03.04.04.25.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 04:25:03 -0800 (PST) From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: exynos: add a specific compatible to MCT Date: Fri, 4 Mar 2022 13:24:23 +0100 Message-Id: <20220304122424.307885-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> References: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_042507_508441_8687207E X-CRM114-Status: GOOD ( 16.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos5433 and Exynos850. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos850.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 661567d2dd7a..017ccc2f4650 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -806,7 +806,8 @@ tmu_isp: tmu@1007c000 { }; timer@101c0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5433-mct", + "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = , , diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index d1700e96fee2..12f7ddc6fd0a 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -181,7 +181,8 @@ chipid@10000000 { }; timer@10040000 { - compatible = "samsung,exynos4210-mct"; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id r23-20020aa7da17000000b00415a1431488sm2047368eds.4.2022.03.04.04.25.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 04:25:05 -0800 (PST) From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 4/4] arm64: dts: tesla: add a specific compatible to MCT on FSD Date: Fri, 4 Mar 2022 13:24:24 +0100 Message-Id: <20220304122424.307885-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> References: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_042507_627982_0B2BEC4A X-CRM114-Status: GOOD ( 16.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which is correct but not specific enough. The MCT blocks have different number of interrupts, so add a second specific compatible to Tesla FSD. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- arch/arm64/boot/dts/tesla/fsd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index 9a652abcbcac..10c217a57a7d 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -727,7 +727,7 @@ spi_2: spi@14160000 { }; timer@10040000 { - compatible = "samsung,exynos4210-mct"; + compatible = "tesla,fsd-mct", "samsung,exynos4210-mct"; reg = <0x0 0x10040000 0x0 0x800>; interrupts = , ,