From patchwork Mon Mar 7 08:50:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Whitchurch X-Patchwork-Id: 12771382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88930C433F5 for ; Mon, 7 Mar 2022 08:51:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233609AbiCGIvx (ORCPT ); Mon, 7 Mar 2022 03:51:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231229AbiCGIvx (ORCPT ); Mon, 7 Mar 2022 03:51:53 -0500 Received: from smtp2.axis.com (smtp2.axis.com [195.60.68.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5AC810D1; Mon, 7 Mar 2022 00:50:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1646643058; x=1678179058; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ekguUk0KzuP5PfnRbRQ7Z6M8KIo5vTJCTcKv41k1QyM=; b=hP/eIK4R4idPOY3X/jAFKBLrpg3Kfs3Y1kMWpS/IfJrdAZkqqMcDKvBC 2LbLeUdogYem0yqedORVpBfLZ1vKuV+VWC5AHVEXqFcUsw1jZ5t79ZKEV 5sTF9pXAHSL/wDpCh8Q8POeSquXGLiClRbjLW3w62Ooh9IlpypornoAfw 7183bYm3BsIcoHXPyRwn4UFnJtfpdh45DrCMbwXELHmPk16aw0mKoCyHE zdXEKFLbnx7zfZswE9LBA88Rnn22FAwEfMbFgLIyui7jnlRMa+MkILc6E x61RKIrjc4T0EA/89+lQ0hcKg9v75gzxxLiNGrpnRnF5p4f4kWWzHFw6y w==; From: Vincent Whitchurch To: , , CC: , , , , , , , , Vincent Whitchurch Subject: [PATCH 1/2] dt-bindings: serial: samsung: Add ARTPEC-8 UART Date: Mon, 7 Mar 2022 09:50:52 +0100 Message-ID: <20220307085053.1636475-2-vincent.whitchurch@axis.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220307085053.1636475-1-vincent.whitchurch@axis.com> References: <20220307085053.1636475-1-vincent.whitchurch@axis.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add a compatible for the UART on the ARTPEC-8 SoC. Signed-off-by: Vincent Whitchurch --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 6aceba4a5f79..6f11f2c92f64 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -20,6 +20,7 @@ properties: items: - enum: - apple,s5l-uart + - axis,artpec8-uart - samsung,s3c2410-uart - samsung,s3c2412-uart - samsung,s3c2440-uart From patchwork Mon Mar 7 08:50:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Whitchurch X-Patchwork-Id: 12771384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE976C433EF for ; Mon, 7 Mar 2022 08:51:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233810AbiCGIv7 (ORCPT ); Mon, 7 Mar 2022 03:51:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233851AbiCGIv5 (ORCPT ); Mon, 7 Mar 2022 03:51:57 -0500 Received: from smtp2.axis.com (smtp2.axis.com [195.60.68.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C80711C13; Mon, 7 Mar 2022 00:51:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1646643063; x=1678179063; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ytKQtShjwa35NIFSZwwjBXyX3q9doQnHdIn7CTmZOnE=; b=itMBBlJLc5ATqGMPf2RjsNgsvdlgfKitS22SB/CD7/cylMt0By0ZSrd+ ZYhmJZ9QDs2ncC1DuIiLw0xLLKK8XA1XoRyKwRTTVR1rfwzf5UykJxJBd qeDEVhUmyRT0l3ws8oQpuA9MmsmMp55RUnkHGfxd6Korf+AN3zU/Hixls ILZRiJiP9yJ79ebacAgtdu44bxTcdZcsd+FqaAEhiXSHEmfFEThCEUHzG 5qjyGO/W+x1BQRvHTdTnY6Z8ENfIS5sWy2PeK0zxAH39bEfQeeG+IyCtA 2DC1NL8JuCmZQ42vHidHNJwQ2YY9of9yI7U7CnUXQ4N9eU/4Es4oOm+88 A==; From: Vincent Whitchurch To: , , CC: , , , , , , , , Vincent Whitchurch Subject: [PATCH 2/2] tty: serial: samsung: Add ARTPEC-8 support Date: Mon, 7 Mar 2022 09:50:53 +0100 Message-ID: <20220307085053.1636475-3-vincent.whitchurch@axis.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220307085053.1636475-1-vincent.whitchurch@axis.com> References: <20220307085053.1636475-1-vincent.whitchurch@axis.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add support for the UART on the ARTPEC-8 SoC. Signed-off-by: Vincent Whitchurch Reviewed-by: Krzysztof Kozlowski --- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/samsung_tty.c | 38 ++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index e952ec5c7a7c..ae120d3d933a 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -237,7 +237,7 @@ config SERIAL_CLPS711X_CONSOLE config SERIAL_SAMSUNG tristate "Samsung SoC serial support" - depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_APPLE || COMPILE_TEST + depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_APPLE || ARCH_ARTPEC || COMPILE_TEST select SERIAL_CORE help Support for the on-chip UARTs on the Samsung diff --git a/drivers/tty/serial/samsung_tty.c b/drivers/tty/serial/samsung_tty.c index d002a4e48ed9..4f9e74c6bcef 100644 --- a/drivers/tty/serial/samsung_tty.c +++ b/drivers/tty/serial/samsung_tty.c @@ -2837,6 +2837,36 @@ static struct s3c24xx_serial_drv_data s5l_serial_drv_data = { #define S5L_SERIAL_DRV_DATA ((kernel_ulong_t)NULL) #endif +#if defined(CONFIG_ARCH_ARTPEC) +static struct s3c24xx_serial_drv_data artpec8_serial_drv_data = { + .info = &(struct s3c24xx_uart_info) { + .name = "Axis ARTPEC-8 UART", + .type = TYPE_S3C6400, + .port_type = PORT_S3C6400, + .fifosize = 128, + .has_divslot = 1, + .rx_fifomask = S5PV210_UFSTAT_RXMASK, + .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, + .rx_fifofull = S5PV210_UFSTAT_RXFULL, + .tx_fifofull = S5PV210_UFSTAT_TXFULL, + .tx_fifomask = S5PV210_UFSTAT_TXMASK, + .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, + .def_clk_sel = S3C2410_UCON_CLKSEL0, + .num_clks = 1, + .clksel_mask = 0, + .clksel_shift = 0, + }, + .def_cfg = &(struct s3c2410_uartcfg) { + .ucon = S5PV210_UCON_DEFAULT, + .ufcon = S5PV210_UFCON_DEFAULT, + .has_fracval = 1, + } +}; +#define ARTPEC8_SERIAL_DRV_DATA ((kernel_ulong_t)&artpec8_serial_drv_data) +#else +#define ARTPEC8_SERIAL_DRV_DATA ((kernel_ulong_t)NULL) +#endif + static const struct platform_device_id s3c24xx_serial_driver_ids[] = { { .name = "s3c2410-uart", @@ -2866,6 +2896,10 @@ static const struct platform_device_id s3c24xx_serial_driver_ids[] = { .name = "exynos850-uart", .driver_data = EXYNOS850_SERIAL_DRV_DATA, }, + { + .name = "artpec8-uart", + .driver_data = ARTPEC8_SERIAL_DRV_DATA, + }, { }, }; MODULE_DEVICE_TABLE(platform, s3c24xx_serial_driver_ids); @@ -2888,6 +2922,8 @@ static const struct of_device_id s3c24xx_uart_dt_match[] = { .data = (void *)EXYNOS5433_SERIAL_DRV_DATA }, { .compatible = "apple,s5l-uart", .data = (void *)S5L_SERIAL_DRV_DATA }, + { .compatible = "axis,artpec8-uart", + .data = (void *)ARTPEC8_SERIAL_DRV_DATA }, { .compatible = "samsung,exynos850-uart", .data = (void *)EXYNOS850_SERIAL_DRV_DATA }, {}, @@ -3043,6 +3079,8 @@ OF_EARLYCON_DECLARE(s5pv210, "samsung,s5pv210-uart", s5pv210_early_console_setup); OF_EARLYCON_DECLARE(exynos4210, "samsung,exynos4210-uart", s5pv210_early_console_setup); +OF_EARLYCON_DECLARE(artpec8, "axis,artpec8-uart", + s5pv210_early_console_setup); /* Apple S5L */ static int __init apple_s5l_early_console_setup(struct earlycon_device *device,