From patchwork Mon Mar 7 10:15:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 12771503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFE20C433FE for ; Mon, 7 Mar 2022 10:18:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GAzT49tfFwyp61KkYj78vBTp0M7IgLjrOA3MQka/nGc=; b=qCC5J7UsxNIONt +eOQPUgHdwOjanHcbnlOoH0rYqyxfxPfDq30VBIuTwffWR+erfrTzOW0SJfB3d54H74JD24T4vLqC hlbys90Pzmdx9pzZFs6in/tyA6FHUfaaxiUQcLXtcOh5Cv/g07PUywW4vNTjBHHEyZlVUvhaMS5vl sT7AYPgc5v6bF3gq4kP5dyHXtHPL2v6ietAOjExPh/9DWW0PnOT22RdASUFZ1JtXbEnGJrbCoAzSi pR7gj5iIOzAUT5GRTz5rl7QBh4MD3IUnnvm5TdGVJK5iUhzNHxdu/51L0icSwykBdJUDrBKJ1crgu 85jWeajvkH3sQg5tT3mA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nRAQs-00H2nN-Ai; Mon, 07 Mar 2022 10:17:38 +0000 Received: from relay11.mail.gandi.net ([217.70.178.231]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nRAQf-00H2k6-9R for linux-arm-kernel@lists.infradead.org; Mon, 07 Mar 2022 10:17:27 +0000 Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 80DB510001A; Mon, 7 Mar 2022 10:17:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646648243; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4TZJ67Qf5npxgRoNb/48DKjrSfSErIPD2XpuA2RT2wg=; b=an72McpjP8B3OkO7jW56TLtGhSr2iWjdcchaiD5cNEVqZeZybpLNGyy4Y1MpxQlqIlm31+ WqCJD3ZQ/fp9BTvYz482zc8PnsOG+bI1oA9BOCujbuPohBZx8lPnreCM8m+vFQLUl/KsxF iwvandNv5rN/4keXXW+B8xIFRzj17A41qA/bf2dkh7dNLF/PvmRHmIWapD5L+VC8Q+sXYK A0GMva5ZGNdf+T+LKk5N2r/tP/dvViwRJ7yOO+TSvZAU51Pma64Vp3ZR8/GtqYJSogQJiL Xzcugksi3FY/8JnsbCu407xC0u6IaSj1IWr/TDrMBeN1PVKk+/3DyN01r8bwmA== From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Russell King , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v2 1/2] ARM: at91: add code to handle secure calls Date: Mon, 7 Mar 2022 11:15:49 +0100 Message-Id: <20220307101550.95538-2-clement.leger@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220307101550.95538-1-clement.leger@bootlin.com> References: <20220307101550.95538-1-clement.leger@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220307_021725_651782_BB34F570 X-CRM114-Status: GOOD ( 19.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since OP-TEE now has a more complete support for sama5d2, add necessary code to perform SMC calls. The detection of OP-TEE is based on a specific device-tree node path (/firmware/optee) such has done by some other SoC. A check is added to avoid doing SMC calls without having OP-TEE. Signed-off-by: Clément Léger --- arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/sam_secure.c | 46 +++++++++++++++++++++++++++++++++ arch/arm/mach-at91/sam_secure.h | 14 ++++++++++ arch/arm/mach-at91/sama5.c | 2 ++ 4 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-at91/sam_secure.c create mode 100644 arch/arm/mach-at91/sam_secure.h diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 522b680b6446..0dcc37180588 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o -obj-$(CONFIG_SOC_SAMA5) += sama5.o +obj-$(CONFIG_SOC_SAMA5) += sama5.o sam_secure.o obj-$(CONFIG_SOC_SAMA7) += sama7.o obj-$(CONFIG_SOC_SAMV7) += samv7.o diff --git a/arch/arm/mach-at91/sam_secure.c b/arch/arm/mach-at91/sam_secure.c new file mode 100644 index 000000000000..2a01f7a7d13f --- /dev/null +++ b/arch/arm/mach-at91/sam_secure.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2022, Microchip + */ + +#include +#include + +#include "sam_secure.h" + +static bool optee_available; + +#define SAM_SIP_SMC_STD_CALL_VAL(func_num) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_SIP, (func_num)) + +struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1) +{ + struct arm_smccc_res res = {.a0 = -1}; + + if (WARN_ON(!optee_available)) + return res; + + arm_smccc_smc(SAM_SIP_SMC_STD_CALL_VAL(fn), arg0, arg1, 0, 0, 0, 0, 0, + &res); + + return res; +} + +void __init sam_secure_init(void) +{ + struct device_node *np; + + /* + * We only check that the OP-TEE node is present and available. The + * OP-TEE kernel driver is not needed for the type of interaction made + * with OP-TEE here so the driver's status is not checked. + */ + np = of_find_node_by_path("/firmware/optee"); + if (np && of_device_is_available(np)) + optee_available = true; + of_node_put(np); + + if (optee_available) + pr_info("Running under OP-TEE firmware\n"); +} diff --git a/arch/arm/mach-at91/sam_secure.h b/arch/arm/mach-at91/sam_secure.h new file mode 100644 index 000000000000..360036672f52 --- /dev/null +++ b/arch/arm/mach-at91/sam_secure.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022, Microchip + */ + +#ifndef SAM_SECURE_H +#define SAM_SECURE_H + +#include + +void __init sam_secure_init(void); +struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1); + +#endif /* SAM_SECURE_H */ diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c index 89dab7cf01e8..de5dd28b392e 100644 --- a/arch/arm/mach-at91/sama5.c +++ b/arch/arm/mach-at91/sama5.c @@ -14,6 +14,7 @@ #include #include "generic.h" +#include "sam_secure.h" static void __init sama5_dt_device_init(void) { @@ -47,6 +48,7 @@ MACHINE_END static void __init sama5d2_init(void) { of_platform_default_populate(NULL, NULL, NULL); + sam_secure_init(); sama5d2_pm_init(); } From patchwork Mon Mar 7 10:15:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 12771504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AAD27C433F5 for ; Mon, 7 Mar 2022 10:18:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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d=bootlin.com; s=gm1; t=1646648244; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SV9pqBiR5a2AXF5zfm2ssETbnhponV7Ada+4xLnpEg4=; b=TjbAEZ5GDZMEhFBQ5lCpQT27KTuE/4PD/vKXpNvHuGF2cuUyc2bgC0I1VxnYC/Zx7YvnGm KrRFS9XVOZR7VgpBAxLE5vlBEcpAJAKwTS+WBwC0OOXJaclZfVQ14hvEHuLIE13YgvMvyd SL6DjQy0rMczBzgiXB/Y2y2pxIJFQQC9sYpsvHQvIe2Wn/xH0uxnf/Yk/e21E3e5gFS63W ZgHeYuz7wkGGCK+yp/gKqKRGHRbtC4+BlA1crzDLSZWrddEyOxrzgt+cOc5ns2ITRYbSvA BH02vv0VqBogsf+93dcrSWP8bY8j0VbGTJH6tduy3erIt059BNAq+EQ6c+sgxA== From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Russell King , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v2 2/2] ARM: at91: pm: add support for sama5d2 secure suspend Date: Mon, 7 Mar 2022 11:15:50 +0100 Message-Id: <20220307101550.95538-3-clement.leger@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220307101550.95538-1-clement.leger@bootlin.com> References: <20220307101550.95538-1-clement.leger@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220307_021726_413174_EA026224 X-CRM114-Status: GOOD ( 20.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When running with OP-TEE, the suspend control is handled securely. Suspend can be entered using PSCI support. Since the sama5d2 supports multiple suspend modes, add a new CONFIG_ATMEL_SECURE_PM which will send a SMC call to select the suspend mode at init time. "atmel.pm_modes" boot argument is still supported for compatibility purposes but the standby value is actually ignored since PSCI suspend is used and it only support one mode (suspend). Signed-off-by: Clément Léger --- arch/arm/mach-at91/Kconfig | 12 ++++++++++- arch/arm/mach-at91/pm.c | 38 +++++++++++++++++++++++++++++++++ arch/arm/mach-at91/sam_secure.h | 4 ++++ 3 files changed, 53 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 02f6b108fd5d..5a6ca38d6303 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -208,7 +208,17 @@ config SOC_SAMA5 select SRAM if PM config ATMEL_PM - bool + bool "Atmel PM support" + +config ATMEL_SECURE_PM + bool "Atmel Secure PM support" + depends on SOC_SAMA5D2 && ATMEL_PM + select ARM_PSCI + help + When running under a TEE, the suspend mode must be requested to be set + at TEE level. When enable, this option will use secure monitor calls + to set the suspend level. PSCI is then used to enter suspend. + NOTE: This support is mutually exclusive with CONFIG_ATMEL_PM config SOC_SAMA7 bool diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index dd6f4ce3f766..e40515691540 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -27,6 +27,7 @@ #include "generic.h" #include "pm.h" +#include "sam_secure.h" #define BACKUP_DDR_PHY_CALIBRATION (9) @@ -856,6 +857,35 @@ static int __init at91_pm_backup_init(void) return ret; } +static void at91_pm_secure_init(void) +{ + int suspend_mode; + struct arm_smccc_res res; + + suspend_mode = soc_pm.data.suspend_mode; + + res = sam_smccc_call(SAMA5_SMC_SIP_SET_SUSPEND_MODE, + suspend_mode, 0); + if (res.a0 == 0) { + pr_info("AT91: Secure PM: suspend mode set to %s\n", + pm_modes[suspend_mode].pattern); + return; + } + + pr_warn("AT91: Secure PM: %s mode not supported !\n", + pm_modes[suspend_mode].pattern); + + res = sam_smccc_call(SAMA5_SMC_SIP_GET_SUSPEND_MODE, 0, 0); + if (res.a0 == 0) { + pr_warn("AT91: Secure PM: failed to get default mode\n"); + return; + } + + pr_info("AT91: Secure PM: using default suspend mode %s\n", + pm_modes[suspend_mode].pattern); + + soc_pm.data.suspend_mode = res.a1; +} static const struct of_device_id atmel_shdwc_ids[] = { { .compatible = "atmel,sama5d2-shdwc" }, { .compatible = "microchip,sam9x60-shdwc" }, @@ -1188,6 +1218,11 @@ void __init sama5d2_pm_init(void) if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) return; + if (IS_ENABLED(CONFIG_ATMEL_SECURE_PM)) { + at91_pm_secure_init(); + return; + } + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps)); ret = at91_dt_ramc(false); @@ -1262,6 +1297,9 @@ static int __init at91_pm_modes_select(char *str) soc_pm.data.standby_mode = standby; soc_pm.data.suspend_mode = suspend; + if (IS_ENABLED(CONFIG_ATMEL_SECURE_PM)) + pr_warn("AT91: Secure PM: ignoring standby mode\n"); + return 0; } early_param("atmel.pm_modes", at91_pm_modes_select); diff --git a/arch/arm/mach-at91/sam_secure.h b/arch/arm/mach-at91/sam_secure.h index 360036672f52..1e7d8b20ba1e 100644 --- a/arch/arm/mach-at91/sam_secure.h +++ b/arch/arm/mach-at91/sam_secure.h @@ -8,6 +8,10 @@ #include +/* Secure Monitor mode APIs */ +#define SAMA5_SMC_SIP_SET_SUSPEND_MODE 0x400 +#define SAMA5_SMC_SIP_GET_SUSPEND_MODE 0x401 + void __init sam_secure_init(void); struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1);