From patchwork Thu Mar 10 16:16:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776645 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88E09C433F5 for ; Thu, 10 Mar 2022 16:17:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242362AbiCJQSo (ORCPT ); Thu, 10 Mar 2022 11:18:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242146AbiCJQSE (ORCPT ); Thu, 10 Mar 2022 11:18:04 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1660C191405 for ; Thu, 10 Mar 2022 08:16:57 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 139A9C0002; Thu, 10 Mar 2022 16:16:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929016; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OI+rKHEpqRIrjR3Tah2YGtk8yTfjmktV3JYE6NKdQlQ=; b=dTs3NKGUK1vPl99yeVirt1PGt18l2hPMSM0LqG0eRCoCkiAkbPBObpQcEokGH8/FHly5ah ostyAeBni+/FxTM2Wly7YTx7ld7lsHdvCEdW4MpFD47YAsZaxyOT1zmE+yRaFUheR6LBXk KVmRJbYAm2i8XjXbef228Mg8c6vD9eeCLwhmAsK7wf9sKn5iSzVr14z9CkSsuAO9IpYvsR csAoSeqsUzZ1YYmrtJrubQbUN7ZsexWAmAa3FEbRMlBdZyq/eJuvV09UIIB11co1tamwTH W50z2dDtj9gzUhtr94eBYY1k2lpQEBfbvX+Cn3WEptro8AJ1Tw7g0y0VsXR4DA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 1/7] serial: 8250_dma: Use ->tx_dma function pointer to start next DMA Date: Thu, 10 Mar 2022 17:16:44 +0100 Message-Id: <20220310161650.289387-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy The 8250 driver is quite flexible. Regarding DMA handling, there is the possibility to either use the default helper (serial8250_tx_dma()) or call a specific function. Only the omap and brcm implementation do that. In both cases, they don't use the serial8250_tx_dma() helper at all. As we are going to write a new DMA handling function for the RZ/N1 SoCs which will use the serial8250_tx_dma() implementation (preceded by a couple of register writes), we need the ->tx_dma() pointer to link to our own function, but within the __dma_tx_complete() helper we also need to call our own implementation instead of the default one directly. In order to do that, let's call ->tx_dma() instead of serial8250_tx_dma() from __dma_tx_complete(). Signed-off-by: Phil Edworthy [miquel.raynal@bootlin.com: Re-write commit message] Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 890fa7ddaa7f..a0563f2341ac 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -33,7 +33,7 @@ static void __dma_tx_complete(void *param) if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) uart_write_wakeup(&p->port); - ret = serial8250_tx_dma(p); + ret = dma->tx_dma(p); if (ret) serial8250_set_THRI(p); From patchwork Thu Mar 10 16:16:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776646 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE8F9C433EF for ; Thu, 10 Mar 2022 16:17:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242146AbiCJQSp (ORCPT ); Thu, 10 Mar 2022 11:18:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242215AbiCJQSG (ORCPT ); Thu, 10 Mar 2022 11:18:06 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::226]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6758A190B6A for ; Thu, 10 Mar 2022 08:17:01 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id D726AC000A; Thu, 10 Mar 2022 16:16:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929018; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TNEWGrWM8MEFCyuhFvcwN9AqeFVgL6hJKTp6D8Wa6aw=; b=LzKToIzjJfKeaST+C0vREtqd+dePn1INiJJoqRM/wvRSCcCXvzTXzVMKOu8ddU4h59jXGb AaO32n3ds703Fr8aJv2dQWC/CBHac0IIhsL4itjJdHu5ozNmJwRLHbq0lP9qeZdiKhNmu1 enjuJPl7aUtomGJtUGujUQ4CoxBwOTZyC+0mMMuWahxDiLc6XlNwn7of98Nb3CI4+P1E/q Q0fbrHwxcplLsuLsOYjkde7J/uaxg5W6xBNvk5gx/SZqTRBMWq96GG6SNqnmO4OOX7JRjo XEyRUKWqKp2rFvYtvkOfbYmQ5KOBiqTSltKbqRzRD2xBdywVNdn/jFIP5LqWMA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 2/7] serial: 8250_dw: Move the per-device structure Date: Thu, 10 Mar 2022 17:16:45 +0100 Message-Id: <20220310161650.289387-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy This structure needs to be reused from dwlib, so let's move it into a shared header. There is no functional change. Signed-off-by: Phil Edworthy [miquel.raynal@bootlin.com: Extracted from a bigger change] Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 16 ---------------- drivers/tty/serial/8250/8250_dwlib.h | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 1769808031c5..ee7562a9ec76 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -37,22 +37,6 @@ /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) -struct dw8250_data { - struct dw8250_port_data data; - - u8 usr_reg; - int msr_mask_on; - int msr_mask_off; - struct clk *clk; - struct clk *pclk; - struct notifier_block clk_notifier; - struct work_struct clk_work; - struct reset_control *rst; - - unsigned int skip_autocfg:1; - unsigned int uart_16550_compatible:1; -}; - static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) { return container_of(data, struct dw8250_data, data); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 83d528e5cc21..ef63eaf7e598 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -16,5 +16,21 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_data { + struct dw8250_port_data data; + + u8 usr_reg; + int msr_mask_on; + int msr_mask_off; + struct clk *clk; + struct clk *pclk; + struct notifier_block clk_notifier; + struct work_struct clk_work; + struct reset_control *rst; + + unsigned int skip_autocfg:1; + unsigned int uart_16550_compatible:1; +}; + void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); void dw8250_setup_port(struct uart_port *p); From patchwork Thu Mar 10 16:16:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776642 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A840C4167D for ; Thu, 10 Mar 2022 16:17:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241803AbiCJQSl (ORCPT ); Thu, 10 Mar 2022 11:18:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242207AbiCJQSG (ORCPT ); Thu, 10 Mar 2022 11:18:06 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::226]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 22056190C38 for ; Thu, 10 Mar 2022 08:17:01 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id B7057C0005; Thu, 10 Mar 2022 16:16:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CJZBZm79jOepeJwYz+AdnFA8gp47gjCL5Z1SD7IGsiA=; b=DZgGosu/Kfy2qhe+UyyPoAgETCzi225XY0Zht+wbAoOivCQEg98kJj3vq/ODk2wWsdqoGh iCgNPaEm9dLYFUy4RIjLZYASU+3YM/FcII9xGCu98FMbDqeIjNd1YbFQuwJnUe2bcA9jYo fKBzCNCZ1+4CFZscKQ2b2qA1VoMrytdhIEvAZm3lK9WXpOOrcYA4MH2BD9Rgj6bAjTZYOI tkYyokxEGNUAqLI2LOjDNLhvcL4GN3r+RP8wRURCzd+oIeKVhZAUyR1NEIrn2Mj9B1IGWR 4RGzbVeCfTsALayDzuk/jGbLdFkHEjZAPHmlhg6FFg2PqpfT8I9MFsGClK84KQ== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 3/7] serial: 8250_dw: Use a fallback CPR value if not synthesized Date: Thu, 10 Mar 2022 17:16:46 +0100 Message-Id: <20220310161650.289387-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy This UART controller can be synthesized without the CPR register. In that case, let's use the platform information to provide a CPR value. Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dwlib.c | 10 ++++++++-- drivers/tty/serial/8250/8250_dwlib.h | 4 ++++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 622d3b0d89e7..5cf298c5a0f9 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -3,6 +3,7 @@ #include #include +#include #include #include #include @@ -90,6 +91,7 @@ EXPORT_SYMBOL_GPL(dw8250_do_set_termios); void dw8250_setup_port(struct uart_port *p) { struct uart_8250_port *up = up_to_u8250p(p); + const struct dw8250_platform_data *plat = of_device_get_match_data(up->port.dev); u32 reg; /* @@ -116,8 +118,12 @@ void dw8250_setup_port(struct uart_port *p) } reg = dw8250_readl_ext(p, DW_UART_CPR); - if (!reg) - return; + if (!reg) { + if (!plat) + return; + + reg = plat->cpr; + } /* Select the type based on FIFO */ if (reg & DW_UART_CPR_FIFO_MODE) { diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index ef63eaf7e598..ffce2744a28e 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -16,6 +16,10 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_platform_data { + u32 cpr; +}; + struct dw8250_data { struct dw8250_port_data data; From patchwork Thu Mar 10 16:16:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776647 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9D22C4321E for ; Thu, 10 Mar 2022 16:17:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239354AbiCJQSq (ORCPT ); Thu, 10 Mar 2022 11:18:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242217AbiCJQSG (ORCPT ); Thu, 10 Mar 2022 11:18:06 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::226]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B62F190B65 for ; Thu, 10 Mar 2022 08:17:03 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id D781FC0010; Thu, 10 Mar 2022 16:17:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929022; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FPCSyHd7wkuRRyYu2juVlQEYNZijKkKxdQfMbYXWDos=; b=Yc5tsTQC2tsD3R1Nxu1KKab3oHy1kAXFfdc7MytzOdO44xiwC4Fkg6kFRsqpGS1PFJN/PR +dZIllOMm2a5wweNCIhZuAp/gC8dSMyfjNvCuRYs1NB8uVEHLE808vpkKuUaMP3+izvAgs rYAh0KMERNv+O+tz0gtR1qpYnBLKfmNfirJ3Gq19y40bSCc8MOMoEfcS0669GtUZZj+FL7 IQ4/3cuO+lfrT5OgNkP5Ah3oo+w0iinA+jhZvWipWazhsH9pjbV2a9VeSN5VByZ9qnEHtQ 9P194hravE96WtdsmURc0zNO/SLwYPwLOKW5RyHkZQ2FBTvNn28mxgUdPZw/Kg== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 4/7] serial: 8250_dw: Provide the RZN1 CPR register value Date: Thu, 10 Mar 2022 17:16:47 +0100 Message-Id: <20220310161650.289387-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org On the RZN1 SoC, the DW serial IP has been synthesized without CPR support. In order to continue being able to parse the hardware capabilities, provide the equivalent register value as platform data. Suggested-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index ee7562a9ec76..1f7a423d6ef2 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -677,11 +677,15 @@ static const struct dev_pm_ops dw8250_pm_ops = { SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL) }; +static const struct dw8250_platform_data rzn1_pdata = { + .cpr = 0x00012f32, +}; + static const struct of_device_id dw8250_of_match[] = { { .compatible = "snps,dw-apb-uart" }, { .compatible = "cavium,octeon-3860-uart" }, { .compatible = "marvell,armada-38x-uart" }, - { .compatible = "renesas,rzn1-uart" }, + { .compatible = "renesas,rzn1-uart", .data = &rzn1_pdata }, { .compatible = "starfive,jh7100-uart" }, { /* Sentinel */ } }; From patchwork Thu Mar 10 16:16:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776641 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6293C4321E for ; Thu, 10 Mar 2022 16:17:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242070AbiCJQSl (ORCPT ); Thu, 10 Mar 2022 11:18:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242244AbiCJQSI (ORCPT ); Thu, 10 Mar 2022 11:18:08 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 703C5190C28 for ; Thu, 10 Mar 2022 08:17:06 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id DE54DC000E; Thu, 10 Mar 2022 16:17:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QfuY4BPsPm4y8C369DK0IcrB8LFleBUBPeKx7mPUKMc=; b=ZgkAxhHsTWsS4dqDk7Gf4CSbFZtSWOs6XVNw3sLh6Pf+BMuNgJ69/yO8bB5ZjUudMKABiF w9FeqUIcxWhxuiSmLezyoJsHvdPesB3JjrTlOnqHTzGfv0nX9b/Rq7Hdlqpzw8BV05kD8k iaIs2Zimhs/JrnTZin5bJ9/PT7mHwUTGf+4KDlKsLUofb8BfHF+36dzI1I/Vy+//iMYzem WTm+vGXGhjNXHaUWWtiWWZ3ja6hUBFgEMQ0sAs5Bhgqq7vUFv7k1tvC8O0Jtwg+NOhMtye 8JSD6Njo4XtsQDEOaTobnELZ0HYZMNa+sr6dNA/xK2aszX5B5tTH+HKMj+3FGA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 5/7] serial: 8250_dw: Add a dma_capable bit to the platform data Date: Thu, 10 Mar 2022 17:16:48 +0100 Message-Id: <20220310161650.289387-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy The CPR register can give the information whether the IP is DMA capable or not. Let's extract this information and use it to discriminate when the DMA can be hooked up or not. Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 4 ++-- drivers/tty/serial/8250/8250_dwlib.c | 7 +++++-- drivers/tty/serial/8250/8250_dwlib.h | 1 + 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 1f7a423d6ef2..c0f54284bc70 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -556,8 +556,8 @@ static int dw8250_probe(struct platform_device *pdev) if (!data->skip_autocfg) dw8250_setup_port(p); - /* If we have a valid fifosize, try hooking up DMA */ - if (p->fifosize) { + /* If we have a valid fifosize and DMA support, try hooking up DMA */ + if (p->fifosize && data->dma_capable) { data->data.dma.rxconf.src_maxburst = p->fifosize / 4; data->data.dma.txconf.dst_maxburst = p->fifosize / 4; up->dma = &data->data.dma; diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 5cf298c5a0f9..5ec7c12ed117 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -92,6 +92,8 @@ void dw8250_setup_port(struct uart_port *p) { struct uart_8250_port *up = up_to_u8250p(p); const struct dw8250_platform_data *plat = of_device_get_match_data(up->port.dev); + struct dw8250_port_data *d = p->private_data; + struct dw8250_data *data = container_of(d, struct dw8250_data, data); u32 reg; /* @@ -110,8 +112,6 @@ void dw8250_setup_port(struct uart_port *p) dw8250_writel_ext(p, DW_UART_DLF, 0); if (reg) { - struct dw8250_port_data *d = p->private_data; - d->dlf_size = fls(reg); p->get_divisor = dw8250_get_divisor; p->set_divisor = dw8250_set_divisor; @@ -138,5 +138,8 @@ void dw8250_setup_port(struct uart_port *p) if (reg & DW_UART_CPR_SIR_MODE) up->capabilities |= UART_CAP_IRDA; + + if (reg & DW_UART_CPR_DMA_EXTRA) + data->dma_capable = 1; } EXPORT_SYMBOL_GPL(dw8250_setup_port); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index ffce2744a28e..900b2321aff0 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -34,6 +34,7 @@ struct dw8250_data { unsigned int skip_autocfg:1; unsigned int uart_16550_compatible:1; + unsigned int dma_capable:1; }; void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); From patchwork Thu Mar 10 16:16:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776644 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1B0DC3527B for ; Thu, 10 Mar 2022 16:17:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241800AbiCJQSm (ORCPT ); Thu, 10 Mar 2022 11:18:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242340AbiCJQSL (ORCPT ); Thu, 10 Mar 2022 11:18:11 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C4CD190B65 for ; Thu, 10 Mar 2022 08:17:09 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 7A1D1C0014; Thu, 10 Mar 2022 16:17:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929027; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kye6zb5CJ+/1y3pryFv/kf2H9/v+1KWRa8BYpUA7+00=; b=f6A1TrlG5evlD8zA//r+6bUSGxaTMa8w9IYPXOs7DYrQmihIgAhej4j7DPkUj1dK4LPIQs 6tNpcrtUViVMocP1OyIPXIw5GaT9hw7Da+gk/JkySxn0oNXqYEEbIbHgOj+ncuKTVLvrjM cZvwDBdjoZ/b74gGF96VQy4Yk0pjBO9NkY2JxsBi7Wyb/KuP5Zgl3XW4YITS6IHq64MYUp 2jnEl/SFQZbXw5L8wDomoXRYNDZCneH2VVf9e1UnHhjoOdcUZuRintVgE4ueeiLOgqYxSP h2UaKaxeGE1nPvkVvcnr+GAlS8vssMo0QNaQ5ZEcqnIZ5oP5kHtlVRf60W5CJg== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 6/7] serial: 8250_dw: Add support for RZ/N1 DMA Date: Thu, 10 Mar 2022 17:16:49 +0100 Message-Id: <20220310161650.289387-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy The Renesas RZ/N1 devices have a modified Synopsys DW UART. The modifications are mostly related to the DMA handlnig, and so this patch adds support for DMA. The RZ/N1 UART must be used with the peripheral as the flow controller. This means the DMA length should also be programmed into UART registers. Aside from this, there are some points to note about DMA burst sizes. First, DMA must not remove all of the data from the rx FIFO. Otherwise, we do not get a 'character timeout' interrupt, and so do not know that we should push data up the serial stack. Therefore, we have the rx threshold for generating an interrupt set to half the FIFO depth (this is the default for 16550A), and set the DMA burst size when reading the FIFO to a quarter of the FIFO depth. Second, when transmitting data using DMA, the burst size must be limited to 1 byte to handle then case when transmitting just 1 byte. Otherwise the DMA doesn't complete the burst, and nothing happens. Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dma.c | 2 + drivers/tty/serial/8250/8250_dw.c | 97 ++++++++++++++++++++++++++++ drivers/tty/serial/8250/8250_dwlib.h | 1 + 3 files changed, 100 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index a0563f2341ac..0858c0b988a2 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -105,6 +105,7 @@ int serial8250_tx_dma(struct uart_8250_port *p) dma->tx_err = 1; return ret; } +EXPORT_SYMBOL_GPL(serial8250_tx_dma); int serial8250_rx_dma(struct uart_8250_port *p) { @@ -130,6 +131,7 @@ int serial8250_rx_dma(struct uart_8250_port *p) return 0; } +EXPORT_SYMBOL_GPL(serial8250_rx_dma); void serial8250_rx_dma_flush(struct uart_8250_port *p) { diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index c0f54284bc70..04e05fc939df 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -37,6 +37,20 @@ /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) +/* Offsets for the Renesas RZ/N1 DesignWare specific registers */ +/* DMA Software Ack */ +#define RZN1_UART_DMASA 0xa8 +/* DMA Control Register Transmit Mode */ +#define RZN1_UART_TDMACR 0x10c +/* DMA Control Register Receive Mode */ +#define RZN1_UART_RDMACR 0x110 + +#define RZN1_UART_xDMACR_DMA_EN BIT(0) +#define RZN1_UART_xDMACR_1_WORD_BURST 0 +#define RZN1_UART_xDMACR_4_WORD_BURST BIT(1) +#define RZN1_UART_xDMACR_8_WORD_BURST (BIT(1) | BIT(2)) +#define RZN1_UART_xDMACR_BLK_SZ_OFFSET 3 + static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) { return container_of(data, struct dw8250_data, data); @@ -217,6 +231,22 @@ static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset) } +static void rzn1_8250_handle_irq(struct uart_port *port, unsigned int iir) +{ + struct uart_8250_port *up = up_to_u8250p(port); + struct uart_8250_dma *dma = up->dma; + unsigned char status; + + if (up->dma && dma->rx_running) { + status = port->serial_in(port, UART_LSR); + if (status & (UART_LSR_DR | UART_LSR_BI)) { + /* Stop the DMA transfer */ + writel(0, port->membase + RZN1_UART_RDMACR); + writel(1, port->membase + RZN1_UART_DMASA); + } + } +} + static int dw8250_handle_irq(struct uart_port *p) { struct uart_8250_port *up = up_to_u8250p(p); @@ -245,6 +275,9 @@ static int dw8250_handle_irq(struct uart_port *p) spin_unlock_irqrestore(&p->lock, flags); } + if (d->is_rzn1 && ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)) + rzn1_8250_handle_irq(p, iir); + if (serial8250_handle_irq(p, iir)) return 1; @@ -368,6 +401,61 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) return param == chan->device->dev; } +static u32 rzn1_get_dmacr_burst(int max_burst) +{ + u32 val = 0; + + if (max_burst >= 8) + val = RZN1_UART_xDMACR_8_WORD_BURST; + else if (max_burst >= 4) + val = RZN1_UART_xDMACR_4_WORD_BURST; + else + val = RZN1_UART_xDMACR_1_WORD_BURST; + + return val; +} + +static int rzn1_dw8250_tx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + struct circ_buf *xmit = &p->port.state->xmit; + int tx_size; + u32 val; + + if (uart_tx_stopped(&p->port) || dma->tx_running || + uart_circ_empty(xmit)) + return 0; + + tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); + + writel(0, up->membase + RZN1_UART_TDMACR); + val = rzn1_get_dmacr_burst(dma->txconf.dst_maxburst); + val |= tx_size << RZN1_UART_xDMACR_BLK_SZ_OFFSET; + val |= RZN1_UART_xDMACR_DMA_EN; + writel(val, up->membase + RZN1_UART_TDMACR); + + return serial8250_tx_dma(p); +} + +static int rzn1_dw8250_rx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + if (dma->rx_running) + return 0; + + writel(0, up->membase + RZN1_UART_RDMACR); + val = rzn1_get_dmacr_burst(dma->rxconf.src_maxburst); + val |= dma->rx_size << RZN1_UART_xDMACR_BLK_SZ_OFFSET; + val |= RZN1_UART_xDMACR_DMA_EN; + writel(val, up->membase + RZN1_UART_RDMACR); + + return serial8250_rx_dma(p); +} + static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; @@ -501,6 +589,8 @@ static int dw8250_probe(struct platform_device *pdev) data->msr_mask_off |= UART_MSR_TERI; } + data->is_rzn1 = of_device_is_compatible(dev->of_node, "renesas,rzn1-uart"); + /* Always ask for fixed clock rate from a property. */ device_property_read_u32(dev, "clock-frequency", &p->uartclk); @@ -561,6 +651,13 @@ static int dw8250_probe(struct platform_device *pdev) data->data.dma.rxconf.src_maxburst = p->fifosize / 4; data->data.dma.txconf.dst_maxburst = p->fifosize / 4; up->dma = &data->data.dma; + + if (data->is_rzn1) { + data->data.dma.txconf.device_fc = 1; + data->data.dma.rxconf.device_fc = 1; + uart.dma->tx_dma = rzn1_dw8250_tx_dma; + uart.dma->rx_dma = rzn1_dw8250_rx_dma; + } } data->data.line = serial8250_register_8250_port(up); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 900b2321aff0..014005c170e4 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -35,6 +35,7 @@ struct dw8250_data { unsigned int skip_autocfg:1; unsigned int uart_16550_compatible:1; unsigned int dma_capable:1; + unsigned int is_rzn1:1; }; void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); From patchwork Thu Mar 10 16:16:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12776648 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAE9CC433FE for ; Thu, 10 Mar 2022 16:17:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242235AbiCJQSn (ORCPT ); Thu, 10 Mar 2022 11:18:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242361AbiCJQSM (ORCPT ); Thu, 10 Mar 2022 11:18:12 -0500 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FAED190B6A for ; Thu, 10 Mar 2022 08:17:10 -0800 (PST) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 26342C000A; Thu, 10 Mar 2022 16:17:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1646929029; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VjUPIaxQ1WBMLteeByIABCjhVWOu3Y3N20N5eUaJ/3w=; b=X7iP3eV6hikcEbM46cBxOKlShAsQUKQBFFesGuHsRkK7cJRwU0HGQCcpGhHRvfMYpL4MWE yLmovwzysfDt/8A+n683PbYnLsOwrNMmlrv90BvdgyHU2IldsffiPuRNFpULVjCMThwiIS r9TfkxOrBjRfhFZ1VisfjGgHX4S6gp1Nv4bDDVkpONx4k5h49PwAt0ab9Q+E9Qm+FlY/Kv r9ZiPJYmDSHO5M5KtR0l3gNxlteOU2BIgSRcBxHPMXMtAxSQNCAiEtkvtxilFwL80muP4K VPSLN3OS0oZAjJ42/Q1yY9OYacRbUL5Pp4ln6xfxrQHaKf3JhZqmpyoJpIvx4Q== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Greg Kroah-Hartman Cc: Jiri Slaby , Andy Shevchenko , linux-serial@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Miquel Raynal Subject: [PATCH 7/7] ARM: dts: r9a06g032: Fill the UART DMA properties Date: Thu, 10 Mar 2022 17:16:50 +0100 Message-Id: <20220310161650.289387-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220310161650.289387-1-miquel.raynal@bootlin.com> References: <20220310161650.289387-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org UART 0 to 2 do not have DMA support, while UART 3 to 7 do. Fill the "dmas" and "dma-names" properties for each of these nodes. Please mind that these nodes go through the dmamux node which will redirect the requests to the right DMA controller. The first 4 cells of the "dmas" properties will be transferred as-is to the DMA controllers. The last 2 cells are consumed by the dmamux. Which means cell 0 and 4 are almost redundant, one giving the controller request ID and the other the dmamux channel which is a 1:1 translation of the request IDs, shifted by 16 when pointing to the second DMA controller. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 804f2d6f416f..aa447e2622e0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -128,6 +128,9 @@ uart3: serial@50000000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 0 0 0 0 0 1>, + <&dmamux 1 0 0 0 1 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -139,6 +142,9 @@ uart4: serial@50001000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 2 0 0 0 2 1>, + <&dmamux 3 0 0 0 3 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -150,6 +156,9 @@ uart5: serial@50002000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 4 1>, + <&dmamux 5 0 0 0 5 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -161,6 +170,9 @@ uart6: serial@50003000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 6 0 0 0 6 1>, + <&dmamux 7 0 0 0 7 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -172,6 +184,9 @@ uart7: serial@50004000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 20 1>, + <&dmamux 5 0 0 0 21 1>; + dma-names = "rx", "tx"; status = "disabled"; };