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Wysocki" CC: "open list:X86 PLATFORM DRIVERS" , , Shyam Sundar S K , Goswami Sanket , Mario Limonciello Subject: [PATCH v4 1/3] ACPI / x86: Add support for LPS0 callback handler Date: Wed, 16 Mar 2022 16:29:22 -0500 Message-ID: <20220316212924.5619-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f6106d8f-fc6e-4410-b065-08da07940c70 X-MS-TrafficTypeDiagnostic: MWHPR1201MB0159:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bp818+/TQ0eCJXfd9uYbJTenAtoyuMPzqWTbPhXAaA8h4PuKFDlnn6vtTM6LvLBf6e3SV6Jevpa44Kf4HSFGp6CPbcDP7i4HmmZCl1IR2/hTnciH4jRf4tuFVHzQydWgpdpAWYpKL+X/RO3pPZMBtM9r/OsFF0eSyGDefwmZZQOnezRXh6nRRO5NsgAA0QWAWRrCdvaaG4vPw3bP75qr+wgFSwRWsoWwkIfZXydU0WsSoIpmndrqcYZ81b4nsta3SBhd2IeT1B8xEGkES47FG5kKjvE7Ik+e9PM7rTC4WkqkAWX1TYHKcArRGgsiAFshHYGf8s7YPEvNWdwm+0Xp8clH8NEkqcNPZ2EKP/l7bMv/S91UWkYlEFkv0zmQU15KyOtPRGk7/VdfThodUcT1BuA8bpFljqI3NL8V6pfGulRNN1n4u0wvU40m8zV2E8N8g1pC8g0wCqPXzui2Dg/QnyF3vVhc3gcKjEAlmTFsBKArJy7JYbpXi+IfW+wnT+ms/AaKQUaV7AK7sJs1tNYQj925Dygc9BY8m6DkRwFABe0Dmcs8rZQ5ai/xL+ZcojWoAH9YqR6kPqpwf8ZFokrbRK7mrvBLNpIhRLsH1iWK63upsWaP5kYMqKndSJmkj3RhLW3cDvHtBHiFFzjRI52sSddhJU/F+jJJalNo5REPPIqGWWZzWxRftkhjqnXuX35HrG7tXJamoF0ovj9+mY3oBA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(54906003)(110136005)(316002)(70586007)(36756003)(508600001)(82310400004)(45080400002)(70206006)(36860700001)(8936002)(44832011)(5660300002)(2906002)(40460700003)(8676002)(4326008)(356005)(81166007)(2616005)(86362001)(16526019)(47076005)(426003)(1076003)(7696005)(26005)(83380400001)(336012)(186003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2022 21:29:26.9737 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f6106d8f-fc6e-4410-b065-08da07940c70 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT019.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR1201MB0159 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Currenty the latest thing run during a suspend to idle attempt is the LPS0 `prepare_late` callback and the earliest thing is the `resume_early` callback. There is a desire for the `amd-pmc` driver to suspend later in the suspend process (ideally the very last thing), so create a callback that it or any other driver can hook into to do this. Signed-off-by: Mario Limonciello Reported-by: kernel test robot Reported-by: Dan Carpenter --- changes from v3->v4: * drop use of mutex, use lock_system_sleep instead * don't pass argument of context, driver will maintain this internally * don't allow failing prepare stage * don't allow unregistering if sleep_no_lps0 is set changes from v2->v3: * Check that callbacks exist before calling changes from v1->v2: * Change register/unregister arguments to be struct drivers/acpi/x86/s2idle.c | 40 +++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 10 +++++++++- 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c index abc06e7f89d8..8cd9a1016368 100644 --- a/drivers/acpi/x86/s2idle.c +++ b/drivers/acpi/x86/s2idle.c @@ -86,6 +86,8 @@ struct lpi_device_constraint_amd { int min_dstate; }; +static LIST_HEAD(lps0_s2idle_devops_head); + static struct lpi_constraints *lpi_constraints_table; static int lpi_constraints_table_size; static int rev_id; @@ -444,6 +446,8 @@ static struct acpi_scan_handler lps0_handler = { int acpi_s2idle_prepare_late(void) { + struct acpi_s2idle_dev_ops *handler; + if (!lps0_device_handle || sleep_no_lps0) return 0; @@ -474,14 +478,26 @@ int acpi_s2idle_prepare_late(void) acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_ENTRY, lps0_dsm_func_mask_microsoft, lps0_dsm_guid_microsoft); } + + list_for_each_entry(handler, &lps0_s2idle_devops_head, list_node) { + if (handler) + handler->prepare(); + } + return 0; } void acpi_s2idle_restore_early(void) { + struct acpi_s2idle_dev_ops *handler; + if (!lps0_device_handle || sleep_no_lps0) return; + list_for_each_entry(handler, &lps0_s2idle_devops_head, list_node) + if (handler->restore) + handler->restore(); + /* Modern standby exit */ if (lps0_dsm_func_mask_microsoft > 0) acpi_sleep_run_lps0_dsm(ACPI_LPS0_MS_EXIT, @@ -524,4 +540,28 @@ void acpi_s2idle_setup(void) s2idle_set_ops(&acpi_s2idle_ops_lps0); } +int acpi_register_lps0_dev(struct acpi_s2idle_dev_ops *arg) +{ + if (!lps0_device_handle || sleep_no_lps0) + return -ENODEV; + + lock_system_sleep(); + list_add(&arg->list_node, &lps0_s2idle_devops_head); + unlock_system_sleep(); + + return 0; +} +EXPORT_SYMBOL_GPL(acpi_register_lps0_dev); + +void acpi_unregister_lps0_dev(struct acpi_s2idle_dev_ops *arg) +{ + if (!lps0_device_handle || sleep_no_lps0) + return; + + lock_system_sleep(); + list_del(&arg->list_node); + unlock_system_sleep(); +} +EXPORT_SYMBOL_GPL(acpi_unregister_lps0_dev); + #endif /* CONFIG_SUSPEND */ diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 6274758648e3..47c16cdc8e0e 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1023,7 +1023,15 @@ void acpi_os_set_prepare_extended_sleep(int (*func)(u8 sleep_state, acpi_status acpi_os_prepare_extended_sleep(u8 sleep_state, u32 val_a, u32 val_b); - +#ifdef CONFIG_X86 +struct acpi_s2idle_dev_ops { + struct list_head list_node; + void (*prepare)(void); + void (*restore)(void); +}; +int acpi_register_lps0_dev(struct acpi_s2idle_dev_ops *arg); +void acpi_unregister_lps0_dev(struct acpi_s2idle_dev_ops *arg); +#endif /* CONFIG_X86 */ #ifndef CONFIG_IA64 void arch_reserve_mem_area(acpi_physical_address addr, size_t size); #else From patchwork Wed Mar 16 21:29:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 12783213 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22A44C433FE for ; Wed, 16 Mar 2022 21:29:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353394AbiCPVay (ORCPT ); Wed, 16 Mar 2022 17:30:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353348AbiCPVap (ORCPT ); Wed, 16 Mar 2022 17:30:45 -0400 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2043.outbound.protection.outlook.com [40.107.237.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CABC224F3D; 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Wysocki" CC: "open list:X86 PLATFORM DRIVERS" , , Shyam Sundar S K , Goswami Sanket , Mario Limonciello Subject: [PATCH v4 2/3] platform/x86: amd-pmc: Move to later in the suspend process Date: Wed, 16 Mar 2022 16:29:23 -0500 Message-ID: <20220316212924.5619-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220316212924.5619-1-mario.limonciello@amd.com> References: <20220316212924.5619-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 39dcbe74-891b-4a73-d130-08da07940cd4 X-MS-TrafficTypeDiagnostic: BN8PR12MB3139:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Ohzi3YyMsFHHczES+vH9uox9jz7r2TVkmZIFv32pXm7TaUCzQh7RwsQgYtxo6+dIU47vU2nBlRbRjfpOQu/1F6+1J5dWGPJNmO960YexyuliVfcTGsiEMBOnUc65+nNwTbcTIyPDD9PS8PyjMa3+yidMX3GkX+jznQCqX419MixutFoD7Kf/KgygbNzOGK9VJaBktE/wEh/J/b74fJhAX2UX7kNeNDRa80wJWK3WsZucQZJg/qVQw30FQGKjhMoSK4UvEVdwOw3RwDZYQYdAgMDizqGceJX2tjj0+2rE0m/FWvGFCR3Fu94U2MMe8BTtpBZqxY3ZHicowwdq6PpzViWL1YWOA0zJfkw6ccMMum/cNmXuW1J1q88uyq7PvtAMPZMKTVEbHuc0h4qMXWVK0wXvlFEjO3DwJ1SZt0eolXcI4inlS7fOpl09xfiT9aleMiSFHBa7hsdly069LOUhHTjM1CByiMD2EdjXsxcFxY3A1Pc1vJIK6LaG2wkzK+pORnptEklpvvdiolnlUMpOAElcWvkTHH/oWzIFPjymY/pE0xVUBnaqdL/N5ETcUEGsOeMLaqzqjfmpwHyoo1bESb+AoGihmb920xno8WeNDnsj+Jfd2c8Abg94EJd/hNY2koM8O8RM51rYgYvBY5We/zLLeIQYDljfuusFKRa2GNBQWl5+XKy9WPQyAoXboMv0428ThI8gw1F4Lc/9Xl2vpA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(110136005)(54906003)(44832011)(36756003)(36860700001)(47076005)(2906002)(40460700003)(8676002)(316002)(7696005)(356005)(70206006)(70586007)(336012)(8936002)(2616005)(81166007)(426003)(16526019)(15650500001)(4326008)(1076003)(186003)(26005)(82310400004)(508600001)(5660300002)(83380400001)(86362001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2022 21:29:27.6299 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 39dcbe74-891b-4a73-d130-08da07940cd4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT019.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3139 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The `OS_HINT` message is supposed to indicate that everything else that is supposed to go into the deepest state has done so. This assumption is invalid as: 1) The CPUs will still go in and out of the deepest state 2) Other devices may still run their `noirq` suspend routines 3) The LPS0 ACPI device will still run To more closely mirror how this works on other operating systems, move the `amd-pmc` suspend to the very last thing before the s2idle loop via an lps0 callback. Fixes: 8d89835b0467 ("PM: suspend: Do not pause cpuidle in the suspend-to-idle path") Signed-off-by: Mario Limonciello --- changes from v3->v4: * Drop constraints messaging * Adjust for changes on earlier patches * Don't fail init if sleep_no_lps0 is set changes from v2->v3: * no changes changes from v1->v2: * adjust for changes in previous patches * display a debugging message for constraints drivers/platform/x86/amd-pmc.c | 49 +++++++++++++++++----------------- 1 file changed, 24 insertions(+), 25 deletions(-) diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c index 971aaabaa9c8..d4b1bf4b58b6 100644 --- a/drivers/platform/x86/amd-pmc.c +++ b/drivers/platform/x86/amd-pmc.c @@ -639,9 +639,9 @@ static int amd_pmc_verify_czn_rtc(struct amd_pmc_dev *pdev, u32 *arg) return rc; } -static int __maybe_unused amd_pmc_suspend(struct device *dev) +static void amd_pmc_s2idle_prepare(void) { - struct amd_pmc_dev *pdev = dev_get_drvdata(dev); + struct amd_pmc_dev *pdev = &pmc; int rc; u8 msg; u32 arg = 1; @@ -653,56 +653,53 @@ static int __maybe_unused amd_pmc_suspend(struct device *dev) /* Activate CZN specific RTC functionality */ if (pdev->cpu_id == AMD_CPU_ID_CZN) { rc = amd_pmc_verify_czn_rtc(pdev, &arg); - if (rc) + if (rc) { + dev_err(pdev->dev, "failed to set RTC: %d\n", rc); goto fail; + } } /* Dump the IdleMask before we send hint to SMU */ - amd_pmc_idlemask_read(pdev, dev, NULL); + amd_pmc_idlemask_read(pdev, pdev->dev, NULL); msg = amd_pmc_get_os_hint(pdev); rc = amd_pmc_send_cmd(pdev, arg, NULL, msg, 0); if (rc) { - dev_err(pdev->dev, "suspend failed\n"); + dev_err(pdev->dev, "suspend failed: %d\n", rc); goto fail; } if (enable_stb) rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_PREDEF); - if (rc) { - dev_err(pdev->dev, "error writing to STB\n"); - goto fail; - } - - return 0; + if (rc) + dev_err(pdev->dev, "error writing to STB: %d\n", rc); fail: if (pdev->cpu_id == AMD_CPU_ID_CZN) cpu_latency_qos_update_request(&pdev->amd_pmc_pm_qos_req, PM_QOS_DEFAULT_VALUE); - return rc; } -static int __maybe_unused amd_pmc_resume(struct device *dev) +static void amd_pmc_s2idle_restore(void) { - struct amd_pmc_dev *pdev = dev_get_drvdata(dev); + struct amd_pmc_dev *pdev = &pmc; int rc; u8 msg; msg = amd_pmc_get_os_hint(pdev); rc = amd_pmc_send_cmd(pdev, 0, NULL, msg, 0); if (rc) - dev_err(pdev->dev, "resume failed\n"); + dev_err(pdev->dev, "resume failed: %d\n", rc); /* Let SMU know that we are looking for stats */ amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_DUMP_DATA, 0); /* Dump the IdleMask to see the blockers */ - amd_pmc_idlemask_read(pdev, dev, NULL); + amd_pmc_idlemask_read(pdev, pdev->dev, NULL); /* Write data incremented by 1 to distinguish in stb_read */ if (enable_stb) rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_PREDEF + 1); if (rc) - dev_err(pdev->dev, "error writing to STB\n"); + dev_err(pdev->dev, "error writing to STB: %d\n", rc); /* Restore the QoS request back to defaults if it was set */ if (pdev->cpu_id == AMD_CPU_ID_CZN) @@ -711,15 +708,8 @@ static int __maybe_unused amd_pmc_resume(struct device *dev) /* Notify on failed entry */ amd_pmc_validate_deepest(pdev); - - return rc; } -static const struct dev_pm_ops amd_pmc_pm_ops = { - .suspend_noirq = amd_pmc_suspend, - .resume_noirq = amd_pmc_resume, -}; - static const struct pci_device_id pmc_pci_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_YC) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_CZN) }, @@ -802,6 +792,11 @@ static int amd_pmc_read_stb(struct amd_pmc_dev *dev, u32 *buf) return 0; } +static struct acpi_s2idle_dev_ops amd_pmc_s2idle_dev_ops = { + .prepare = amd_pmc_s2idle_prepare, + .restore = amd_pmc_s2idle_restore, +}; + static int amd_pmc_probe(struct platform_device *pdev) { struct amd_pmc_dev *dev = &pmc; @@ -884,6 +879,10 @@ static int amd_pmc_probe(struct platform_device *pdev) amd_pmc_get_smu_version(dev); platform_set_drvdata(pdev, dev); + err = acpi_register_lps0_dev(&amd_pmc_s2idle_dev_ops); + if (err) + dev_warn(dev->dev, "failed to register LPS0 sleep handler, expect increased power consumption\n"); + amd_pmc_dbgfs_register(dev); cpu_latency_qos_add_request(&dev->amd_pmc_pm_qos_req, PM_QOS_DEFAULT_VALUE); return 0; @@ -897,6 +896,7 @@ static int amd_pmc_remove(struct platform_device *pdev) { struct amd_pmc_dev *dev = platform_get_drvdata(pdev); + acpi_unregister_lps0_dev(&amd_pmc_s2idle_dev_ops); amd_pmc_dbgfs_unregister(dev); pci_dev_put(dev->rdev); mutex_destroy(&dev->lock); @@ -917,7 +917,6 @@ static struct platform_driver amd_pmc_driver = { .driver = { .name = "amd_pmc", .acpi_match_table = amd_pmc_acpi_ids, - .pm = &amd_pmc_pm_ops, }, .probe = amd_pmc_probe, .remove = amd_pmc_remove, From patchwork Wed Mar 16 21:29:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 12783214 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 877FCC4332F for ; Wed, 16 Mar 2022 21:29:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353348AbiCPVaz (ORCPT ); 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Wed, 16 Mar 2022 16:29:26 -0500 From: Mario Limonciello To: Hans de Goede , Mark Gross , "Rafael J . Wysocki" CC: "open list:X86 PLATFORM DRIVERS" , , Shyam Sundar S K , Goswami Sanket , Mario Limonciello Subject: [PATCH v4 3/3] platform/x86: amd-pmc: Drop CPU QoS workaround Date: Wed, 16 Mar 2022 16:29:24 -0500 Message-ID: <20220316212924.5619-3-mario.limonciello@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220316212924.5619-1-mario.limonciello@amd.com> References: <20220316212924.5619-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b32b99c1-3ed0-49f3-ae59-08da07940db9 X-MS-TrafficTypeDiagnostic: DM5PR1201MB0204:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: chDNpRICnJAMMEG6Vhsk8iKXEliR5HTuORTqDtUggVb8iOEbU4LEJqpzr+g9vdUOSKN+/5NUej/9Ly0OWG3dnyzEMk22yVZz6XTIPKvZ6373tUml8vuVtm5zK0xl8IU8YL8GwhMpAzK+nZDtmOkhR74zDYEzQusP5VoalANbdP+q8cPMv2rYtZ/fuAYpmGl5hdjlhnWmxgUT4T5QEnAxF0px5htF5l3lW0U+8x7DPhAD3wPzQGuV81rvOHJrAacGlOMA9D7QD1OKO3joqw26b/+P4EGNnt4f3h95qqGbSEsOS6TQKYPnzWx9BO/clMCFqTEHAPI3li6RYYK0oQ611WT+V+GnmJVOuA0ppXhuHoStHGnavfwrB6w1s4m7JpcuCfX079MYHSTXfqtnxUREaSD1sjLZwwX/2ZE7onzqYHdH7KbBLce/Oj2h3Z1YHI8pPYEMiAqOhmTOcf8BcSch6lBuHEbCwya2yPaC+t76vBZppUY2s8vYOaOgnnCHE7jhJT7sax1H9zDQZQBWnjJVDzDC3+saiV5zXr0QYivFjYntJfbN2m6E/BT3IxixLf1fBWk1vI1oHZZX0QVXKXqV8Z4kIGZpacbYjF5727MocUqNSNNuxazwQYpCtH7Oq3xJkX0459meYwdv6tKMtggPbZywS2sbJ4kBZCL5ChCj9jH/8Q6oQ6ko0mgYBKIZAK2RoLMIjbZgRyX/54QI6nWq/Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(54906003)(110136005)(316002)(2906002)(36756003)(70586007)(36860700001)(508600001)(82310400004)(70206006)(44832011)(5660300002)(8936002)(4326008)(8676002)(356005)(81166007)(86362001)(16526019)(47076005)(2616005)(7696005)(1076003)(336012)(426003)(83380400001)(186003)(26005)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Mar 2022 21:29:29.1298 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b32b99c1-3ed0-49f3-ae59-08da07940db9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT019.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1201MB0204 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org A workaround was previously introduced as part of commit 646f429ec2de ("platform/x86: amd-pmc: Set QOS during suspend on CZN w/ timer wakeup") to prevent CPUs from going into the deepest state during the execution of the `noirq` stage of `amd_pmc`. As `amd_pmc` has been pushed to the last step for suspend on AMD platforms, this workaround is no longer necessary. Signed-off-by: Mario Limonciello --- changes from v3->v4: * rebase on earlier patches changes from v2->v3: * No changes changes from v1->v2: * No changes drivers/platform/x86/amd-pmc.c | 27 ++------------------------- 1 file changed, 2 insertions(+), 25 deletions(-) diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c index d4b1bf4b58b6..2ba79b2bb97f 100644 --- a/drivers/platform/x86/amd-pmc.c +++ b/drivers/platform/x86/amd-pmc.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include #include @@ -96,9 +95,6 @@ #define PMC_MSG_DELAY_MIN_US 50 #define RESPONSE_REGISTER_LOOP_MAX 20000 -/* QoS request for letting CPUs in idle states, but not the deepest */ -#define AMD_PMC_MAX_IDLE_STATE_LATENCY 3 - #define SOC_SUBSYSTEM_IP_MAX 12 #define DELAY_MIN_US 2000 #define DELAY_MAX_US 3000 @@ -153,7 +149,6 @@ struct amd_pmc_dev { struct device *dev; struct pci_dev *rdev; struct mutex lock; /* generic mutex lock */ - struct pm_qos_request amd_pmc_pm_qos_req; #if IS_ENABLED(CONFIG_DEBUG_FS) struct dentry *dbgfs_dir; #endif /* CONFIG_DEBUG_FS */ @@ -628,14 +623,6 @@ static int amd_pmc_verify_czn_rtc(struct amd_pmc_dev *pdev, u32 *arg) rc = rtc_alarm_irq_enable(rtc_device, 0); dev_dbg(pdev->dev, "wakeup timer programmed for %lld seconds\n", duration); - /* - * Prevent CPUs from getting into deep idle states while sending OS_HINT - * which is otherwise generally safe to send when at least one of the CPUs - * is not in deep idle states. - */ - cpu_latency_qos_update_request(&pdev->amd_pmc_pm_qos_req, AMD_PMC_MAX_IDLE_STATE_LATENCY); - wake_up_all_idle_cpus(); - return rc; } @@ -655,7 +642,7 @@ static void amd_pmc_s2idle_prepare(void) rc = amd_pmc_verify_czn_rtc(pdev, &arg); if (rc) { dev_err(pdev->dev, "failed to set RTC: %d\n", rc); - goto fail; + return; } } @@ -665,17 +652,13 @@ static void amd_pmc_s2idle_prepare(void) rc = amd_pmc_send_cmd(pdev, arg, NULL, msg, 0); if (rc) { dev_err(pdev->dev, "suspend failed: %d\n", rc); - goto fail; + return; } if (enable_stb) rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_PREDEF); if (rc) dev_err(pdev->dev, "error writing to STB: %d\n", rc); -fail: - if (pdev->cpu_id == AMD_CPU_ID_CZN) - cpu_latency_qos_update_request(&pdev->amd_pmc_pm_qos_req, - PM_QOS_DEFAULT_VALUE); } static void amd_pmc_s2idle_restore(void) @@ -701,11 +684,6 @@ static void amd_pmc_s2idle_restore(void) if (rc) dev_err(pdev->dev, "error writing to STB: %d\n", rc); - /* Restore the QoS request back to defaults if it was set */ - if (pdev->cpu_id == AMD_CPU_ID_CZN) - cpu_latency_qos_update_request(&pdev->amd_pmc_pm_qos_req, - PM_QOS_DEFAULT_VALUE); - /* Notify on failed entry */ amd_pmc_validate_deepest(pdev); } @@ -884,7 +862,6 @@ static int amd_pmc_probe(struct platform_device *pdev) dev_warn(dev->dev, "failed to register LPS0 sleep handler, expect increased power consumption\n"); amd_pmc_dbgfs_register(dev); - cpu_latency_qos_add_request(&dev->amd_pmc_pm_qos_req, PM_QOS_DEFAULT_VALUE); return 0; err_pci_dev_put: