From patchwork Thu Mar 17 17:46:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784387 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CEE1C433FE for ; Thu, 17 Mar 2022 17:46:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237051AbiCQRsG (ORCPT ); Thu, 17 Mar 2022 13:48:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237054AbiCQRrw (ORCPT ); Thu, 17 Mar 2022 13:47:52 -0400 X-Greylist: delayed 97539 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Thu, 17 Mar 2022 10:46:34 PDT Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7CC221EA5F3; Thu, 17 Mar 2022 10:46:34 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 6671AFF805; Thu, 17 Mar 2022 17:46:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539192; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AnAWj0GNVR7vedRh1qVgjfr2ph03zkT1xTwsURAcXYg=; b=Gcm+Z7sGaxiCOe1Q4UNr0RkH6Sss+io1gM04nh4O/Tj5Zy4bOJV/vre2SCZKge/kclsG4L eykZfHkI+CmY8TiMgzj11XWI1riCp8MFRf+fCb/vpxvpXFSg+Jmn+/GSpp6PkLLdpWFr+Y jfxJJrw8eQ8E0ynVkz+bOjWE0D1JZaLPb+FIzOcL+Ll9ZUyUvLOIFDpzK3wANVyC9tglYH zbpuveZQkmpyARAm6BkCZmofJHWA/XtlDFN1/sibPMVnQaBvnRmrHIZ04WGwtu789OEURh DJ3+l3zvjr8Uf09BTtheSY7/nKGUp1Ri/LciORNKrCMf1t6K8570p6BsRd3RzQ== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 01/10] serial: 8250: dw: Move the per-device structure Date: Thu, 17 Mar 2022 18:46:18 +0100 Message-Id: <20220317174627.360815-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy This structure needs to be reused from dwlib, so let's move it into a shared header. There is no functional change. Signed-off-by: Phil Edworthy [miquel.raynal@bootlin.com: Extracted from a bigger change] Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 16 ---------------- drivers/tty/serial/8250/8250_dwlib.h | 20 ++++++++++++++++++++ 2 files changed, 20 insertions(+), 16 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 96a62e95726b..d89731d6c94c 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -42,22 +42,6 @@ #define DW_UART_QUIRK_ARMADA_38X BIT(1) #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) -struct dw8250_data { - struct dw8250_port_data data; - - u8 usr_reg; - int msr_mask_on; - int msr_mask_off; - struct clk *clk; - struct clk *pclk; - struct notifier_block clk_notifier; - struct work_struct clk_work; - struct reset_control *rst; - - unsigned int skip_autocfg:1; - unsigned int uart_16550_compatible:1; -}; - static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) { return container_of(data, struct dw8250_data, data); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 83d528e5cc21..6ffbf502829e 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -2,6 +2,10 @@ /* Synopsys DesignWare 8250 library header file. */ #include +#include +#include +#include +#include #include "8250.h" @@ -16,5 +20,21 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_data { + struct dw8250_port_data data; + + u8 usr_reg; + int msr_mask_on; + int msr_mask_off; + struct clk *clk; + struct clk *pclk; + struct notifier_block clk_notifier; + struct work_struct clk_work; + struct reset_control *rst; + + unsigned int skip_autocfg:1; + unsigned int uart_16550_compatible:1; +}; + void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); void dw8250_setup_port(struct uart_port *p); From patchwork Thu Mar 17 17:46:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784388 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3821C43217 for ; Thu, 17 Mar 2022 17:46:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237061AbiCQRsH (ORCPT ); Thu, 17 Mar 2022 13:48:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237063AbiCQRrx (ORCPT ); Thu, 17 Mar 2022 13:47:53 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C62C1EC984; Thu, 17 Mar 2022 10:46:36 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 19AF7FF80B; Thu, 17 Mar 2022 17:46:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539195; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=KKVr7N2j8FFtbngS0O/xzuSQW98DT1L97+gy+JEQYOU=; b=VGF5C5lkEhnb41EQFdPwrQs91EsA2JeSgmsqkR1sxPCMgx1N+t/kAU6LVpXVaHUqmyE5w2 Lq5zJMWMOraS9IvzGI3xXg9qWtVAyz5qoKUiWe7mkiCDCO81b7n//huz+yE9TD2FPQxLO0 x0ncHWHkUICsibpjijIlyZZENR+MZP6MbGR4ORaVZ2EhtOBPCrFvCXWBJtYLDrO0Pgl63v 9CRn0ZVsoKv+NOYyjkH+gPZXTRulx448JxA9/iOUrOalBC5fseltxgJv+CudxnR77VvMyD gF0SDwiICiX3YtUZXjogCLOBpj80Bv+/Du3uiDB349s4RsMyL5ECVFIJb4cPCw== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal , Emil Renner Berthing Subject: [PATCH v2 02/10] serial: 8250: dw: Use the device API Date: Thu, 17 Mar 2022 18:46:19 +0100 Message-Id: <20220317174627.360815-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Use the device API instead of the of_* API. While at it move this operation outside of the if block to reduce the indentation level. Cc: Emil Renner Berthing Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/8250/8250_dw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index d89731d6c94c..28f0dea2ed88 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -376,9 +376,9 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; + unsigned long quirks = (unsigned long)device_get_match_data(p->dev); if (np) { - unsigned long quirks = (unsigned long)of_device_get_match_data(p->dev); int id; /* get index of serial line, if found in DT aliases */ From patchwork Thu Mar 17 17:46:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784389 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69F58C4167B for ; Thu, 17 Mar 2022 17:46:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237067AbiCQRsI (ORCPT ); Thu, 17 Mar 2022 13:48:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237083AbiCQRr4 (ORCPT ); Thu, 17 Mar 2022 13:47:56 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D68181EFE13; Thu, 17 Mar 2022 10:46:37 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 25EC3FF80D; Thu, 17 Mar 2022 17:46:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539196; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rdYfWqffJTdCQkVjQxkQ/0E062b9xCGzG3oHIsosqO0=; b=auhiC/jN0fH2lKTsvCWrhifO/1njKlnfJPWVdG0xLU0FwfvynAOlRFWg1mg9x7aR8WBeq4 veqJ6xDvAFvL7PriKUROnJbm19t9a1WqzHT8BR+0qYyC6/9885enIYE1gbgDKWs0ZfQ4f6 5J9vL+bBYmn8cnbZSSgdQMJFBe9ZUat0mmCVU4RkaKZskOJ6D4w++TUFwSB038DMOE5eeq B28ykRwwP/xv5tP1U2aBdUfZDzvLpjfi44pZ0gUbnpSvKNKU2x6K4SeszIrasBdfgRDo38 k+Y5GSZ/a4XObM7j/1QucK5qQaymLXiozgmgl1tLkzDEOHkSvqoeBz13K7P4LQ== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal , Emil Renner Berthing Subject: [PATCH v2 03/10] serial: 8250: dw: Create a more generic platform data structure Date: Thu, 17 Mar 2022 18:46:20 +0100 Message-Id: <20220317174627.360815-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Before adding more platform data information, let's turn the quirks information as being a member of a wider structure. More fields will be added later. Cc: Emil Renner Berthing Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/8250/8250_dw.c | 24 +++++++++++++++++++----- drivers/tty/serial/8250/8250_dwlib.h | 4 ++++ 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 28f0dea2ed88..88fa17882df5 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -376,7 +377,8 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; - unsigned long quirks = (unsigned long)device_get_match_data(p->dev); + const struct dw8250_platform_data *pdata = device_get_match_data(p->dev); + unsigned long quirks = pdata ? pdata->quirks : 0; if (np) { int id; @@ -683,13 +685,25 @@ static const struct dev_pm_ops dw8250_pm_ops = { SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL) }; +static const struct dw8250_platform_data dw8250_octeon_3860_data = { + .quirks = DW_UART_QUIRK_OCTEON, +}; + +static const struct dw8250_platform_data dw8250_armada_38x_data = { + .quirks = DW_UART_QUIRK_ARMADA_38X, +}; + +static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { + .quirks = DW_UART_QUIRK_SKIP_SET_RATE, +}; + static const struct of_device_id dw8250_of_match[] = { { .compatible = "snps,dw-apb-uart" }, - { .compatible = "cavium,octeon-3860-uart", .data = (void *)DW_UART_QUIRK_OCTEON }, - { .compatible = "marvell,armada-38x-uart", .data = (void *)DW_UART_QUIRK_ARMADA_38X }, + { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, + { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, { .compatible = "renesas,rzn1-uart" }, - { .compatible = "starfive,jh7100-hsuart", .data = (void *)DW_UART_QUIRK_SKIP_SET_RATE }, - { .compatible = "starfive,jh7100-uart", .data = (void *)DW_UART_QUIRK_SKIP_SET_RATE }, + { .compatible = "starfive,jh7100-hsuart", .data = &dw8250_starfive_jh7100_data }, + { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, dw8250_of_match); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 6ffbf502829e..766f80799d13 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -20,6 +20,10 @@ struct dw8250_port_data { u8 dlf_size; }; +struct dw8250_platform_data { + unsigned long quirks; +}; + struct dw8250_data { struct dw8250_port_data data; From patchwork Thu Mar 17 17:46:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784390 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DC6DC433FE for ; Thu, 17 Mar 2022 17:46:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229489AbiCQRsI (ORCPT ); Thu, 17 Mar 2022 13:48:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237084AbiCQRr4 (ORCPT ); Thu, 17 Mar 2022 13:47:56 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A35CC1EE8EC; Thu, 17 Mar 2022 10:46:39 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E27A5FF80A; Thu, 17 Mar 2022 17:46:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539198; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8ujaBaGXFtDM/NjNrc3TChSe0Mm8wiA7Xo0TOjO6Y0E=; b=PonD/FVUmYjHrLWWSt+10OKtIOi4AmiSobWLhobkIxZ8KHqdb6s+9xxJnzPQdtAaPjCccu /dL4y1zUbXKpLn6yGFXVUeXa0CaMRVjxNoPYy4s6UrVeA99TuIDPT9R4aAjP7er17gjrkv EQwKajp9aYxOV9NKzScvc44EB1TsHOjas7g+EkA1dDXMGqKKkoqCXjf5llw/hKWwUCSuow d4HV/zH5AJceoaCoZeHqb6XbWKGsR1AedQj4KqgsDf3lSXNfISWyWA1fSm25xS2kHzfsby A/+8r0wkSj5Vczgu1wgvSzgvPgGxsKKaGqk1Io80HvWkGT7KgfgpdR85DdWRYA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 04/10] serial: 8250: dw: Allow to use a fallback CPR value if not synthesized Date: Thu, 17 Mar 2022 18:46:21 +0100 Message-Id: <20220317174627.360815-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy DW UART controllers can be synthesized without the CPR register. In this case, allow to the platform information to provide a CPR value. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dwlib.c | 4 ++++ drivers/tty/serial/8250/8250_dwlib.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 622d3b0d89e7..cef20ca3ad61 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include @@ -90,6 +91,7 @@ EXPORT_SYMBOL_GPL(dw8250_do_set_termios); void dw8250_setup_port(struct uart_port *p) { struct uart_8250_port *up = up_to_u8250p(p); + const struct dw8250_platform_data *pdata = device_get_match_data(up->port.dev); u32 reg; /* @@ -116,6 +118,8 @@ void dw8250_setup_port(struct uart_port *p) } reg = dw8250_readl_ext(p, DW_UART_CPR); + if (!reg && pdata) + reg = pdata->cpr; if (!reg) return; diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 766f80799d13..704ba91ab09f 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -22,6 +22,7 @@ struct dw8250_port_data { struct dw8250_platform_data { unsigned long quirks; + u32 cpr; }; struct dw8250_data { From patchwork Thu Mar 17 17:46:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784391 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2CD2C433EF for ; Thu, 17 Mar 2022 17:46:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237068AbiCQRsJ (ORCPT ); Thu, 17 Mar 2022 13:48:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237100AbiCQRr6 (ORCPT ); Thu, 17 Mar 2022 13:47:58 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B5421F0815; Thu, 17 Mar 2022 10:46:41 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 8E895FF80F; Thu, 17 Mar 2022 17:46:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539200; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y9YWoHK4ejuaax5XaySWfXqZvEQkGQZZG6fyYDYhjcw=; b=YDfWP0t4hkGnuRgIgINJISzaJqv8ylyjylXXaWdy+IqYU9RgFsbc0p84kVz6vZnM3cBCYc tbQ3oWHgJV+45O8G5ReePXhoLb56UVfeolenNQ5AkZBJ6+kn1Oj9ps7gAAgEQPB2jI4KOU U+C/RPA1NhtUMPWWu4HzN8doQFLQRFlsV5yR4zO1gVBIv8BjCqEwToCN3EDygCABbXUgVA XHrF2FOyVPf51AZQWSs5mpZrRgEYHRGnUpSzq3KGa8M8MwfWGkcvuNnuGR8Drd4ueZ0GSa EuSGfKnkzDlH0x9/RUorDIOQpHFx2fhEeKHUpPgCY+GOJHzTi+tofqUl/KZOGA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 05/10] serial: 8250: dw: Check when possible if DMA is effectively supported Date: Thu, 17 Mar 2022 18:46:22 +0100 Message-Id: <20220317174627.360815-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The CPR register can give the information whether the IP is DMA capable or not. Let's extract this information when the CPR register is valid and use it to discriminate when the DMA cannot be hooked up. We assume existing designs either provide a valid CPR register or do not provide any. Co-developed-by: Phil Edworthy Signed-off-by: Phil Edworthy Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 4 ++-- drivers/tty/serial/8250/8250_dwlib.c | 7 +++++-- drivers/tty/serial/8250/8250_dwlib.h | 1 + 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 88fa17882df5..2f4a818f787c 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -564,8 +564,8 @@ static int dw8250_probe(struct platform_device *pdev) if (!data->skip_autocfg) dw8250_setup_port(p); - /* If we have a valid fifosize, try hooking up DMA */ - if (p->fifosize) { + /* If we have a valid fifosize and DMA support, try hooking up DMA */ + if (p->fifosize && !data->no_dma) { data->data.dma.rxconf.src_maxburst = p->fifosize / 4; data->data.dma.txconf.dst_maxburst = p->fifosize / 4; up->dma = &data->data.dma; diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index cef20ca3ad61..b3ff67401670 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -92,6 +92,8 @@ void dw8250_setup_port(struct uart_port *p) { struct uart_8250_port *up = up_to_u8250p(p); const struct dw8250_platform_data *pdata = device_get_match_data(up->port.dev); + struct dw8250_port_data *d = p->private_data; + struct dw8250_data *data = container_of(d, struct dw8250_data, data); u32 reg; /* @@ -110,8 +112,6 @@ void dw8250_setup_port(struct uart_port *p) dw8250_writel_ext(p, DW_UART_DLF, 0); if (reg) { - struct dw8250_port_data *d = p->private_data; - d->dlf_size = fls(reg); p->get_divisor = dw8250_get_divisor; p->set_divisor = dw8250_set_divisor; @@ -136,5 +136,8 @@ void dw8250_setup_port(struct uart_port *p) if (reg & DW_UART_CPR_SIR_MODE) up->capabilities |= UART_CAP_IRDA; + + if (!(reg & DW_UART_CPR_DMA_EXTRA)) + data->no_dma = 1; } EXPORT_SYMBOL_GPL(dw8250_setup_port); diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 704ba91ab09f..ff965345fc14 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -39,6 +39,7 @@ struct dw8250_data { unsigned int skip_autocfg:1; unsigned int uart_16550_compatible:1; + unsigned int no_dma:1; }; void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, struct ktermios *old); From patchwork Thu Mar 17 17:46:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784394 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E66EC3527C for ; Thu, 17 Mar 2022 17:46:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237052AbiCQRsK (ORCPT ); Thu, 17 Mar 2022 13:48:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237114AbiCQRsA (ORCPT ); Thu, 17 Mar 2022 13:48:00 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A6711F0815; Thu, 17 Mar 2022 10:46:43 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 4211EFF813; Thu, 17 Mar 2022 17:46:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539202; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Y2lJyEILsp8NDkKtykYkfjKRpqQEf+GhkYUQftZF+0c=; b=DZMrNVil6pfIDjQOGubuc++NjYI5c4vF4y1ohjcxlaqDDYrUUEJKDjXFj08UpaRppHJV7t 6sC6VgXObWvegGo9HE70SWzggkntlXIvdkMptqVNnDcZUqKH3HcmjMJ3ZXlBFos025sBuE /D/qzwR9EpBMqaS3V9bPq94jJRXfgHK4V+SOcJoy7LhDYoXZltXNt1zgKoWNuoD+CrYt4u KpPw5W17Tk7jgJtYXNaePR+1gvjaw164Tj5+n/nngg+WRVnbx2v4kkM1bhQq6sMie5x2b8 mFx7rgeV01T3CljpZZIx6oVDSjlAoqNu9bszSdm3XjaAPfYwykpHRBovqA792w== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 06/10] serial: 8250: dma: Allow driver operations before starting DMA transfers Date: Thu, 17 Mar 2022 18:46:23 +0100 Message-Id: <20220317174627.360815-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org One situation where this could be used is when configuring the UART controller to be the DMA flow controller. This is a typical case where the driver might need to program a few more registers before starting a DMA transfer. Provide the necessary infrastructure to support this case. Suggested-by: Andy Shevchenko Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250.h | 18 ++++++++++++++++++ drivers/tty/serial/8250/8250_dma.c | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/drivers/tty/serial/8250/8250.h b/drivers/tty/serial/8250/8250.h index db784ace25d8..d19f24e4d13e 100644 --- a/drivers/tty/serial/8250/8250.h +++ b/drivers/tty/serial/8250/8250.h @@ -17,6 +17,8 @@ struct uart_8250_dma { int (*tx_dma)(struct uart_8250_port *p); int (*rx_dma)(struct uart_8250_port *p); + void (*prepare_tx_dma)(struct uart_8250_port *p); + void (*prepare_rx_dma)(struct uart_8250_port *p); /* Filter function */ dma_filter_fn fn; @@ -301,6 +303,22 @@ extern int serial8250_rx_dma(struct uart_8250_port *); extern void serial8250_rx_dma_flush(struct uart_8250_port *); extern int serial8250_request_dma(struct uart_8250_port *); extern void serial8250_release_dma(struct uart_8250_port *); + +static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + + if (dma->prepare_tx_dma) + dma->prepare_tx_dma(p); +} + +static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p) +{ + struct uart_8250_dma *dma = p->dma; + + if (dma->prepare_rx_dma) + dma->prepare_rx_dma(p); +} #else static inline int serial8250_tx_dma(struct uart_8250_port *p) { diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 890fa7ddaa7f..558d3a2ac65b 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -77,6 +77,8 @@ int serial8250_tx_dma(struct uart_8250_port *p) dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); + serial8250_do_prepare_tx_dma(p); + desc = dmaengine_prep_slave_single(dma->txchan, dma->tx_addr + xmit->tail, dma->tx_size, DMA_MEM_TO_DEV, @@ -114,6 +116,8 @@ int serial8250_rx_dma(struct uart_8250_port *p) if (dma->rx_running) return 0; + serial8250_do_prepare_rx_dma(p); + desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, dma->rx_size, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); From patchwork Thu Mar 17 17:46:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784392 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D19E8C4332F for ; Thu, 17 Mar 2022 17:46:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237074AbiCQRsL (ORCPT ); Thu, 17 Mar 2022 13:48:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237127AbiCQRsC (ORCPT ); Thu, 17 Mar 2022 13:48:02 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C0DF1F161C; Thu, 17 Mar 2022 10:46:45 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 4470DFF80D; Thu, 17 Mar 2022 17:46:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539203; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QkFsoUM1G2A8N1gYSgo0lG2lRmJrwCRFb9Kysg5VQRQ=; b=VrB31/v35ewU1uLBtkME+ZhzbM/hGRMdq0f4EjBGYTxR7gqk6yH9tW17U9fuutD8IYTGOn Zg5Ekv0ZVCVFemWOVBQSSL25rWoXkh4dDCf9TZasn3l8S5Yw+sB7GgrOQJbb5wdOt18cCM +IWP/RFN1Nhtu3zPw4UO9PB1nONdXVM7bxaMeKAVJKdQQe7WlhSOPQTNJHHUsgfZnjqWBX agVlFNDT10oDUH8Pxvr2Hf3kL/Tjb+DCh/Z7Zij8dtT2pX/qGLI4umvbbUsWMzzTLePrz1 QaAOCwQJehgGrroy8Ohy/Bx0xT94nMl7PFJdv1EgX+HI6qknUE1/ogWZ/SGmVg== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 07/10] serial: 8250: dw: Introduce an rx_timeout variable in the IRQ path Date: Thu, 17 Mar 2022 18:46:24 +0100 Message-Id: <20220317174627.360815-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org In a next change we are going to need the same Rx timeout condition as we already have in the IRQ handling code. Let's just create a boolean to clarify what this operation does before reusing it. There is no functional change. Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 2f4a818f787c..c27f32f67680 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -228,6 +228,7 @@ static int dw8250_handle_irq(struct uart_port *p) struct uart_8250_port *up = up_to_u8250p(p); struct dw8250_data *d = to_dw8250_data(p->private_data); unsigned int iir = p->serial_in(p, UART_IIR); + bool rx_timeout = (iir & 0x3f) == UART_IIR_RX_TIMEOUT; unsigned int status; unsigned long flags; @@ -241,7 +242,7 @@ static int dw8250_handle_irq(struct uart_port *p) * This problem has only been observed so far when not in DMA mode * so we limit the workaround only to non-DMA mode. */ - if (!up->dma && ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)) { + if (!up->dma && rx_timeout) { spin_lock_irqsave(&p->lock, flags); status = p->serial_in(p, UART_LSR); From patchwork Thu Mar 17 17:46:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784393 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A85A9C433F5 for ; Thu, 17 Mar 2022 17:46:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237080AbiCQRsM (ORCPT ); Thu, 17 Mar 2022 13:48:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237142AbiCQRsE (ORCPT ); Thu, 17 Mar 2022 13:48:04 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC2E71F1D3C; Thu, 17 Mar 2022 10:46:46 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E1E4AFF805; Thu, 17 Mar 2022 17:46:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539205; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lSHph0VTBom+559Fi7bRZ9k06sbXDhuXFhEKUBs8oOM=; b=im7Ha6agx2Gi49dEXWsVbRyvy0tfgsv/e4dpdt2Hz88+x9Wtn4I5thKMYeq+nw/9HBGP8B l1M9idEfJa7EQat40sCAZFp88sp5CHBdWqNSu1lPwGMR97Vt20SEh1PD2kXavvsdS+o3Wm wMDvQME+1FK9NfdDNp+uoB6mlE7rhhDic4sqaL+NeOhnsn8W+jp2ugO1097oIj7UsnEeHM V11Hmpsn4573gI4e7OlnnAzhyfJApcC9IdssZko3sPk0Xb3yR7A0Tj0zP9Ftfe0DY4Dwhu 36pLyajzYKFOOfVzjs6tInnX5+qLNM158fZyp2PunMW4JfVipMVESKQ6rlp+LQ== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 08/10] serial: 8250: dw: Add support for DMA flow controlling devices Date: Thu, 17 Mar 2022 18:46:25 +0100 Message-Id: <20220317174627.360815-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy DW based controllers like the one on Renesas RZ/N1 must be programmed as flow controllers when using DMA. * Table 11.45 of the system manual, "Flow Control Combinations", states that using UART with DMA requires setting the DMA in the peripheral flow controller mode regardless of the direction. * Chapter 11.6.1.3 of the system manual, "Basic Interface Definitions", explains that the burst size in the above case must be configured in the peripheral's register DEST/SRC_BURST_SIZE. Experiments shown that upon Rx timeout, the DMA transaction needed to be manually cleared as well. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 62 +++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index c27f32f67680..edb3f347be8e 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -34,14 +34,23 @@ /* Offsets for the DesignWare specific registers */ #define DW_UART_USR 0x1f /* UART Status Register */ +#define DW_UART_DMASA 0xa8 /* DMA Software Ack */ +#define DW_UART_TDMACR 0x10c /* DMA Control Register Transmit Mode */ +#define DW_UART_RDMACR 0x110 /* DMA Control Register Receive Mode */ /* DesignWare specific register fields */ #define DW_UART_MCR_SIRE BIT(6) +#define DW_UART_xDMACR_DMA_EN BIT(0) +#define DW_UART_xDMACR_1_WORD_BURST (0 << 1) +#define DW_UART_xDMACR_4_WORD_BURST (1 << 1) +#define DW_UART_xDMACR_8_WORD_BURST (3 << 1) +#define DW_UART_xDMACR_BLK_SZ(x) ((x) << 3) /* Quirks */ #define DW_UART_QUIRK_OCTEON BIT(0) #define DW_UART_QUIRK_ARMADA_38X BIT(1) #define DW_UART_QUIRK_SKIP_SET_RATE BIT(2) +#define DW_UART_QUIRK_IS_DMA_FLOW_CONTROLLER BIT(3) static inline struct dw8250_data *to_dw8250_data(struct dw8250_port_data *data) { @@ -225,6 +234,7 @@ static unsigned int dw8250_serial_in32be(struct uart_port *p, int offset) static int dw8250_handle_irq(struct uart_port *p) { + const struct dw8250_platform_data *pdata = device_get_match_data(p->dev); struct uart_8250_port *up = up_to_u8250p(p); struct dw8250_data *d = to_dw8250_data(p->private_data); unsigned int iir = p->serial_in(p, UART_IIR); @@ -252,6 +262,16 @@ static int dw8250_handle_irq(struct uart_port *p) spin_unlock_irqrestore(&p->lock, flags); } + /* Manually stop the Rx DMA transfer when acting as flow controller */ + if (up->dma && up->dma->rx_running && rx_timeout && pdata && + pdata->quirks & DW_UART_QUIRK_IS_DMA_FLOW_CONTROLLER) { + status = p->serial_in(p, UART_LSR); + if (status & (UART_LSR_DR | UART_LSR_BI)) { + writel(0, p->membase + DW_UART_RDMACR); + writel(1, p->membase + DW_UART_DMASA); + } + } + if (serial8250_handle_irq(p, iir)) return 1; @@ -375,6 +395,42 @@ static bool dw8250_idma_filter(struct dma_chan *chan, void *param) return param == chan->device->dev; } +static u32 dw8250_rzn1_get_dmacr_burst(int max_burst) +{ + if (max_burst >= 8) + return DW_UART_xDMACR_8_WORD_BURST; + else if (max_burst >= 4) + return DW_UART_xDMACR_4_WORD_BURST; + else + return DW_UART_xDMACR_1_WORD_BURST; +} + +static void dw8250_prepare_tx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + writel(0, up->membase + DW_UART_TDMACR); + val = dw8250_rzn1_get_dmacr_burst(dma->txconf.dst_maxburst) | + DW_UART_xDMACR_BLK_SZ(dma->tx_size) | + DW_UART_xDMACR_DMA_EN; + writel(val, up->membase + DW_UART_TDMACR); +} + +static void dw8250_prepare_rx_dma(struct uart_8250_port *p) +{ + struct uart_port *up = &p->port; + struct uart_8250_dma *dma = p->dma; + u32 val; + + writel(0, up->membase + DW_UART_RDMACR); + val = dw8250_rzn1_get_dmacr_burst(dma->rxconf.src_maxburst) | + DW_UART_xDMACR_BLK_SZ(dma->rx_size) | + DW_UART_xDMACR_DMA_EN; + writel(val, up->membase + DW_UART_RDMACR); +} + static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) { struct device_node *np = p->dev->of_node; @@ -409,6 +465,12 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data) p->serial_out = dw8250_serial_out38x; if (quirks & DW_UART_QUIRK_SKIP_SET_RATE) p->set_termios = dw8250_do_set_termios; + if (quirks & DW_UART_QUIRK_IS_DMA_FLOW_CONTROLLER) { + data->data.dma.txconf.device_fc = 1; + data->data.dma.rxconf.device_fc = 1; + data->data.dma.prepare_tx_dma = dw8250_prepare_tx_dma; + data->data.dma.prepare_rx_dma = dw8250_prepare_rx_dma; + } } else if (acpi_dev_present("APMC0D08", NULL, -1)) { p->iotype = UPIO_MEM32; From patchwork Thu Mar 17 17:46:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784395 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A8B0C3527D for ; Thu, 17 Mar 2022 17:46:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237083AbiCQRsN (ORCPT ); Thu, 17 Mar 2022 13:48:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237154AbiCQRsF (ORCPT ); Thu, 17 Mar 2022 13:48:05 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 650541F2DFF; Thu, 17 Mar 2022 10:46:48 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 88214FF803; Thu, 17 Mar 2022 17:46:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539207; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Qgpw4atx94cJSZySLKvheDqmzOrZHQhOeNUtmGPnW18=; b=OVh4WYe0BpTGyjipaG875ejoCbhLwz411VDC61mBCx8UfJoX+2M2L0UTFsreR/BDTWWsj4 hGQ//AWFT14CgwueDqUJMDVkAH1qpmfrwBx+1Fi9MOGYO50yCLdn4OTG2s4ntqhqTp0vzR +vVU5wtWhDbnyyV3W9Ka4JHQMFxfZ/hs3nJp1aN4/gRNgBhBFJz3lh5fgT3RXBu2qG3H2Q 4QlpCEO1WOBrIoXW3e2x/HlziwMxa68/JWhHW5EtyoaAlwGUFjBSIiSQVwDAKgK14WgOJz qlAZV7c4SniLtEejXlQVAJ/XiFjhDcva35WCgYC9hZmhN/shlfCu/2LMWbCMOw== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 09/10] serial: 8250: dw: Improve RZN1 support Date: Thu, 17 Mar 2022 18:46:26 +0100 Message-Id: <20220317174627.360815-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Phil Edworthy Renesas RZ/N1 SoC features a slightly modified DW UART. On this SoC, the CPR register value is known but not synthetized in hardware. We hence need to provide a CPR value in the platform data. This version of the controller also relies on acting as flow controller when using DMA, so we need to provide the 'IS_DMA_FLOW_CONTROLLER' quirk. Signed-off-by: Phil Edworthy Co-developed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- drivers/tty/serial/8250/8250_dw.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index edb3f347be8e..9b393770d40e 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -756,6 +756,11 @@ static const struct dw8250_platform_data dw8250_armada_38x_data = { .quirks = DW_UART_QUIRK_ARMADA_38X, }; +static const struct dw8250_platform_data dw8250_renesas_rzn1_data = { + .quirks = DW_UART_QUIRK_IS_DMA_FLOW_CONTROLLER, + .cpr = 0x00012f32, +}; + static const struct dw8250_platform_data dw8250_starfive_jh7100_data = { .quirks = DW_UART_QUIRK_SKIP_SET_RATE, }; @@ -764,7 +769,7 @@ static const struct of_device_id dw8250_of_match[] = { { .compatible = "snps,dw-apb-uart" }, { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data }, { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data }, - { .compatible = "renesas,rzn1-uart" }, + { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data }, { .compatible = "starfive,jh7100-hsuart", .data = &dw8250_starfive_jh7100_data }, { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data }, { /* Sentinel */ } From patchwork Thu Mar 17 17:46:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12784396 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6EACC4167D for ; Thu, 17 Mar 2022 17:46:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237086AbiCQRsN (ORCPT ); Thu, 17 Mar 2022 13:48:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237060AbiCQRsH (ORCPT ); Thu, 17 Mar 2022 13:48:07 -0400 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 211541F42CC; Thu, 17 Mar 2022 10:46:49 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 39A6EFF808; Thu, 17 Mar 2022 17:46:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1647539208; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VjUPIaxQ1WBMLteeByIABCjhVWOu3Y3N20N5eUaJ/3w=; b=Zvp4syqQwPORdpfAeNysGP67cu0Y03N7jdlfU5kOai8bWRok0QdXhdUIZqMLbH57Ytjelr 8VG+yXaG95u2hHLJWFZ5hCPJiBnD4TRQP/XvhFBNpCgCNBvdgMDSO0Ln+oymwE/4PstrGw 5rtxQHslntIXNGuN+KqNABnfBJUArxgNmb2Ny4F8Q7gzPoA1A8nBx8GwHZy3L+toDerDd7 NanKy7dsl/5/uxEOmfyL9bfLa7GlrRh0903jPZaCZNOUxLkizoHMEpanI/pX1Y+oeit/S3 jfmTs4f++tTzfT9qCVpUJmWWIfg2aLOpUEXnFmyvkxyUvclInLJ0FvbTcCFrjg== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven Cc: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , linux-serial@vger.kernel.org, Miquel Raynal Subject: [PATCH v2 10/10] ARM: dts: r9a06g032: Fill the UART DMA properties Date: Thu, 17 Mar 2022 18:46:27 +0100 Message-Id: <20220317174627.360815-11-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220317174627.360815-1-miquel.raynal@bootlin.com> References: <20220317174627.360815-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org UART 0 to 2 do not have DMA support, while UART 3 to 7 do. Fill the "dmas" and "dma-names" properties for each of these nodes. Please mind that these nodes go through the dmamux node which will redirect the requests to the right DMA controller. The first 4 cells of the "dmas" properties will be transferred as-is to the DMA controllers. The last 2 cells are consumed by the dmamux. Which means cell 0 and 4 are almost redundant, one giving the controller request ID and the other the dmamux channel which is a 1:1 translation of the request IDs, shifted by 16 when pointing to the second DMA controller. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 804f2d6f416f..aa447e2622e0 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -128,6 +128,9 @@ uart3: serial@50000000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 0 0 0 0 0 1>, + <&dmamux 1 0 0 0 1 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -139,6 +142,9 @@ uart4: serial@50001000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 2 0 0 0 2 1>, + <&dmamux 3 0 0 0 3 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -150,6 +156,9 @@ uart5: serial@50002000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 4 1>, + <&dmamux 5 0 0 0 5 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -161,6 +170,9 @@ uart6: serial@50003000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 6 0 0 0 6 1>, + <&dmamux 7 0 0 0 7 1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -172,6 +184,9 @@ uart7: serial@50004000 { reg-io-width = <4>; clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmamux 4 0 0 0 20 1>, + <&dmamux 5 0 0 0 21 1>; + dma-names = "rx", "tx"; status = "disabled"; };