From patchwork Thu Mar 17 22:25:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alvin_=C5=A0ipraga?= X-Patchwork-Id: 12784630 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C8D41C433F5 for ; Thu, 17 Mar 2022 22:27:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=f3TbAep9x8CMAdXAac4KOydE7hwS+VZjov+HLkPoSx4=; b=btP2+/SNduHpIL r6bwTCngLTDncltz+3D8sHm1iM8umEQpf0puKpy3SUhpgaIVwaps3NH89vhC34Dy8hcfGGUxLRfUI Ekes9VY2wyHswDm6ZkdkjvpA4moLXfx8Lnn7mG1rQPl2DxypN1oO8ck41EBTW2YV3HpDtHzRP4s5x fOfgq4blxpGFTsBSjDXNYhCZwAtJf46+M9Thgpc3bYcM9K41dJQxAssESVG0Ruaomwe0R5fkPH52k rHCVoBEcoi357grt1xQW75tWdO+K14eQcHgTJAxJbyMra2FZhXmk5XlNMGRHgfwi/GBWFep1a1Pjb /NcWGVJxk5Z3wJowewFA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUyYn-00HW73-1K; Thu, 17 Mar 2022 22:25:33 +0000 Received: from mail-ej1-x62a.google.com ([2a00:1450:4864:20::62a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUyYi-00HW66-HL for linux-arm-kernel@lists.infradead.org; Thu, 17 Mar 2022 22:25:31 +0000 Received: by mail-ej1-x62a.google.com with SMTP id p15so13615883ejc.7 for ; Thu, 17 Mar 2022 15:25:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqrs.dk; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=he5SYi2i8fnJsV9XJ7BjYt6CsD8atydpjeDiU4Eqw2I=; b=CXw3IFQ1Fhhf/LJrTcBsPUQ7ryNjlpwia1KfOQuYTYdh/igOYUtvcWxOuRnd07Y2m6 zln98DPcLhv3iy/H0+c6zhaEbOQXsuc4k7i5LcZWki1+QokVmpe0NBW+CGqHAFy8IUlF B0V+f/RXCC7M4h4IIsieOnQ3FPOOzUnMW/xjY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=he5SYi2i8fnJsV9XJ7BjYt6CsD8atydpjeDiU4Eqw2I=; b=c4MYqnfwVSfw7LgGSRyCLAZKR3pqae+2utHIddiMP+OAoTZ2QC8iLekDDRl1bs+GO1 5Id2aW8jwzHFTz1F1RF6BhQnFMAGhHttTff7ah+HWWtMNll9KesHjvU5+e31xuVRNPFo +6J5no2lHG5pPb21cZjDpE/htp4eMWNAydchvYnEJYUlSuQHDkqMPFDztxEDXJdFYVmV XSaUEVJ7Zak+EtunHrygoc3Y1vi+4Vm0E5pod4ggqCKF6lZJkD8C2GPqTJLQXD6jmtgH tgz9+kyJEfKy9Se2LPs/EXriIsAMGqYQ3eJ7L6aqczNwu7nnz9/WM5Z2ToOi3+vRCGpO CFYw== X-Gm-Message-State: AOAM531tHn2p6C+J01oMlPIj4hGQs85A6TfQZGLe6eJFbdccCZbwMDkG jmHXASLgSIQQdVTfRsUH0n7iDQ== X-Google-Smtp-Source: ABdhPJxgX/wXd+34bhzCk9cw+jFEVE6cMoRGT/ICO7kBqqHpet4BknKxAsc0UhhsSs69Alq7gUbZnw== X-Received: by 2002:a17:906:c18c:b0:6d5:8518:e567 with SMTP id g12-20020a170906c18c00b006d58518e567mr6319063ejz.37.1647555926042; Thu, 17 Mar 2022 15:25:26 -0700 (PDT) Received: from capella.. (80.71.142.18.ipv4.parknet.dk. [80.71.142.18]) by smtp.gmail.com with ESMTPSA id m24-20020a170906161800b006d420027b63sm2949654ejd.18.2022.03.17.15.25.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Mar 2022 15:25:25 -0700 (PDT) From: =?utf-8?q?Alvin_=C5=A0ipraga?= To: Abel Vesa , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Rob Herring Cc: =?utf-8?q?Alvin_=C5=A0ipraga?= , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: imx: add clock bindings for i.MX8MN GPT Date: Thu, 17 Mar 2022 23:25:20 +0100 Message-Id: <20220317222521.170762-1-alvin@pqrs.dk> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220317_152529_043113_5101DCD3 X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Alvin Šipraga The i.MX8MN has a General Purpose Timer (GPT) just like the i.MX8MM, which already has such bindings. Add the relevant bindings for the Nano SoC too. Signed-off-by: Alvin Šipraga Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/imx8mn-clock.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h index 01e8bab1d767..07b8a282c268 100644 --- a/include/dt-bindings/clock/imx8mn-clock.h +++ b/include/dt-bindings/clock/imx8mn-clock.h @@ -243,6 +243,20 @@ #define IMX8MN_CLK_M7_CORE 221 -#define IMX8MN_CLK_END 222 +#define IMX8MN_CLK_GPT_3M 222 +#define IMX8MN_CLK_GPT1 223 +#define IMX8MN_CLK_GPT1_ROOT 224 +#define IMX8MN_CLK_GPT2 225 +#define IMX8MN_CLK_GPT2_ROOT 226 +#define IMX8MN_CLK_GPT3 227 +#define IMX8MN_CLK_GPT3_ROOT 228 +#define IMX8MN_CLK_GPT4 229 +#define IMX8MN_CLK_GPT4_ROOT 230 +#define IMX8MN_CLK_GPT5 231 +#define IMX8MN_CLK_GPT5_ROOT 232 +#define IMX8MN_CLK_GPT6 233 +#define IMX8MN_CLK_GPT6_ROOT 234 + +#define IMX8MN_CLK_END 235 #endif From patchwork Thu Mar 17 22:25:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alvin_=C5=A0ipraga?= X-Patchwork-Id: 12784629 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD317C433EF for ; Thu, 17 Mar 2022 22:26:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7zOZMTDYdNINlNjU37g4vYcqhlBbUFkgjEgiczHsByU=; b=B7lrLlfJexeFXi u/JPOLWwKFTJ3EYoZfvsRUbo2e9GeaY0Ev5nTH59inA+6yLMglK6u0ngUJ2imWt9MSkDd9JT9zy2v 5RS2bHAZVi+ALBU9Xo7qUc8e8vcefPlDf5ZGIVcfgoSIL9XK3ed82w5QKfhzXhuMSHvffvsFCweRu S/UXBKHvwJoB+ctPo4BJ+/v5cTJKzBa7UBE9EGSXfvdEDuZ8W6WUO+5n+YDVf4KO9Je24slyPBbgy Vw05GQJDJWTqDNZCSEg/r+PI+qpYurhZIdy61y/a8UrMQQnYNOaUJM6ll+yRZRyOTIH2j1s+0O1zX dooArR9MZ3B2h9rJcJ7g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUyYw-00HW9B-7I; Thu, 17 Mar 2022 22:25:42 +0000 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUyYj-00HW6L-7w for linux-arm-kernel@lists.infradead.org; Thu, 17 Mar 2022 22:25:31 +0000 Received: by mail-ej1-x630.google.com with SMTP id a8so13616772ejc.8 for ; Thu, 17 Mar 2022 15:25:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqrs.dk; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nZfilmYHEofOtZGObUor2LVeuuotlJwuDmGStM/5HWM=; b=LBQun4ZLprJhQy4lcg0rlMkxjD8+w89BISbRA+6e0n3Ak3QuX8r6xRyTrgXzs0KtMB okDzOO/8IitcG9YyjrMAheUDkE2T4AujZBiSmk0rdhiy5FBOQgZMgwOktfR2ujZPwD0H zdK3ZGIjCuNJ9lvC7vq2eMia1HZit0wfwquyc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nZfilmYHEofOtZGObUor2LVeuuotlJwuDmGStM/5HWM=; b=nsVLP5yLbbKdU6KWuMGj/394Hl2c/YSzjq8BOQrrOpkJsGu1QV3P1nvnSF5V5TPjup 2WCYwmn7Tf8eVmoduK6QT4CNrfz3s41L3xoaNUJXEf91uG7Spp6M4l11Agg42w2prImP tV51xK3LI6EVZs/WY5G6APzqv9TrqpBZQR7hxbvhNmR2XP/JpxXKr4Uo3uGonPTOg4sQ 21k01U+zWIRsRYijGfq7vPUlLLEgyHd+yHhWrvb2x0KO/A73kpFN1hLnvaNRkCqL146t oD9DRcTNmey0jUdpYkh1oKn5eGfc0wff7JA+PityB+J/yzocnaKO9z7RFfDNdwmThCIH FcbA== X-Gm-Message-State: AOAM531T7Ji51vgjYAMfT3zYTDGTQSi92Mr1/C2U4xvIr6oERAx5TykQ ykuasqZJ4jjsCJOFkPWCxpg2Zw== X-Google-Smtp-Source: ABdhPJx9aL6eUBg4QeYDzR9Is7l5WFiUmAXRHp8oQLBL72F7SPxk1C+Qifc3fVbeWStLorfagn5wxA== X-Received: by 2002:a17:906:a213:b0:6b5:b0f9:7567 with SMTP id r19-20020a170906a21300b006b5b0f97567mr6600807ejy.129.1647555927534; Thu, 17 Mar 2022 15:25:27 -0700 (PDT) Received: from capella.. (80.71.142.18.ipv4.parknet.dk. [80.71.142.18]) by smtp.gmail.com with ESMTPSA id m24-20020a170906161800b006d420027b63sm2949654ejd.18.2022.03.17.15.25.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Mar 2022 15:25:27 -0700 (PDT) From: =?utf-8?q?Alvin_=C5=A0ipraga?= To: Abel Vesa , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Rob Herring Cc: =?utf-8?q?Alvin_=C5=A0ipraga?= , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/2] clk: imx8mn: add GPT support Date: Thu, 17 Mar 2022 23:25:21 +0100 Message-Id: <20220317222521.170762-2-alvin@pqrs.dk> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220317222521.170762-1-alvin@pqrs.dk> References: <20220317222521.170762-1-alvin@pqrs.dk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220317_152529_310503_72F89D02 X-CRM114-Status: GOOD ( 11.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Alvin Šipraga Add support for the General Purpose Timer (GPT) clocks on the i.MX8MN. The i.MX8MN GPT IP block is the same as on the i.MX8MM, on which this patch is based. Signed-off-by: Alvin Šipraga --- drivers/clk/imx/clk-imx8mn.c | 38 ++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 92fcbab4f5be..aa7c6e02733d 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -227,6 +227,30 @@ static const char * const imx8mn_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys "sys_pll1_40m", "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; +static const char *const imx8mn_gpt1_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char *const imx8mn_gpt2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char *const imx8mn_gpt3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char *const imx8mn_gpt4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char *const imx8mn_gpt5_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + +static const char *const imx8mn_gpt6_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_400m", + "sys_pll1_40m", "video_pll1_out", "sys_pll1_80m", + "audio_pll1_out", "clk_ext1", }; + static const char * const imx8mn_wdog_sels[] = {"osc_24m", "sys_pll1_133m", "sys_pll1_160m", "vpu_pll_out", "sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", }; @@ -476,6 +500,12 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) hws[IMX8MN_CLK_PWM2] = imx8m_clk_hw_composite("pwm2", imx8mn_pwm2_sels, base + 0xb400); hws[IMX8MN_CLK_PWM3] = imx8m_clk_hw_composite("pwm3", imx8mn_pwm3_sels, base + 0xb480); hws[IMX8MN_CLK_PWM4] = imx8m_clk_hw_composite("pwm4", imx8mn_pwm4_sels, base + 0xb500); + hws[IMX8MN_CLK_GPT1] = imx8m_clk_hw_composite("gpt1", imx8mn_gpt1_sels, base + 0xb580); + hws[IMX8MN_CLK_GPT2] = imx8m_clk_hw_composite("gpt2", imx8mn_gpt2_sels, base + 0xb600); + hws[IMX8MN_CLK_GPT3] = imx8m_clk_hw_composite("gpt3", imx8mn_gpt3_sels, base + 0xb680); + hws[IMX8MN_CLK_GPT4] = imx8m_clk_hw_composite("gpt4", imx8mn_gpt4_sels, base + 0xb700); + hws[IMX8MN_CLK_GPT5] = imx8m_clk_hw_composite("gpt5", imx8mn_gpt5_sels, base + 0xb780); + hws[IMX8MN_CLK_GPT6] = imx8m_clk_hw_composite("gpt6", imx8mn_gpt6_sels, base + 0xb800); hws[IMX8MN_CLK_WDOG] = imx8m_clk_hw_composite("wdog", imx8mn_wdog_sels, base + 0xb900); hws[IMX8MN_CLK_WRCLK] = imx8m_clk_hw_composite("wrclk", imx8mn_wrclk_sels, base + 0xb980); hws[IMX8MN_CLK_CLKO1] = imx8m_clk_hw_composite("clko1", imx8mn_clko1_sels, base + 0xba00); @@ -501,6 +531,12 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) hws[IMX8MN_CLK_GPIO3_ROOT] = imx_clk_hw_gate4("gpio3_root_clk", "ipg_root", base + 0x40d0, 0); hws[IMX8MN_CLK_GPIO4_ROOT] = imx_clk_hw_gate4("gpio4_root_clk", "ipg_root", base + 0x40e0, 0); hws[IMX8MN_CLK_GPIO5_ROOT] = imx_clk_hw_gate4("gpio5_root_clk", "ipg_root", base + 0x40f0, 0); + hws[IMX8MN_CLK_GPT1_ROOT] = imx_clk_hw_gate4("gpt1_root_clk", "gpt1", base + 0x4100, 0); + hws[IMX8MN_CLK_GPT2_ROOT] = imx_clk_hw_gate4("gpt2_root_clk", "gpt2", base + 0x4110, 0); + hws[IMX8MN_CLK_GPT3_ROOT] = imx_clk_hw_gate4("gpt3_root_clk", "gpt3", base + 0x4120, 0); + hws[IMX8MN_CLK_GPT4_ROOT] = imx_clk_hw_gate4("gpt4_root_clk", "gpt4", base + 0x4130, 0); + hws[IMX8MN_CLK_GPT5_ROOT] = imx_clk_hw_gate4("gpt5_root_clk", "gpt5", base + 0x4140, 0); + hws[IMX8MN_CLK_GPT6_ROOT] = imx_clk_hw_gate4("gpt6_root_clk", "gpt6", base + 0x4150, 0); hws[IMX8MN_CLK_I2C1_ROOT] = imx_clk_hw_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0); hws[IMX8MN_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0); hws[IMX8MN_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0); @@ -549,6 +585,8 @@ static int imx8mn_clocks_probe(struct platform_device *pdev) hws[IMX8MN_CLK_SDMA3_ROOT] = imx_clk_hw_gate4("sdma3_clk", "ipg_audio_root", base + 0x45f0, 0); hws[IMX8MN_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root_clk", "sai7", base + 0x4650, 0, &share_count_sai7); + hws[IMX8MN_CLK_GPT_3M] = imx_clk_hw_fixed_factor("gpt_3m", "osc_24m", 1, 8); + hws[IMX8MN_CLK_DRAM_ALT_ROOT] = imx_clk_hw_fixed_factor("dram_alt_root", "dram_alt", 1, 4); hws[IMX8MN_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",