From patchwork Sat Mar 19 19:42:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Cheng X-Patchwork-Id: 12786320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22213C433F5 for ; Sat, 19 Mar 2022 19:42:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4788B10EE52; Sat, 19 Mar 2022 19:42:36 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9C7CC10E2E8; Sat, 19 Mar 2022 19:42:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647718952; x=1679254952; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rjwSuIUn6Jnmfr9jQ6pdOkmU1EWUv0epqhaVTmiX/lA=; b=IePVNZuL4k7ShheoKBGeKBaJZuYkRj9leTOJ+IHZw0ZcmJRne6eBZxRD jzkfzLzSsiH/3v/qVEI7eSeEgnEvba18BHkAnZ1gw5iGiKGr3ZmxeNI21 CU9FMZt12Vn6y0JkkzaN0EJHsusErSYd3I8CfLfmLqshkc3NrrZmxlOgu ZrZ+M65I50o5MEC7/+hOogRayoCXYGzSe8iEU1y9wEpOd8w380rrv3uKj 79v8KtnWX4sg9TBzOPlj2F3oIyGzYJqfKLxXE3Y+RThlgoFqv9MJAu54L 7Vh4K7A9OrCYIaEWQJUIpB0wXdcbD6CwSZITk2BQFiRneG+q2t2RULEL+ g==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="282145182" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="282145182" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:32 -0700 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="600019676" Received: from jpulito-mobl2.amr.corp.intel.com (HELO mvcheng-desk2.intel.com) ([10.255.231.61]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:31 -0700 From: Michael Cheng To: intel-gfx@lists.freedesktop.org Date: Sat, 19 Mar 2022 12:42:24 -0700 Message-Id: <20220319194227.297639-2-michael.cheng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220319194227.297639-1-michael.cheng@intel.com> References: <20220319194227.297639-1-michael.cheng@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/4] i915/gem: drop wbinvd_on_all_cpus usage X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.hellstrom@linux.intel.com, michael.cheng@intel.com, daniel.vetter@ffwll.ch, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Previous concern with using drm_clflush_sg was that we don't know what the sg_table is pointing to, thus the usage of wbinvd_on_all_cpus to flush everything at once to avoid paranoia. To make i915 more architecture-neutral and be less paranoid, lets attempt to use drm_clflush_sg to flush the pages for when the GPU wants to read from main memory. Signed-off-by: Michael Cheng --- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c index f5062d0c6333..b0a5baaebc43 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -250,16 +251,10 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj) * DG1 is special here since it still snoops transactions even with * CACHE_NONE. This is not the case with other HAS_SNOOP platforms. We * might need to revisit this as we add new discrete platforms. - * - * XXX: Consider doing a vmap flush or something, where possible. - * Currently we just do a heavy handed wbinvd_on_all_cpus() here since - * the underlying sg_table might not even point to struct pages, so we - * can't just call drm_clflush_sg or similar, like we do elsewhere in - * the driver. */ if (i915_gem_object_can_bypass_llc(obj) || (!HAS_LLC(i915) && !IS_DG1(i915))) - wbinvd_on_all_cpus(); + drm_clflush_sg(pages); sg_page_sizes = i915_sg_dma_sizes(pages->sgl); __i915_gem_object_set_pages(obj, pages, sg_page_sizes); From patchwork Sat Mar 19 19:42:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Cheng X-Patchwork-Id: 12786318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66AF2C433F5 for ; Sat, 19 Mar 2022 19:42:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 456ED10EB71; Sat, 19 Mar 2022 19:42:35 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 496A510E2E8; Sat, 19 Mar 2022 19:42:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647718953; x=1679254953; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jU/aK/95X6rTDSeuxET9HUOTTCA6mU3z0tsc81rE3Yg=; b=kfh3Mh0ZLcx1xXVLeKlmuyU0CFZzm6eSDi8edSvo+ldBKDlNpXLlcZGc JcQF+omLNZq4biOBeCJ7PhPSTf2g7MGBMqQ9dfiCxauQsGAQT1I+iNPBy ozdjDW8lRKm7IprSLhd9aDETcB0wBJWcgGeHFbVaSSGwzgggYqRMbpufz L5sB1MlLjfUjac0WNC66zFZvNSqkLJoW0um58vyVdr9/9Ebkf4RQK6ElE QqRFe1ahNBX8BQ0wVwFKU4pv/8HJex9u40rjjKGTBkkHsq6H1jRjCusNN ekxiCjeebXyu6ygoqVDJL72UKdD/ZGb1DfDDNIsediXKTC4tKN4DnfSHV A==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="282145184" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="282145184" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:33 -0700 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="600019683" Received: from jpulito-mobl2.amr.corp.intel.com (HELO mvcheng-desk2.intel.com) ([10.255.231.61]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:32 -0700 From: Michael Cheng To: intel-gfx@lists.freedesktop.org Date: Sat, 19 Mar 2022 12:42:25 -0700 Message-Id: <20220319194227.297639-3-michael.cheng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220319194227.297639-1-michael.cheng@intel.com> References: <20220319194227.297639-1-michael.cheng@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/4] Revert "drm/i915/gem: Almagamate clflushes on suspend" X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.hellstrom@linux.intel.com, michael.cheng@intel.com, daniel.vetter@ffwll.ch, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As we are making i915 more architecture-neutral, lets revert this commit to the previous logic [1] to avoid using wbinvd_on_all_cpus. [1]. ac05a22cd07a ("drm/i915/gem: Almagamate clflushes on suspend") Suggested-by: Lucas De Marchi Signed-off-by: Michael Cheng --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 41 +++++++++++++++++--------- 1 file changed, 27 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index 00359ec9d58b..3f20961bb59b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -13,13 +13,6 @@ #include "i915_driver.h" #include "i915_drv.h" -#if defined(CONFIG_X86) -#include -#else -#define wbinvd_on_all_cpus() \ - pr_warn(DRIVER_NAME ": Missing cache flush in %s\n", __func__) -#endif - void i915_gem_suspend(struct drm_i915_private *i915) { GEM_TRACE("%s\n", dev_name(i915->drm.dev)); @@ -123,6 +116,13 @@ int i915_gem_backup_suspend(struct drm_i915_private *i915) return ret; } +static struct drm_i915_gem_object *first_mm_object(struct list_head *list) +{ + return list_first_entry_or_null(list, + struct drm_i915_gem_object, + mm.link); +} + void i915_gem_suspend_late(struct drm_i915_private *i915) { struct drm_i915_gem_object *obj; @@ -132,7 +132,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) NULL }, **phase; unsigned long flags; - bool flush = false; /* * Neither the BIOS, ourselves or any other kernel @@ -158,15 +157,29 @@ void i915_gem_suspend_late(struct drm_i915_private *i915) spin_lock_irqsave(&i915->mm.obj_lock, flags); for (phase = phases; *phase; phase++) { - list_for_each_entry(obj, *phase, mm.link) { - if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)) - flush |= (obj->read_domains & I915_GEM_DOMAIN_CPU) == 0; - __start_cpu_write(obj); /* presume auto-hibernate */ + LIST_HEAD(keep); + + while ((obj = first_mm_object(*phase))) { + list_move_tail(&obj->mm.link, &keep); + + /* Beware the background _i915_gem_free_objects */ + if (!kref_get_unless_zero(&obj->base.refcount)) + continue; + + spin_unlock_irqrestore(&i915->mm.obj_lock, flags); + + i915_gem_object_lock(obj, NULL); + drm_WARN_ON(&i915->drm, + i915_gem_object_set_to_gtt_domain(obj, false)); + i915_gem_object_unlock(obj); + i915_gem_object_put(obj); + + spin_lock_irqsave(&i915->mm.obj_lock, flags); } + + list_splice_tail(&keep, *phase); } spin_unlock_irqrestore(&i915->mm.obj_lock, flags); - if (flush) - wbinvd_on_all_cpus(); } int i915_gem_freeze(struct drm_i915_private *i915) From patchwork Sat Mar 19 19:42:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Cheng X-Patchwork-Id: 12786319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 809ECC433F5 for ; Sat, 19 Mar 2022 19:42:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E389210EE43; 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19 Mar 2022 12:42:33 -0700 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="600019687" Received: from jpulito-mobl2.amr.corp.intel.com (HELO mvcheng-desk2.intel.com) ([10.255.231.61]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:33 -0700 From: Michael Cheng To: intel-gfx@lists.freedesktop.org Date: Sat, 19 Mar 2022 12:42:26 -0700 Message-Id: <20220319194227.297639-4-michael.cheng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220319194227.297639-1-michael.cheng@intel.com> References: <20220319194227.297639-1-michael.cheng@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] i915/gem: Revert i915_gem_freeze to previous logic X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.hellstrom@linux.intel.com, michael.cheng@intel.com, daniel.vetter@ffwll.ch, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This patch reverts i915_gem_freeze to previous logic [1] to avoid using wbinvd_on_all_cpus. [1]. https://patchwork.freedesktop.org/patch/415007/?series=86058&rev=2 Suggested-by: Lucas De Marchi Signed-off-by: Michael Cheng --- drivers/gpu/drm/i915/gem/i915_gem_pm.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c index 3f20961bb59b..f78f2f004d6c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c @@ -212,13 +212,18 @@ int i915_gem_freeze_late(struct drm_i915_private *i915) * the objects as well, see i915_gem_freeze() */ - with_intel_runtime_pm(&i915->runtime_pm, wakeref) - i915_gem_shrink(NULL, i915, -1UL, NULL, ~0); + wakeref = intel_runtime_pm_get(&i915->runtime_pm); + i915_gem_shrink(NULL, i915, -1UL, NULL, ~0); i915_gem_drain_freed_objects(i915); - wbinvd_on_all_cpus(); - list_for_each_entry(obj, &i915->mm.shrink_list, mm.link) - __start_cpu_write(obj); + list_for_each_entry(obj, &i915->mm.shrink_list, mm.link) { + i915_gem_object_lock(obj, NULL); + drm_WARN_ON(&i915->drm, + i915_gem_object_set_to_cpu_domain(obj, true)); + i915_gem_object_unlock(obj); + } + + intel_runtime_pm_put(&i915->runtime_pm, wakeref); return 0; } From patchwork Sat Mar 19 19:42:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Cheng X-Patchwork-Id: 12786321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D531FC433EF for ; Sat, 19 Mar 2022 19:42:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B6D2510EE8D; Sat, 19 Mar 2022 19:42:36 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8CA1E10EB71; Sat, 19 Mar 2022 19:42:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647718954; x=1679254954; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OTxUHmQQY7cQoxWryXWv/oqAfUW2bcJG5Qgzx8iJkAo=; b=U/9BLl0U40ymNlw39NplLv/UgloEfN+uSPKLfFtFYuN5LDQnx7+6rlNL zU+pr7znbrAQQUmNFuKtRP4gpVdxlqyUfD1kAPxaA9kiJxartCgqL8I5b U+75yD+luXT+GqEaxCQE4XXc+Im0kHU+Xzkuk1W6FGRqi7TnHZHnitNcS /YZvKpgPLy/ToAJojzCTXvxfK+RZH+u87qjPEqbACcXTuzaF+eqLKUeZU E+ErNB7mBT200Ea5QTQcMlRptNo6hguS0AwE6VperG0dSuveieI7JnWTv +FwjjjMpTN0OA6TUknYgItscur1L4kAv00H/V+u6p3s2piJOYlngd6q5U g==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="282145186" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="282145186" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:34 -0700 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="600019696" Received: from jpulito-mobl2.amr.corp.intel.com (HELO mvcheng-desk2.intel.com) ([10.255.231.61]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 12:42:33 -0700 From: Michael Cheng To: intel-gfx@lists.freedesktop.org Date: Sat, 19 Mar 2022 12:42:27 -0700 Message-Id: <20220319194227.297639-5-michael.cheng@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220319194227.297639-1-michael.cheng@intel.com> References: <20220319194227.297639-1-michael.cheng@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/4] drm/i915/gt: Revert ggtt_resume to previous logic X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thomas.hellstrom@linux.intel.com, michael.cheng@intel.com, daniel.vetter@ffwll.ch, lucas.demarchi@intel.com, dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To avoid having to call wbinvd_on_all_cpus, revert i915_ggtt_resume and i915_ggtt_resume_vm to previous logic [1]. [1]. 64b95df91f44 drm/i915: Assume exclusive access to objects inside resume Suggested-by: Lucas De Marchi Signed-off-by: Michael Cheng --- drivers/gpu/drm/i915/gt/intel_ggtt.c | 17 ++++++----------- drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +- 2 files changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c index 04191fe2ee34..811bfd9d8d80 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c @@ -1305,10 +1305,9 @@ void i915_ggtt_disable_guc(struct i915_ggtt *ggtt) * Returns %true if restoring the mapping for any object that was in a write * domain before suspend. */ -bool i915_ggtt_resume_vm(struct i915_address_space *vm) +void i915_ggtt_resume_vm(struct i915_address_space *vm) { struct i915_vma *vma; - bool write_domain_objs = false; drm_WARN_ON(&vm->i915->drm, !vm->is_ggtt && !vm->is_dpt); @@ -1325,28 +1324,24 @@ bool i915_ggtt_resume_vm(struct i915_address_space *vm) vma->ops->bind_vma(vm, NULL, vma->resource, obj ? obj->cache_level : 0, was_bound); - if (obj) { /* only used during resume => exclusive access */ - write_domain_objs |= fetch_and_zero(&obj->write_domain); - obj->read_domains |= I915_GEM_DOMAIN_GTT; + if (obj) { + i915_gem_object_lock(obj, NULL); + WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false)); + i915_gem_object_unlock(obj); } } - return write_domain_objs; } void i915_ggtt_resume(struct i915_ggtt *ggtt) { - bool flush; intel_gt_check_and_clear_faults(ggtt->vm.gt); - flush = i915_ggtt_resume_vm(&ggtt->vm); + i915_ggtt_resume_vm(&ggtt->vm); ggtt->invalidate(ggtt); - if (flush) - wbinvd_on_all_cpus(); - if (GRAPHICS_VER(ggtt->vm.i915) >= 8) setup_private_pat(ggtt->vm.gt->uncore); diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h index 4529b5e9f6e6..c86092054988 100644 --- a/drivers/gpu/drm/i915/gt/intel_gtt.h +++ b/drivers/gpu/drm/i915/gt/intel_gtt.h @@ -567,7 +567,7 @@ struct i915_ppgtt *i915_ppgtt_create(struct intel_gt *gt, unsigned long lmem_pt_obj_flags); void i915_ggtt_suspend_vm(struct i915_address_space *vm); -bool i915_ggtt_resume_vm(struct i915_address_space *vm); +void i915_ggtt_resume_vm(struct i915_address_space *vm); void i915_ggtt_suspend(struct i915_ggtt *gtt); void i915_ggtt_resume(struct i915_ggtt *ggtt);