From patchwork Mon Mar 21 13:36:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12787234 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13799C4332F for ; Mon, 21 Mar 2022 13:37:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347255AbiCUNim (ORCPT ); Mon, 21 Mar 2022 09:38:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347618AbiCUNil (ORCPT ); Mon, 21 Mar 2022 09:38:41 -0400 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6DF31207F2; Mon, 21 Mar 2022 06:37:11 -0700 (PDT) Received: by mail-wm1-x333.google.com with SMTP id r7so8562570wmq.2; Mon, 21 Mar 2022 06:37:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CNEg8vlsQ11Lpgkkrda5koYAZz2XxJeEtT3/uBkpQRc=; b=EV/nk2RNA9yk3hPFxtB1ACpOjYRiBwiP7VPcXo26xviYzszA32+KYbpzTSycHKFjB+ eWgfROWMZ1YABQoZKkP5PQhRmoK+CVDBQ+oprSicpeQ89eSr9FaAMDtHxuTGQ3MGk7nW Cy97wD5J+sZem2PBDLKdRxwsYZoLbvdhWqZ8qu5Wnik+RiQcMvWJXKbB4VXZ7t+VrW7i 5TwUY2oIMPHQ4FwqVUmAhafqujQVb3xLJSkBU5b8vannihf5AX33OpPWmicwXIMYryc8 iUeDXsUec5jc3KoWMNlZnmkkQzf3BrfNOSh6RjB9ergO42IuvdsnPCpUblT55daztyTo DsfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CNEg8vlsQ11Lpgkkrda5koYAZz2XxJeEtT3/uBkpQRc=; b=WZtB5hWN2goCkbnCjgeDKHF1q0W7kXKYYNtxuGF5X426pym/jTc+xRgnB6qOAne7PC YIJRWBb+2mY2tlG6tFGKTXlJnUZ0tFwck8zfYX1N7hHKKF3MQwudpovVg6hW6xk3cE+4 fOQ8uW9UiRehrfu2S4uIjwKTmBGJE32zXKIWmYEE0VFeRwBSwfTU9nb7to6W0Gma6QJ9 gKf3oI41X+7qBbYfrZXL778VGISnpgf5wICUjozVKTOjUGZ52Jnh1QAPip3JfI55ZxuI LQYVOgUukv9Ya1bhf9nSlwRQvRjcd2lZuh5qbPNiS0NpPO3VLMJRyOoWydOKQgpfR749 UTNA== X-Gm-Message-State: AOAM531N8CzGub3K1WWjLXqL915fa7NaePozy6iVFPEV0XBeCFBMWybB BNuRXzvpJG/hk33X3rJJPf4= X-Google-Smtp-Source: ABdhPJwUlJK34K9YNvvV2XWhQvy2ElJxxn4lifLxBtjMM4xkIyawSX1FrxBzpry9dKWcN+Tz8u1QQA== X-Received: by 2002:a1c:3bd5:0:b0:38c:9b9f:1b24 with SMTP id i204-20020a1c3bd5000000b0038c9b9f1b24mr7898377wma.129.1647869829735; Mon, 21 Mar 2022 06:37:09 -0700 (PDT) Received: from monk.home ([2a01:cb10:430:ec00:4737:d56e:186b:af1]) by smtp.gmail.com with ESMTPSA id w5-20020a5d5445000000b00203f8c96bcesm7969426wrv.49.2022.03.21.06.37.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 06:37:09 -0700 (PDT) From: Christophe Branchereau To: Paul Cercueil , David Airlie , Daniel Vetter , Thierry Reding , Sam Ravnborg , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v5 1/3] drm/ingenic : add ingenic_drm_bridge_atomic_enable and disable Date: Mon, 21 Mar 2022 14:36:49 +0100 Message-Id: <20220321133651.291592-2-cbranchereau@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220321133651.291592-1-cbranchereau@gmail.com> References: <20220321133651.291592-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org ingenic_drm_bridge_atomic_enable allows the CRTC to be enabled after panels have slept out, and before their display is turned on, solving a graphical bug on the newvision nv3502c. Also add ingenic_drm_bridge_atomic_disable to balance it out. Signed-off-by: Christophe Branchereau Acked-by: Artur Rojek --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 34 +++++++++++++++-------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index dcf44cb00821..2bbfd2e7fdab 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -226,6 +226,18 @@ static int ingenic_drm_update_pixclk(struct notifier_block *nb, } } +static void ingenic_drm_bridge_atomic_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) +{ + struct ingenic_drm *priv = drm_device_get_priv(bridge->dev); + + regmap_write(priv->map, JZ_REG_LCD_STATE, 0); + + regmap_update_bits(priv->map, JZ_REG_LCD_CTRL, + JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE, + JZ_LCD_CTRL_ENABLE); +} + static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) { @@ -237,28 +249,20 @@ static void ingenic_drm_crtc_atomic_enable(struct drm_crtc *crtc, if (WARN_ON(IS_ERR(priv_state))) return; - regmap_write(priv->map, JZ_REG_LCD_STATE, 0); - /* Set addresses of our DMA descriptor chains */ next_id = priv_state->use_palette ? HWDESC_PALETTE : 0; regmap_write(priv->map, JZ_REG_LCD_DA0, dma_hwdesc_addr(priv, next_id)); regmap_write(priv->map, JZ_REG_LCD_DA1, dma_hwdesc_addr(priv, 1)); - regmap_update_bits(priv->map, JZ_REG_LCD_CTRL, - JZ_LCD_CTRL_ENABLE | JZ_LCD_CTRL_DISABLE, - JZ_LCD_CTRL_ENABLE); - drm_crtc_vblank_on(crtc); } -static void ingenic_drm_crtc_atomic_disable(struct drm_crtc *crtc, - struct drm_atomic_state *state) +static void ingenic_drm_bridge_atomic_disable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { - struct ingenic_drm *priv = drm_crtc_get_priv(crtc); + struct ingenic_drm *priv = drm_device_get_priv(bridge->dev); unsigned int var; - drm_crtc_vblank_off(crtc); - regmap_update_bits(priv->map, JZ_REG_LCD_CTRL, JZ_LCD_CTRL_DISABLE, JZ_LCD_CTRL_DISABLE); @@ -267,6 +271,12 @@ static void ingenic_drm_crtc_atomic_disable(struct drm_crtc *crtc, 1000, 0); } +static void ingenic_drm_crtc_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + drm_crtc_vblank_off(crtc); +} + static void ingenic_drm_crtc_update_timings(struct ingenic_drm *priv, struct drm_display_mode *mode) { @@ -968,6 +978,8 @@ static const struct drm_encoder_helper_funcs ingenic_drm_encoder_helper_funcs = static const struct drm_bridge_funcs ingenic_drm_bridge_funcs = { .attach = ingenic_drm_bridge_attach, + .atomic_enable = ingenic_drm_bridge_atomic_enable, + .atomic_disable = ingenic_drm_bridge_atomic_disable, .atomic_check = ingenic_drm_bridge_atomic_check, .atomic_reset = drm_atomic_helper_bridge_reset, .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, From patchwork Mon Mar 21 13:36:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12787235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 998BDC43217 for ; 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Mon, 21 Mar 2022 06:37:12 -0700 (PDT) From: Christophe Branchereau To: Paul Cercueil , David Airlie , Daniel Vetter , Thierry Reding , Sam Ravnborg , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v5 2/3] drm/panel: Add panel driver for NewVision NV3052C based LCDs Date: Mon, 21 Mar 2022 14:36:50 +0100 Message-Id: <20220321133651.291592-3-cbranchereau@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220321133651.291592-1-cbranchereau@gmail.com> References: <20220321133651.291592-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org This driver supports the NewVision NV3052C based LCDs. Right now, it only supports the LeadTek LTK035C5444T 2.4" 640x480 TFT LCD panel, which can be found in the Anbernic RG-350M handheld console. Signed-off-by: Christophe Branchereau Reviewed-by: Sam Ravnborg --- drivers/gpu/drm/panel/Kconfig | 9 + drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-newvision-nv3052c.c | 484 ++++++++++++++++++ 3 files changed, 494 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-newvision-nv3052c.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index bb2e47229c68..40084f709789 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -283,6 +283,15 @@ config DRM_PANEL_NEC_NL8048HL11 panel (found on the Zoom2/3/3630 SDP boards). To compile this driver as a module, choose M here. +config DRM_PANEL_NEWVISION_NV3052C + tristate "NewVision NV3052C RGB/SPI panel" + depends on OF && SPI + depends on BACKLIGHT_CLASS_DEVICE + select DRM_MIPI_DBI + help + Say Y here if you want to enable support for the panels built + around the NewVision NV3052C display controller. + config DRM_PANEL_NOVATEK_NT35510 tristate "Novatek NT35510 RGB panel driver" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 5740911f637c..42a7ab54234b 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829) += panel-leadtek-ltk500hd1829.o obj-$(CONFIG_DRM_PANEL_LG_LB035Q02) += panel-lg-lb035q02.o obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o obj-$(CONFIG_DRM_PANEL_NEC_NL8048HL11) += panel-nec-nl8048hl11.o +obj-$(CONFIG_DRM_PANEL_NEWVISION_NV3052C) += panel-newvision-nv3052c.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c new file mode 100644 index 000000000000..7ad9d29839fc --- /dev/null +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -0,0 +1,484 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * NewVision NV3052C IPS LCD panel driver + * + * Copyright (C) 2020, Paul Cercueil + * Copyright (C) 2022, Christophe Branchereau + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include