From patchwork Mon Mar 21 14:48:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F0EBC4167D for ; Mon, 21 Mar 2022 15:17:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349928AbiCUPTP (ORCPT ); Mon, 21 Mar 2022 11:19:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349910AbiCUPTO (ORCPT ); Mon, 21 Mar 2022 11:19:14 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31E80111DF9; Mon, 21 Mar 2022 08:17:48 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id u16so20158478wru.4; Mon, 21 Mar 2022 08:17:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=oYnAnrWU13qc8rQ7MPOxKFwqoXsKN+1WmTS68IkDyt4=; b=IMlnXW0jc/BrvYdtOmrfmgwd+fMG79sK67+4kSiAUIWzlFHMzdRN87XOjJ3/ax8QIg Ldl/gjYhaqxhfCe8/VNvswVzLyPkVDNCbMvoOqfNVQ2JrmgebtS/oyBlLAj4YVXEs8Me fPHV22nl7gvkR+g31m6bokFeh7sx0nCm4zJ8Z16IhrJy2hEI90YpnsAxcX1ORENgZgTP kkWIjGcUiKFGinwEGL4kZl87qBxaWx4sQt2V7Bpzx2UHeVSp+aebyCJsbLY8Rv9ekTrz wCJ1T40jpzC/YzJ7JEJQYuwwgsmthmagRxDx1B/ojfu+WxsgWhf7WIuW59taBIgHq0Zl zeSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oYnAnrWU13qc8rQ7MPOxKFwqoXsKN+1WmTS68IkDyt4=; b=oBSz+ofAkAqwoMzGsMPw2SI7R9LRiHyjDVFKFGDbR5ysNQskLXZVvwb8UuAdYsrgWU H1vdt2X7JxinibG2aH7YZdoWLXz3jvaAdrCf0RN4IAYwUHk5w3JDJ1yjw9KLEtyPvTC2 GNdAm/xREH4dLdZG6TM2k8qWeCDblAg8abuEiFW6HIwsemo8ZzGd8G0+j5Lc4iHC2sg5 3YT73ct7QfYYH3Qd4ACvbSzbR3mxPYBvJt3fG8f47NkVLh+sxY/6OVMrCVLOxvjIkkda lgYT2OZHqzzW0eZ1sWDupRzZbc+Z0TP89QBexiyK4zQARuwjDd9Q+0k9ulrLtOdS81gD 5g4A== X-Gm-Message-State: AOAM5307Dy2w/SLVda022eZIzXiwro6k+ynsI5EvcD/7DEgnkIUUaZBD 0bIFjXXxtnymqOkWJ9BdHxs= X-Google-Smtp-Source: ABdhPJxFix6hOHLNyB7fo+uQHtTEJNFGP2SmB0UgZOCmb7owFDbYFkRfjOhMxf7rAu50gdXd1VpWdA== X-Received: by 2002:a5d:5510:0:b0:203:f97c:f98 with SMTP id b16-20020a5d5510000000b00203f97c0f98mr11975301wrv.200.1647875866615; Mon, 21 Mar 2022 08:17:46 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:46 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 01/18] clk: introduce clk_hw_get_index_of_parent new API Date: Mon, 21 Mar 2022 15:48:08 +0100 Message-Id: <20220321144825.11736-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Clk can have multiple parents. Some clk may require to get the cached index of other parent that are not current associated with the clk. We have clk_hw_get_parent_index() that returns the index of the current parent but we can't get the index of other parents of the provided clk. Introduce clk_hw_get_index_of_parent() to get the cached index of the parent of the provided clk. This permits a direct access of the internal clk_fetch_parent_index(). Signed-off-by: Ansuel Smith --- drivers/clk/clk.c | 14 ++++++++++++++ include/linux/clk-provider.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 8de6a22498e7..bdd70a88394c 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1726,6 +1726,20 @@ int clk_hw_get_parent_index(struct clk_hw *hw) } EXPORT_SYMBOL_GPL(clk_hw_get_parent_index); +/** + * clk_hw_get_index_of_parent - return the index of the parent clock + * @hw: clk_hw associated with the clk being consumed + * @parent: clk_hw of the parent to be fetched the index of + * + * Fetches and returns the index of parent clock provided. + * Returns -EINVAL if the given parent index can't be provided. + */ +int clk_hw_get_index_of_parent(struct clk_hw *hw, const struct clk_hw *parent) +{ + return clk_fetch_parent_index(hw->core, parent->core); +} +EXPORT_SYMBOL_GPL(clk_hw_get_index_of_parent); + /* * Update the orphan status of @core and all its children. */ diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 2faa6f7aa8a8..5708c0b3ef1c 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -1198,6 +1198,7 @@ unsigned int clk_hw_get_num_parents(const struct clk_hw *hw); struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw); struct clk_hw *clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index); +int clk_hw_get_index_of_parent(struct clk_hw *hw, const struct clk_hw *parent); int clk_hw_get_parent_index(struct clk_hw *hw); int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *new_parent); unsigned int __clk_get_enable_count(struct clk *clk); From patchwork Mon Mar 21 14:48:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D20FC4321E for ; Mon, 21 Mar 2022 15:17:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349939AbiCUPTQ (ORCPT ); Mon, 21 Mar 2022 11:19:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349912AbiCUPTO (ORCPT ); Mon, 21 Mar 2022 11:19:14 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 438FB113D01; Mon, 21 Mar 2022 08:17:49 -0700 (PDT) Received: by mail-wr1-x42c.google.com with SMTP id a1so19788573wrh.10; Mon, 21 Mar 2022 08:17:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=8P3wAYvgFlPve71dG0z5aPiI1G8WoaU4vYr3l4vmoOE=; b=W3ChpJLmwyrqPCndWOIVoo8/LzEsb1GaL6fs3Idbl4VVZS1J/DuIYBCHOtxEfsXK1V 13WBmhNyRHS2Z29fkHal0LKEyGn5w41lCFkCZUn9WoAwVFZvzO4dmex0REgLmCt+8GqD BPitPzLyNJkL+myNs/77Bb98mwEBw8OSDz66amqb07C7HcgIpIr5v6RYvjTiWb05a1/j a0nyiVI+UcJVlrqOWfkj37l4nNelwHQZYVWPIvTKXTko7Ey+NXIplJhydL6nSBt564yr DoO90JO62JLi9fzohLMLK5GTkYQmHd32MhzeiU0+vR3yNvCaolf/Dho+HDGch86kbWDM 5enQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8P3wAYvgFlPve71dG0z5aPiI1G8WoaU4vYr3l4vmoOE=; b=Hi37aFjbt8VbxIhxVYduxt+CTs/qgE1fyCw5cTTHzK3fW7t3T6PkkUJqCgHnyt6fxq l1xLbzbZcOS0WZg20MjP0sn7sUQEam5Bkt6wvLifUK6KLAOH7dVY4gRfOWhX5ayxR1BU JCa+ciYe50T7S57Ia3EK5mfW7bUe+Bieo0jJwNrZ8ourUSVwKWOyaSd+VhImRwbbTPTx mvAdfs6iJ4glk4IpFr6maYWcHsPPc2LX6didwIPaUkrmHYerklfmz4GFqgNx7Jmx9cb8 sSMzTUr0Ye+TNiOcfdb/u6ES+R9QKoRn01CGggvqTA72B+yQFVSVMnKyE+F6zDNG/avd AIvw== X-Gm-Message-State: AOAM531GB2LppovOi3PEGDemaDsLZMnPa4EUce/CrHK5/R9gUvMwzqqy /Cbx50X+9cLsZ6z6UwzlmNE= X-Google-Smtp-Source: ABdhPJysgBK1LnHyN+rGxiVt/F3ggQ40uJfDym2izMHgFoeqY5yLmZ6E75oijCclQCyteGdoF0aS3g== X-Received: by 2002:a05:6000:128f:b0:1f1:e586:87af with SMTP id f15-20020a056000128f00b001f1e58687afmr18727182wrx.222.1647875867682; Mon, 21 Mar 2022 08:17:47 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:47 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 02/18] clk: qcom: gcc-ipq806x: skip pxo/cxo fixed clk if already present Date: Mon, 21 Mar 2022 15:48:09 +0100 Message-Id: <20220321144825.11736-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Skip pxo/cxo clock registration if they are already defined in DTS as fixed clock. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/gcc-ipq806x.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index d6b7adb4be38..27f6d7626abb 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -3061,15 +3062,22 @@ static int gcc_ipq806x_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct regmap *regmap; + struct clk *clk; int ret; - ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000); - if (ret) - return ret; + clk = clk_get(dev, "cxo"); + if (IS_ERR(clk)) { + ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000); + if (ret) + return ret; + } - ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000); - if (ret) - return ret; + clk = clk_get(dev, "pxo"); + if (IS_ERR(clk)) { + ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000); + if (ret) + return ret; + } ret = qcom_cc_probe(pdev, &gcc_ipq806x_desc); if (ret) From patchwork Mon Mar 21 14:48:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BA62C4321E for ; Mon, 21 Mar 2022 15:17:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349950AbiCUPTT (ORCPT ); Mon, 21 Mar 2022 11:19:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349932AbiCUPTP (ORCPT ); Mon, 21 Mar 2022 11:19:15 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59D4B111DDC; Mon, 21 Mar 2022 08:17:50 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id m30so11324524wrb.1; Mon, 21 Mar 2022 08:17:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=XhL5PcXPAVYZIaqVjbCyrF3IgCwpUk1BeN4L/hsgGTo=; b=cHFxeW+dNxRnim5lHgkGnYGLUOXrAntyIXQ97bgPETSh50ci0sSBCoYftpHi8HNr45 E5VVBYCnOoxRpeLzSxqZDGQQSZai4X1NzRWBwu08C/WoT00RwSqGymMFZf+J+KkO412i kegSRwz5mS3LFDjpt0OfbvkZ7JkEpuNgJGEX7KNOKXxVCFO3RqDhgQ1p/cZpeJpXcoP4 YicRMjXgRDnD9sA6dh0Q3XlYMgr6sLEaQnsc/DI+fUHkK+x25q/Cch5ciktMxsAjyDLo r7fCbrCL6fR5JUqT+4kbKkFt5Q+y3+A/3yGKEZ3u+R0doExMbi+5S9PIbP4c55Hw8Beu D4fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XhL5PcXPAVYZIaqVjbCyrF3IgCwpUk1BeN4L/hsgGTo=; b=BSHn4fpFAKlmiTaokoyxfBsr16+lzMVKem+mAFca0VgZhxqt17qpLkP7gwHT6ynzHk pusOITr80WEaGm9h/yRixuA1fz1WD/A5+fSxTE16qU0uT70VQrwnWn6rhOwKmWN72tVg eQ/91ftTDVDA2lE45PvCSrc20dHyJwMPE5tfHBARh8ebVfVcSL6XX8vMWP13Eft/YSzp Hx0APkzR8iYSYw+9TbaRVF0Dx0B5biquzv6QWmTM6CjjIDXbrmK6FtY0UHiq6w8UabTM JSODF0T94M2w+x2ISsC0s7JZ4u6XL+l6FSBDo0efs2yv6oMRYIV95mMCcXA8P2LaCxzw hJGQ== X-Gm-Message-State: AOAM53144HGU4EAS+T1XiduI7Ut0GWpiyHXpnhJ3iG/o2IZvIAWjxxNj Oe/idAe+rodSPBb9Y3lsBs8= X-Google-Smtp-Source: ABdhPJy4fxPuhDbY7wiV30NpnJ0j4pmlrHKEwDEiCM3xIxrH7V/wV6fzz38BHzg62VuhqUHaM1UaCw== X-Received: by 2002:adf:f50d:0:b0:203:f72c:e26a with SMTP id q13-20020adff50d000000b00203f72ce26amr12386883wro.620.1647875868677; Mon, 21 Mar 2022 08:17:48 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:48 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 03/18] clk: qcom: gcc-ipq806x: add PXO_SRC in clk table Date: Mon, 21 Mar 2022 15:48:10 +0100 Message-Id: <20220321144825.11736-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PXO_SRC is currently defined in the gcc include and referenced in the ipq8064 DTSI. Correctly provide a clk after gcc probe to fix kernel panic if a driver starts to actually use it. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/gcc-ipq806x.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index 27f6d7626abb..7271d3afdc89 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -26,6 +26,8 @@ #include "clk-hfpll.h" #include "reset.h" +static struct clk_regmap pxo = { }; + static struct clk_pll pll0 = { .l_reg = 0x30c4, .m_reg = 0x30c8, @@ -2754,6 +2756,7 @@ static struct clk_dyn_rcg ubi32_core2_src_clk = { }; static struct clk_regmap *gcc_ipq806x_clks[] = { + [PXO_SRC] = NULL, [PLL0] = &pll0.clkr, [PLL0_VOTE] = &pll0_vote, [PLL3] = &pll3.clkr, @@ -3083,6 +3086,10 @@ static int gcc_ipq806x_probe(struct platform_device *pdev) if (ret) return ret; + clk = clk_get(dev, "pxo"); + pxo.hw = *__clk_get_hw(clk); + gcc_ipq806x_clks[PXO_SRC] = &pxo; + regmap = dev_get_regmap(dev, NULL); if (!regmap) return -ENODEV; From patchwork Mon Mar 21 14:48:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81F2DC433F5 for ; Mon, 21 Mar 2022 15:17:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349940AbiCUPTS (ORCPT ); Mon, 21 Mar 2022 11:19:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37756 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349942AbiCUPTQ (ORCPT ); Mon, 21 Mar 2022 11:19:16 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42472EDF0B; Mon, 21 Mar 2022 08:17:51 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id t11so21180761wrm.5; Mon, 21 Mar 2022 08:17:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=8h0dp/sRCWnE/SzxqBhwWtp3OCJwunZ7486W2HMfBko=; b=Z60PkwuF45a94nU3pDR2UUzDhsn150Rvh2gB+Ung2m71vatdGxrP4dLJWflsoYAdHz +pjCVTMpDWLMKyl2Y6OSxmlNqJXfaHPaEGk5shhm2ccExJW89JB+0qaO0/fSa04rv3T7 HkBFAsEyVKs54e6bcul0kgdwcnHYaukpYhOG6+ww8ynG9LOyMetAkTMA76/7rBqIq2dd KwWHOh57/IgSp44MmaT8smsC4HbRkJa7/EsjjbLceCjxay+dPBmwjvArVs3jn0EtPrTH P7nWco+sg6wLdA01JHRTN2gJLqpcRq+mQ/Ak1FA4apu5sqt9KlVxhUdA9d7xK9KUSZ0z E1tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8h0dp/sRCWnE/SzxqBhwWtp3OCJwunZ7486W2HMfBko=; b=XmdQAK609T26LXwWNGLC+/jRDvZBhHGQuzO0InL8NU21VyEQsLSnf8T0ASuoXHz816 BHrcVisgXC9FhgX9cwEAD0kbmsAa0WNnLS4Nzcfeq0/kRRo35TW5UEeh7LbpNlUoSkfo QVTDj1Topn7xLDeWL+zVp4FLabNnCMHDUm/1Pc+Xb21tXuVbYBCDzHi3t1Tf4qeYXG6H tIpDfnLYMHyuwGO3CXxEtrAZgzEgzHKfQmSzXScelyy+vmumt4h+a9Iwv+h9mlMBWn4A d1xKRRynHTVkouYFfFpuGEcy41TeCr6qMVLKSuNF4AfzLrkql+f214HhumOsWtfuYURD XJ6Q== X-Gm-Message-State: AOAM530/XLef8lXAqvHa1KdWQ/MB9mZ4xm3uZN2PxdNA5mXX6o9olRiq BD1h5DpKT7o9edKVonuuVqo= X-Google-Smtp-Source: ABdhPJyVphV0iTWxd2pv7sbyrbbMdvHxY2Wi0G2Zz9gj2N03j3KbicFxC/kSLrtfYCP2vxAfCxbfcw== X-Received: by 2002:a5d:504d:0:b0:203:e60e:49ef with SMTP id h13-20020a5d504d000000b00203e60e49efmr18601562wrt.546.1647875869752; Mon, 21 Mar 2022 08:17:49 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:49 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 04/18] clk: qcom: clk-hfpll: use poll_timeout macro Date: Mon, 21 Mar 2022 15:48:11 +0100 Message-Id: <20220321144825.11736-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use regmap_read_poll_timeout macro instead of do-while structure. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-hfpll.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/clk/qcom/clk-hfpll.c b/drivers/clk/qcom/clk-hfpll.c index e847d586a73a..a4e347eb4d4d 100644 --- a/drivers/clk/qcom/clk-hfpll.c +++ b/drivers/clk/qcom/clk-hfpll.c @@ -12,6 +12,8 @@ #include "clk-regmap.h" #include "clk-hfpll.h" +#define HFPLL_BUSY_WAIT_TIMEOUT 100 + #define PLL_OUTCTRL BIT(0) #define PLL_BYPASSNL BIT(1) #define PLL_RESET_N BIT(2) @@ -72,13 +74,12 @@ static void __clk_hfpll_enable(struct clk_hw *hw) regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N); /* Wait for PLL to lock. */ - if (hd->status_reg) { - do { - regmap_read(regmap, hd->status_reg, &val); - } while (!(val & BIT(hd->lock_bit))); - } else { + if (hd->status_reg) + regmap_read_poll_timeout(regmap, hd->status_reg, val, + !(val & BIT(hd->lock_bit)), USEC_PER_MSEC * 2, + HFPLL_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); + else udelay(60); - } /* Enable PLL output. */ regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL); From patchwork Mon Mar 21 14:48:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EA1FC433F5 for ; Mon, 21 Mar 2022 15:18:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349966AbiCUPTW (ORCPT ); Mon, 21 Mar 2022 11:19:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349907AbiCUPTR (ORCPT ); Mon, 21 Mar 2022 11:19:17 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B57F111DF9; Mon, 21 Mar 2022 08:17:52 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id a1so19788809wrh.10; Mon, 21 Mar 2022 08:17:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=KJy+bVD9Yq3kRrz9Gx7NWpfnxrb/beBV0JaHxbyWaTA=; b=MjtQAPTGqq16xDSgcCRIsMh4HXuzyMvVlEOEy//RsK4Aveijz9EHXKEDl7K7jmTW2h oiH4FEZ8Kieum491jlrMvjrLEElqVh5cixSr4PHhoWtLFJcEcmMhrFTAMB3ic4ppHkxl OTk7b7AtzwueT6FxWZ5RfRGtNJJwl00h+qS07cI/HBaJS3sbYNVRA3U3zE7Oc7xqpuih 8+uxLDadPlc1Fuo/0YTN6i5QvsJx9cSNOL8MSuFvtw6CSpj85JsD5QjQ6xD0IMICPysg aOpb0NlAqcVELzG/giEBslIVjweH9ihYdlSOTCfCDZGZOvCoVgV0hKoxNtWAY+OHDd+X Af5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KJy+bVD9Yq3kRrz9Gx7NWpfnxrb/beBV0JaHxbyWaTA=; b=uQtn6BgJcu9uCZlDF4lOJQahcyUJbVuGeziFwMsXA8GyYkHdcbSaLOfYAC8TOYxfbV mfx6e/GA0eUr/R441xmJ1Ua2yO+F3EmykbvAZ0wbfcUldptX8y9uVr7RH0RqPNseCLqj njeM3JIiXN8xmQZRVtXhY7/qWTFWI8v7uAOLoZDcG1QXihHpX0vY6uncAzXvQ7Ld7nfK DWaj2I8f/ssf1lakeMcjRwGpMBzMua9ojgf6YXxAtJ74wsddftODGAz2t4EWP7uboppz MsMTgLK1GQJrpR6kbG5Cu80Nl66yuJ0OAkTvKGEVnWF083m8yblIgXS2GTF7+vpRkxC0 5qrw== X-Gm-Message-State: AOAM533jYFX8xhADboQnyQ59qs3q0SIP16QUFRc2Tcy62lx+VedYDRmy 0Ua1yhQfTuWTYzIEK/emDX8= X-Google-Smtp-Source: ABdhPJxKvFg85nJAodJVi4K6pIOciC75yYvZK4SfuktnHR362uHPUwJAA76+yI7cSZqGB1L18ZCe+A== X-Received: by 2002:a05:6000:1a89:b0:204:1fc8:ea61 with SMTP id f9-20020a0560001a8900b002041fc8ea61mr346959wry.171.1647875870819; Mon, 21 Mar 2022 08:17:50 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:50 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 05/18] clk: qcom: kpss-xcc: convert to parent data API Date: Mon, 21 Mar 2022 15:48:12 +0100 Message-Id: <20220321144825.11736-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert the driver to parent data API. From the Documentation pll8_vote and pxo should be declared in the DTS so fw_name can be used instead of parent_names. Name is still used to save regression on old definition. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/kpss-xcc.c | 25 ++++++++----------------- 1 file changed, 8 insertions(+), 17 deletions(-) diff --git a/drivers/clk/qcom/kpss-xcc.c b/drivers/clk/qcom/kpss-xcc.c index 4fec1f9142b8..347f70e9f5fe 100644 --- a/drivers/clk/qcom/kpss-xcc.c +++ b/drivers/clk/qcom/kpss-xcc.c @@ -12,9 +12,9 @@ #include #include -static const char *aux_parents[] = { - "pll8_vote", - "pxo", +static const struct clk_parent_data aux_parents[] = { + { .name = "pll8_vote", .fw_name = "pll8_vote" }, + { .name = "pxo", .fw_name = "pxo" }, }; static unsigned int aux_parent_map[] = { @@ -32,8 +32,8 @@ MODULE_DEVICE_TABLE(of, kpss_xcc_match_table); static int kpss_xcc_driver_probe(struct platform_device *pdev) { const struct of_device_id *id; - struct clk *clk; void __iomem *base; + struct clk_hw *hw; const char *name; id = of_match_device(kpss_xcc_match_table, &pdev->dev); @@ -55,24 +55,15 @@ static int kpss_xcc_driver_probe(struct platform_device *pdev) base += 0x28; } - clk = clk_register_mux_table(&pdev->dev, name, aux_parents, - ARRAY_SIZE(aux_parents), 0, base, 0, 0x3, - 0, aux_parent_map, NULL); + hw = __devm_clk_hw_register_mux(&pdev->dev, NULL, name, ARRAY_SIZE(aux_parents), + NULL, NULL, aux_parents, 0, base, 0, 0x3, + 0, aux_parent_map, NULL); - platform_set_drvdata(pdev, clk); - - return PTR_ERR_OR_ZERO(clk); -} - -static int kpss_xcc_driver_remove(struct platform_device *pdev) -{ - clk_unregister_mux(platform_get_drvdata(pdev)); - return 0; + return PTR_ERR_OR_ZERO(hw); } static struct platform_driver kpss_xcc_driver = { .probe = kpss_xcc_driver_probe, - .remove = kpss_xcc_driver_remove, .driver = { .name = "kpss-xcc", .of_match_table = kpss_xcc_match_table, From patchwork Mon Mar 21 14:48:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787350 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C46B3C4167D for ; Mon, 21 Mar 2022 15:17:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349955AbiCUPTU (ORCPT ); Mon, 21 Mar 2022 11:19:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349948AbiCUPTS (ORCPT ); Mon, 21 Mar 2022 11:19:18 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 504BFEDF0B; Mon, 21 Mar 2022 08:17:53 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id u16so20158813wru.4; Mon, 21 Mar 2022 08:17:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=fDLuIDyRCuRCH3Dc/gWWNAl91bj4g20Fwm4jwXMbE5A=; b=Za7W/slBsPjKinOPkZ2nZCjIHv+6kAIcjDdr+EVrNJfsgodzkSfMaEvSGVW7qEtmKw G7dq/MKUs8mm5URj3DwRdQdjL9nF4CoDGoSKE6PN9WbbTeo+4YBOGfaQTx0j66LIp1X4 x/Vw7pGpSj3VN2uGVPFgbZHZlC+8KlNOyjJqRlHDW49ryoPbSkh8XoDznVeiOPkITpxe MU1DGQis317QaiMz2OfGHSUevrLJWj1tRSKfcbZUmKooAJlTtaoWeM9rRsfWYzoeiPi0 V8UOs4IxIMQisL3FoQ49JoYxAWeAPcR1ZMW/PFDrWN9iQ1s3P977T6hN9L/xzujwX6iu QMpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fDLuIDyRCuRCH3Dc/gWWNAl91bj4g20Fwm4jwXMbE5A=; b=DBsAmRAyH5OiYUJqXDtZpRRRxkv+0sUozBElQXvZbu3iimORXL9l8kwWjCfM8PUXpE bZb6QQiwN3D3K/XD+8eBUPJdVPJZbKaEDIHpAZNilwmM0zlOlaM3zfYJraZibMIIGTkC QwYDGKUTv8nNaXfWZx/VXAc584ONQpPTNZi59Wt36TV0htWl3u1q6LTjENLzqxJKF5pn MY6AjWLR8Hd4/w4T48WnblsIUiEK4tEmwz52PfnBaG3gkozGkbJ1M+EGQeoUnzx84bzQ wuwlq7023reHsVkaz3jW47bwNoPLtzvn0hHkGW7FGwhuEwrETTei5bMlsKLGVL7Lo7Mo 87MQ== X-Gm-Message-State: AOAM530RGTQygofvjSzQ0Y0lACuR693LTlOgYflg69HRyRByel2MoFMF sNxVby8UGz5eP0up2AgN7AbU1/0TNhM= X-Google-Smtp-Source: ABdhPJyuqUrPKCTH9LaDiGhkitGK66ua3smDzdvkvO1yoJPyeVsDcg6vRDdohrCsGHDOsaZXXlNT9A== X-Received: by 2002:a5d:404c:0:b0:203:ea4e:3c07 with SMTP id w12-20020a5d404c000000b00203ea4e3c07mr17149999wrp.597.1647875871738; Mon, 21 Mar 2022 08:17:51 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:51 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 06/18] clk: qcom: clk-krait: unlock spin after mux completion Date: Mon, 21 Mar 2022 15:48:13 +0100 Message-Id: <20220321144825.11736-7-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Unlock spinlock after the mux switch is completed to prevent any corner case of mux request while the switch still needs to be done. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index 59f1af415b58..e447fcc3806d 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -32,11 +32,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT); } krait_set_l2_indirect_reg(mux->offset, regval); - spin_unlock_irqrestore(&krait_clock_reg_lock, flags); /* Wait for switch to complete. */ mb(); udelay(1); + + spin_unlock_irqrestore(&krait_clock_reg_lock, flags); } static int krait_mux_set_parent(struct clk_hw *hw, u8 index) From patchwork Mon Mar 21 14:48:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A83DC4332F for ; Mon, 21 Mar 2022 15:18:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349969AbiCUPTX (ORCPT ); Mon, 21 Mar 2022 11:19:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37796 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349954AbiCUPTT (ORCPT ); Mon, 21 Mar 2022 11:19:19 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 802E011174C; Mon, 21 Mar 2022 08:17:54 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id u16so20158885wru.4; Mon, 21 Mar 2022 08:17:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=uKLqUE0HqMblkYxTDEoLkraH8fYkNKsZ80vlgdu8msQ=; b=Kg32+44voPSZPfHfHlVLOInQdi2zziSL2WzKkR6lfRSiptD02bFTFLWkKUoD4OIBVM EeqKeFlP/I3s+1E1TnVG5mqPOrT46XpQBUAGrqr+WkNCQbzbSg4T1SfEMLIdhzhTXXmK DT/ThTdnxfvISyQy8W4PGzyL/CZNLyPtPbhF6D3/uB2/O0UgEd4SKA/WwPPvBD/Y/SLA QFY/v8VUNEy9yY6BSXoII6+7JakMYlAswigKJK149Qc+n3OXLF5RbjV9o6NL53EQ0XO8 4crsVNRdeXRTDHJhB/1VCOCDhoIo9yue+1cISxialmm+jsL1ZO42AV33fEVW2AS7qLsD TBlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uKLqUE0HqMblkYxTDEoLkraH8fYkNKsZ80vlgdu8msQ=; b=yvYPMxIlNsjXP2bW7qVD5G4b7n4+cHsJkGBtiCm8aLl8ft4x/lo727vddsboibmP1r hVTBl19J7RWNO3CGDAqekkFu4znj39KDvxoig6zBhoOrN33zbv69bclHPH2VNz7m5sMu WazoHdMSNuUnsnnYOyw5uEvOUS8RhbEwn2xhusn4wfmKj+oA22jacBsBH+U17tdzabZA xrCLfIjbILn+vydcnEvf/SkcA3R9Vg2OuJywbVy0hpB1Sb8aTblSLy26sjOqsVLFClwf WiPZ6UkJZ/rciUsWAUrZGNvlHKx0faTlDA0L4gdjo0ho/c4CTtqp5TQ/ZrSb4I2/GAw7 Lsew== X-Gm-Message-State: AOAM533UCqEQB62d1SkWkdSjIpemgcWKZTkCx0ImSF9irohWQFv94cjh ssBIRbks0+hbx0OUcRC2EyE= X-Google-Smtp-Source: ABdhPJyyZ5kPgpqQMhEsYC8BLymzgP/R8FO9Ybv6vdfhM/7iy3ATXmgl5qwQYzmMfqWCuUnIhw4IZg== X-Received: by 2002:a5d:6d8a:0:b0:204:8aa:309f with SMTP id l10-20020a5d6d8a000000b0020408aa309fmr6607273wrs.38.1647875872948; Mon, 21 Mar 2022 08:17:52 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:52 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 07/18] clk: qcom: clk-krait: add hw_parent check for div2_round_rate Date: Mon, 21 Mar 2022 15:48:14 +0100 Message-Id: <20220321144825.11736-8-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Check if hw_parent is present before calculating the round_rate to prevent kernel panic. On error -EINVAL is reported. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index e447fcc3806d..b6b7650dbf15 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -80,7 +80,12 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops); static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { - *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2); + struct clk_hw *hw_parent = clk_hw_get_parent(hw); + + if (!hw_parent) + return -EINVAL; + + *parent_rate = clk_hw_round_rate(hw_parent, rate * 2); return DIV_ROUND_UP(*parent_rate, 2); } From patchwork Mon Mar 21 14:48:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E280C433FE for ; Mon, 21 Mar 2022 15:18:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350006AbiCUPTg (ORCPT ); Mon, 21 Mar 2022 11:19:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349964AbiCUPTW (ORCPT ); Mon, 21 Mar 2022 11:19:22 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FA07ECC56; Mon, 21 Mar 2022 08:17:55 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id l7-20020a05600c1d0700b0038c99618859so1468491wms.2; Mon, 21 Mar 2022 08:17:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=1tacB+H58ZcVKBVcWE3u+TMM2y65iIDEoWk8hI94hWs=; b=qxF0IJ71hGwJ+LktvLEeGdx+IxUrq+NDarrqkeOl43MpIRpNa+Wsd3Knejst+xcUMe Uneayg/2f85zn0HVFwL2yPDkc0jq21kkWTnuZicQ1FEDECc08mMH/uleoLDsI+3NYxyG ua9Y9p8sEdH4LEnbAmeCuG2M0UcCfeqDqnFSmRZOhTOl8+nm9ZxLuiwLQYBzvm7YBxwv VrtNNo/Ilhod4bzCJqOGyL6HfCEz/7DWbdEgp3lPpz0yV81/WNXoD5lfdzbfp0+G51PD NGxdczosnfFMbWTmeJBqJyRU56vdg68hatotNtxI8+GkZrTivNN8ewWdtKq1MZS47bZy QT/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1tacB+H58ZcVKBVcWE3u+TMM2y65iIDEoWk8hI94hWs=; b=UIs0RPy6XMeFz4pkdGYkQY8EeNv2U5Hz3w0H2gvissRCoZALz5b182FRAXmez5wiuq C7LQOdv/5AwO/pSo7UTISSExhRfCm3s2DDmNKUPSE54Crh8DhkjZ33IpUH0oAbImyD6p 8ighNt/TW6DcIWhZmbRGg4cb0/d+hj3Ux2USkWkFZblg+HObB3WRhUY+Qm60X6tce/Dt zldKnzSesfLt11DuqV0BmAVYhXABKf5RSW6/6x8h/hbbM05+cS3Vh7o6UmnEuZCvgBQ1 /rDUdR+KNTlA+JH8vrdMah74i6qtmr+VwuxrauXQ5mplrIW8pb6LE0IpruHaApTxz/EX YYcQ== X-Gm-Message-State: AOAM5306bYyISLVYxVS1tRC5B9UPtA1QuiZwgoo8lGWx+CI737/JTIoz 1NI9pAx5G5esc6qiWcVAeqS8a1viXR0= X-Google-Smtp-Source: ABdhPJyfnC/Lte+5RYJDlJcoKo5e2NClVVjF1QRNM73ZmEAk/QjJ+4fF131VEwZkvMR5Rl0NUWVCDw== X-Received: by 2002:a1c:3bd5:0:b0:38c:9b9f:1b24 with SMTP id i204-20020a1c3bd5000000b0038c9b9f1b24mr8259573wma.129.1647875873890; Mon, 21 Mar 2022 08:17:53 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:53 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 08/18] clk: qcom: krait-cc: convert to parent_data API Date: Mon, 21 Mar 2022 15:48:15 +0100 Message-Id: <20220321144825.11736-9-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Modernize the krait-cc driver to parent-data API and refactor to drop any use of clk_names. From Documentation all the required clocks should be declared in DTS so fw_name can be correctly used to get the parents for all the muxes. Name is also declared to save compatibility with old implementation. Also fix the parent order of the sec_mux that was wrong and incorrectly report the wrong safe parent if it's not hardcoded. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/krait-cc.c | 126 +++++++++++++++++++----------------- 1 file changed, 66 insertions(+), 60 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 4d4b657d33c3..645ad9e8dd73 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -69,21 +69,22 @@ static int krait_notifier_register(struct device *dev, struct clk *clk, return ret; } -static int +static struct clk * krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) { struct krait_div2_clk *div; + static struct clk_parent_data p_data[1]; struct clk_init_data init = { - .num_parents = 1, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_div2_clk_ops, .flags = CLK_SET_RATE_PARENT, }; - const char *p_names[1]; struct clk *clk; + char *parent_name; div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); if (!div) - return -ENOMEM; + return ERR_PTR(-ENOMEM); div->width = 2; div->shift = 6; @@ -93,43 +94,49 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); - init.parent_names = p_names; - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { - kfree(init.name); - return -ENOMEM; + init.parent_data = p_data; + parent_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!parent_name) { + clk = ERR_PTR(-ENOMEM); + goto err_parent_name; } + p_data[0].fw_name = parent_name; + p_data[0].name = parent_name; + clk = devm_clk_register(dev, &div->hw); - kfree(p_names[0]); + + kfree(parent_name); +err_parent_name: kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return clk; } -static int +static struct clk * krait_add_sec_mux(struct device *dev, int id, const char *s, unsigned int offset, bool unique_aux) { int ret; struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { - "acpu_aux", - "qsb", + static struct clk_parent_data sec_mux_list[2] = { + { .name = "qsb", .fw_name = "qsb" }, + {}, }; struct clk_init_data init = { - .parent_names = sec_mux_list, + .parent_data = sec_mux_list, .num_parents = ARRAY_SIZE(sec_mux_list), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; struct clk *clk; + char *parent_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) - return -ENOMEM; + return ERR_PTR(-ENOMEM); mux->offset = offset; mux->lpl = id >= 0; @@ -141,44 +148,51 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) - return -ENOMEM; + return ERR_PTR(-ENOMEM); if (unique_aux) { - sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); - if (!sec_mux_list[0]) { + parent_name = kasprintf(GFP_KERNEL, "acpu%s_aux", s); + if (!parent_name) { clk = ERR_PTR(-ENOMEM); goto err_aux; } + sec_mux_list[1].fw_name = parent_name; + sec_mux_list[1].name = parent_name; + } else { + sec_mux_list[1].name = "apu_aux"; } clk = devm_clk_register(dev, &mux->hw); + if (IS_ERR(clk)) + goto err_clk; ret = krait_notifier_register(dev, clk, mux); if (ret) - goto unique_aux; + clk = ERR_PTR(ret); -unique_aux: +err_clk: if (unique_aux) - kfree(sec_mux_list[0]); + kfree(parent_name); err_aux: kfree(init.name); - return PTR_ERR_OR_ZERO(clk); + return clk; } static struct clk * -krait_add_pri_mux(struct device *dev, int id, const char *s, - unsigned int offset) +krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux, + int id, const char *s, unsigned int offset) { int ret; struct krait_mux_clk *mux; - const char *p_names[3]; + static struct clk_parent_data p_data[3]; struct clk_init_data init = { - .parent_names = p_names, - .num_parents = ARRAY_SIZE(p_names), + .parent_data = p_data, + .num_parents = ARRAY_SIZE(p_data), .ops = &krait_mux_clk_ops, .flags = CLK_SET_RATE_PARENT, }; struct clk *clk; + char *hfpll_name; mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); if (!mux) @@ -196,36 +210,29 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, if (!init.name) return ERR_PTR(-ENOMEM); - p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); - if (!p_names[0]) { + hfpll_name = kasprintf(GFP_KERNEL, "hfpll%s", s); + if (!hfpll_name) { clk = ERR_PTR(-ENOMEM); - goto err_p0; + goto err_hfpll; } - p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); - if (!p_names[1]) { - clk = ERR_PTR(-ENOMEM); - goto err_p1; - } + p_data[0].fw_name = hfpll_name; + p_data[0].name = hfpll_name; - p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); - if (!p_names[2]) { - clk = ERR_PTR(-ENOMEM); - goto err_p2; - } + p_data[1].hw = __clk_get_hw(hfpll_div); + p_data[2].hw = __clk_get_hw(sec_mux); clk = devm_clk_register(dev, &mux->hw); + if (IS_ERR(clk)) + goto err_clk; ret = krait_notifier_register(dev, clk, mux); if (ret) - goto err_p3; -err_p3: - kfree(p_names[2]); -err_p2: - kfree(p_names[1]); -err_p1: - kfree(p_names[0]); -err_p0: + clk = ERR_PTR(ret); + +err_clk: + kfree(hfpll_name); +err_hfpll: kfree(init.name); return clk; } @@ -233,11 +240,10 @@ krait_add_pri_mux(struct device *dev, int id, const char *s, /* id < 0 for L2, otherwise id == physical CPU number */ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) { - int ret; unsigned int offset; void *p = NULL; const char *s; - struct clk *clk; + struct clk *hfpll_div, *sec_mux, *clk; if (id >= 0) { offset = 0x4501 + (0x1000 * id); @@ -249,19 +255,19 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) s = "_l2"; } - ret = krait_add_div(dev, id, s, offset); - if (ret) { - clk = ERR_PTR(ret); + hfpll_div = krait_add_div(dev, id, s, offset); + if (IS_ERR(hfpll_div)) { + clk = hfpll_div; goto err; } - ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); - if (ret) { - clk = ERR_PTR(ret); + sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); + if (IS_ERR(sec_mux)) { + clk = sec_mux; goto err; } - clk = krait_add_pri_mux(dev, id, s, offset); + clk = krait_add_pri_mux(dev, hfpll_div, sec_mux, id, s, offset); err: kfree(p); return clk; From patchwork Mon Mar 21 14:48:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787354 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 946F5C43217 for ; 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[93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:54 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 09/18] clk: qcom: krait-cc: drop pr_info and register qsb only if needed Date: Mon, 21 Mar 2022 15:48:16 +0100 Message-Id: <20220321144825.11736-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Replace pr_info() with dev_info() to provide better diagnostics. Register qsb fixed clk only if it's not declared in DTS. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/krait-cc.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 645ad9e8dd73..e9508e3104ea 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -308,7 +308,9 @@ static int krait_cc_probe(struct platform_device *pdev) return -ENODEV; /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */ - clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); + if (IS_ERR(clk_get(dev, "qsb"))) + clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); + if (IS_ERR(clk)) return PTR_ERR(clk); @@ -363,25 +365,25 @@ static int krait_cc_probe(struct platform_device *pdev) cur_rate = clk_get_rate(l2_pri_mux_clk); aux_rate = 384000000; if (cur_rate == 1) { - pr_info("L2 @ QSB rate. Forcing new rate.\n"); + dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n"); cur_rate = aux_rate; } clk_set_rate(l2_pri_mux_clk, aux_rate); clk_set_rate(l2_pri_mux_clk, 2); clk_set_rate(l2_pri_mux_clk, cur_rate); - pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); + dev_info(dev, "L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); for_each_possible_cpu(cpu) { clk = clks[cpu]; cur_rate = clk_get_rate(clk); if (cur_rate == 1) { - pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); + dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu); cur_rate = aux_rate; } clk_set_rate(clk, aux_rate); clk_set_rate(clk, 2); clk_set_rate(clk, cur_rate); - pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); + dev_info(dev, "CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); } of_clk_add_provider(dev->of_node, krait_of_get, clks); From patchwork Mon Mar 21 14:48:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AA0EC4332F for ; Mon, 21 Mar 2022 15:18:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350019AbiCUPTh (ORCPT ); Mon, 21 Mar 2022 11:19:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350003AbiCUPTf (ORCPT ); Mon, 21 Mar 2022 11:19:35 -0400 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CB972DD9; Mon, 21 Mar 2022 08:17:57 -0700 (PDT) Received: by mail-wr1-x42f.google.com with SMTP id j18so11531503wrd.6; Mon, 21 Mar 2022 08:17:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=HxwJ/rmGXQIKgHQmjTVr7v/2TGpe+xuVVbkVjt0eYLU=; b=elB8X7nDW+MCLKa9DYw38ucoZJeNYT/mBKbWmpO7aQGPhKN6IifyAQ+EjgVjj44Wn9 8AiGW8J6SxU25VXd4ErZ2CwwLHZhoaE2ejNPN3PFKp1cOetjW/cExoMcTtcT2hZF68r+ 3bxosGU5JKSAOj4HwzQOCbemoydE9YEvJC2VZTVrDCuFkDysQ+tvc3u4djzoqWj25IeE xqPntVruHnfVx+GoRlTMV+2g7dwYLryncUe3P/+ganMhjEp4Y4shNHx8rdPZGXh6qfDc mTUYmxKh/ry2vECAac8JgzVZwoTQQ/tiHeoQxb7dGYCkNeXGYJQD0jpXyztfu+cteEck PH5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HxwJ/rmGXQIKgHQmjTVr7v/2TGpe+xuVVbkVjt0eYLU=; b=ka2Fa6tAGNTqPnCcOZrnIhd0oc7gma90VVSp/r/gHdjkJqvT6BGnYBr8Adq7ci5oms fD1kJIi/42ikZ5bkdCh1d33xRVgwxjFVd0lCX4vITl3o+VHFKttuv4tq4J8gU+i5ZaXx XX9SbvtVhTLSffo+gy9dGUoMNQnQePq+0Jc0xXHpZUD2PtIAHqiWEwFpEgBoAE8lLWZF +i6sss+3XNOZYSAbC+PnlhOL1SCv0kxhwlv1E+xVrdJkWozXNO5q1RjoDEb7yWeJd6MS mmEqbVMALUTAonwjgArG6q9DbGNEAPWqbUdyNtwgNBv9fq6xxHuuw0yOYb99IbB8W95S 9ygw== X-Gm-Message-State: AOAM532zrp4yxdDtQc4v+WnOeUZ6JDR6xTjlEDL//JK1N/zP5Kk3RNeT 6lrsLgqoCzVXcVaC67ryhU0= X-Google-Smtp-Source: ABdhPJzZEeP7++6AWrLhVXszsuuwVS5RmvIXm9G7Lu9YwPqV/jWYRJ1F6Q68zgbw4McJrq157/6UDA== X-Received: by 2002:a5d:6da8:0:b0:1f1:fa31:e7f7 with SMTP id u8-20020a5d6da8000000b001f1fa31e7f7mr18991643wrs.389.1647875876226; Mon, 21 Mar 2022 08:17:56 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:55 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 10/18] clk: qcom: krait-cc: drop hardcoded safe_sel Date: Mon, 21 Mar 2022 15:48:17 +0100 Message-Id: <20220321144825.11736-11-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Drop hardcoded safe_sel definition and use helper to correctly calculate it. We assume qsb clk is always present as it should be declared in DTS per Documentation and in the absence of that, it's declared as a fixed clk. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/krait-cc.c | 40 +++++++++++++++++++++++++------------ 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index e9508e3104ea..5f98ee1c3681 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -26,6 +26,17 @@ static unsigned int pri_mux_map[] = { 0, }; +static u8 krait_get_mux_sel(struct krait_mux_clk *mux, struct clk *safe_clk) +{ + struct clk_hw *safe_hw = __clk_get_hw(safe_clk); + + /* + * We can ignore errors from clk_hw_get_index_of_parent() + * as we create these parents in this driver. + */ + return clk_hw_get_index_of_parent(&mux->hw, safe_hw); +} + /* * Notifier function for switching the muxes to safe parent * while the hfpll is getting reprogrammed. @@ -116,8 +127,8 @@ krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) } static struct clk * -krait_add_sec_mux(struct device *dev, int id, const char *s, - unsigned int offset, bool unique_aux) +krait_add_sec_mux(struct device *dev, struct clk *qsb, int id, + const char *s, unsigned int offset, bool unique_aux) { int ret; struct krait_mux_clk *mux; @@ -144,7 +155,6 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, mux->shift = 2; mux->parent_map = sec_mux_map; mux->hw.init = &init; - mux->safe_sel = 0; init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) @@ -166,6 +176,7 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, if (IS_ERR(clk)) goto err_clk; + mux->safe_sel = krait_get_mux_sel(mux, qsb); ret = krait_notifier_register(dev, clk, mux); if (ret) clk = ERR_PTR(ret); @@ -204,7 +215,6 @@ krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux mux->lpl = id >= 0; mux->parent_map = pri_mux_map; mux->hw.init = &init; - mux->safe_sel = 2; init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s); if (!init.name) @@ -226,6 +236,7 @@ krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux if (IS_ERR(clk)) goto err_clk; + mux->safe_sel = krait_get_mux_sel(mux, sec_mux); ret = krait_notifier_register(dev, clk, mux); if (ret) clk = ERR_PTR(ret); @@ -238,7 +249,9 @@ krait_add_pri_mux(struct device *dev, struct clk *hfpll_div, struct clk *sec_mux } /* id < 0 for L2, otherwise id == physical CPU number */ -static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) +static struct clk * +krait_add_clks(struct device *dev, struct clk *qsb, int id, + bool unique_aux) { unsigned int offset; void *p = NULL; @@ -261,7 +274,7 @@ static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) goto err; } - sec_mux = krait_add_sec_mux(dev, id, s, offset, unique_aux); + sec_mux = krait_add_sec_mux(dev, qsb, id, s, offset, unique_aux); if (IS_ERR(sec_mux)) { clk = sec_mux; goto err; @@ -301,18 +314,19 @@ static int krait_cc_probe(struct platform_device *pdev) int cpu; struct clk *clk; struct clk **clks; - struct clk *l2_pri_mux_clk; + struct clk *l2_pri_mux_clk, *qsb; id = of_match_device(krait_cc_match_table, dev); if (!id) return -ENODEV; /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */ - if (IS_ERR(clk_get(dev, "qsb"))) - clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); + qsb = clk_get(dev, "qsb"); + if (IS_ERR(qsb)) + qsb = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); - if (IS_ERR(clk)) - return PTR_ERR(clk); + if (IS_ERR(qsb)) + return PTR_ERR(qsb); if (!id->data) { clk = clk_register_fixed_factor(dev, "acpu_aux", @@ -327,13 +341,13 @@ static int krait_cc_probe(struct platform_device *pdev) return -ENOMEM; for_each_possible_cpu(cpu) { - clk = krait_add_clks(dev, cpu, id->data); + clk = krait_add_clks(dev, qsb, cpu, id->data); if (IS_ERR(clk)) return PTR_ERR(clk); clks[cpu] = clk; } - l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); + l2_pri_mux_clk = krait_add_clks(dev, qsb, -1, id->data); if (IS_ERR(l2_pri_mux_clk)) return PTR_ERR(l2_pri_mux_clk); clks[4] = l2_pri_mux_clk; From patchwork Mon Mar 21 14:48:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787358 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25F70C4332F for ; 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[93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:56 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 11/18] clk: qcom: krait-cc: force sec_mux to QSB Date: Mon, 21 Mar 2022 15:48:18 +0100 Message-Id: <20220321144825.11736-12-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Now that we have converted every driver to parent_data, it was notice that the bootloader can't really leave the system in a strange state where l2 or the cpu0/1 can be sourced in a number of ways for example cpu1 sourcing out of qsb, l2 sourcing out of pxo. To correctly reset the mux and the HFPLL force the sec_mux to QSB. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/krait-cc.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 5f98ee1c3681..299eb4c81d96 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -15,6 +15,8 @@ #include "clk-krait.h" +#define QSB_RATE 1 + static unsigned int sec_mux_map[] = { 2, 0, @@ -181,6 +183,13 @@ krait_add_sec_mux(struct device *dev, struct clk *qsb, int id, if (ret) clk = ERR_PTR(ret); + /* + * Force the sec_mux to be set to QSB rate. + * This is needed to correctly set the parents and + * to later reset mux and HFPLL to a known freq. + */ + clk_set_rate(clk, QSB_RATE); + err_clk: if (unique_aux) kfree(parent_name); @@ -378,7 +387,7 @@ static int krait_cc_probe(struct platform_device *pdev) */ cur_rate = clk_get_rate(l2_pri_mux_clk); aux_rate = 384000000; - if (cur_rate == 1) { + if (cur_rate == QSB_RATE) { dev_info(dev, "L2 @ QSB rate. Forcing new rate.\n"); cur_rate = aux_rate; } @@ -389,7 +398,7 @@ static int krait_cc_probe(struct platform_device *pdev) for_each_possible_cpu(cpu) { clk = clks[cpu]; cur_rate = clk_get_rate(clk); - if (cur_rate == 1) { + if (cur_rate == QSB_RATE) { dev_info(dev, "CPU%d @ QSB rate. Forcing new rate.\n", cpu); cur_rate = aux_rate; } From patchwork Mon Mar 21 14:48:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787357 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 849A6C4332F for ; Mon, 21 Mar 2022 15:18:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350030AbiCUPTz (ORCPT ); Mon, 21 Mar 2022 11:19:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350031AbiCUPTi (ORCPT ); Mon, 21 Mar 2022 11:19:38 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4EC8DE9B; Mon, 21 Mar 2022 08:17:59 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id r64so8744973wmr.4; Mon, 21 Mar 2022 08:17:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=/RImxULSEIcXltj7eh82B63gODFmYdSpUPrpbmj5VVA=; b=lIfhCzfLy8lVMkI9i0S4a71CBpAv9SaZaRLEDlF+6tJ5tmic3SPtgrWRverjRbYJeH dDqcknMKxkpjvodnvkpudHSm4Rd2ona7SEar7+5fCeVOjQyFJ9ub+O71DTS5vSE1rjDB 9kHtT26WwecZakYkCO6mIuFQH7KW3yoQkmnXK7uFVQ/+mO9RWU94puTNaP12WUizuVh3 wAGHx1bS0vsUBkJbDCLzDc3pJwGO6Qn1TFqyKVkYcJopt3shwNPldg1m0w7HBDbHRN0P XIQQZiIT8XrdBiPA/ZpORssziaQGW/zsVu6xhbQQE1E3jSK3CB1iOjqeorvCTX5kZaf5 RXDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/RImxULSEIcXltj7eh82B63gODFmYdSpUPrpbmj5VVA=; b=cQ/+dv9k+am1beKE4avwPPYtF066PbXFwt/IZoVfKHrATbJArL3lQifm9cId0eA8Mt gHEYtL5xbUFvV1q1KpSI036NBsq9k7TNI2umboDPgUD6iR5R7cbONEhdzbDIwjdNk43k U0Q7BVUibh25arjhB7Q6zHcGGSkOuSjRlhbtolLyTMXSt986n4dKiN2UXuNCvtWg6SYL OZa4Aejiyc+BPG2bnISzkJxzTCLdh1v/AfRhY151AwwqS5emU3spigeXjosaQsrlEuPY CZjhwINgiQk3WYgqzL9E0BvIXUwyNXCVsGP4GDMuzfmtckPox+T6mSIWQIV03AX6nRvk yWLw== X-Gm-Message-State: AOAM5301cQsyuQbjNN5vUUrf3JR9SEdnFOAzbkXZ5HaDya2JHo36dKmJ qLHF/pH9nu0L5bdD+Y9skI0= X-Google-Smtp-Source: ABdhPJzhD6tELuW4WMixBD8AkcvV6OyRV79msPVV3nDOS83g1aP3X5KQagC/ktozrtTnxm5EFTfHSw== X-Received: by 2002:a05:600c:3506:b0:389:d567:e9fa with SMTP id h6-20020a05600c350600b00389d567e9famr19837957wmq.74.1647875878315; Mon, 21 Mar 2022 08:17:58 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:57 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 12/18] clk: qcom: clk-krait: add apq/ipq8064 errata workaround Date: Mon, 21 Mar 2022 15:48:19 +0100 Message-Id: <20220321144825.11736-13-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add apq/ipq8064 errata workaround where the sec_src clock gating needs to be disabled during switching. To enable this set disable_sec_src_gating in the mux struct. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++ drivers/clk/qcom/clk-krait.h | 1 + drivers/clk/qcom/krait-cc.c | 1 + 3 files changed, 18 insertions(+) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index b6b7650dbf15..7ba5dbc72bce 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -18,13 +18,23 @@ static DEFINE_SPINLOCK(krait_clock_reg_lock); #define LPL_SHIFT 8 +#define SECCLKAGD BIT(4) + static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) { unsigned long flags; u32 regval; spin_lock_irqsave(&krait_clock_reg_lock, flags); + regval = krait_get_l2_indirect_reg(mux->offset); + + /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */ + if (mux->disable_sec_src_gating) { + regval |= SECCLKAGD; + krait_set_l2_indirect_reg(mux->offset, regval); + } + regval &= ~(mux->mask << mux->shift); regval |= (sel & mux->mask) << mux->shift; if (mux->lpl) { @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) } krait_set_l2_indirect_reg(mux->offset, regval); + /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */ + if (mux->disable_sec_src_gating) { + regval &= ~SECCLKAGD; + krait_set_l2_indirect_reg(mux->offset, regval); + } + /* Wait for switch to complete. */ mb(); udelay(1); diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h index 9120bd2f5297..f930538c539e 100644 --- a/drivers/clk/qcom/clk-krait.h +++ b/drivers/clk/qcom/clk-krait.h @@ -15,6 +15,7 @@ struct krait_mux_clk { u8 safe_sel; u8 old_index; bool reparent; + bool disable_sec_src_gating; struct clk_hw hw; struct notifier_block clk_nb; diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index 299eb4c81d96..cb8b267f1dc5 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -157,6 +157,7 @@ krait_add_sec_mux(struct device *dev, struct clk *qsb, int id, mux->shift = 2; mux->parent_map = sec_mux_map; mux->hw.init = &init; + mux->disable_sec_src_gating = true; init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); if (!init.name) From patchwork Mon Mar 21 14:48:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787356 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED08EC433FE for ; Mon, 21 Mar 2022 15:18:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350034AbiCUPTx (ORCPT ); Mon, 21 Mar 2022 11:19:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349998AbiCUPTp (ORCPT ); Mon, 21 Mar 2022 11:19:45 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15894DF35; Mon, 21 Mar 2022 08:18:00 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id v22so7253555wra.2; Mon, 21 Mar 2022 08:18:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=QkfgyebL6ZDeFyix3jLmVd6pOSFa+uhSyC95dgb9bxk=; b=cZz0U/iOVfloYC4f/0atTNYv/Stene+gmHS7w3Adc4pxem/fX5HAIxC/NtEd9nhtUa VVghCrlDb4OzRIUWSEGNha9hQZT/VZwfpKh4BO3fud8x5E8amyIdKcNWHGCDK4KGIk7v Xw+RbNvXMZkggipNI41PC4ZZFYwGLXMlSXoiJJXb/JBzlf16wtm1MXn7I60cn2hhz83t 5LSDo63LqpTaIedlAirVU5DtEx+OY594kuIM0HTJbknFJzgdSO5H36Fy8mHwy/GShQYQ zYLkCZ3UbBzMD04kfLRgrCjsp1AD7ylSOwEaR636nd30lCTeC5LYEMV1ffbFIk4pj8bz ePrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QkfgyebL6ZDeFyix3jLmVd6pOSFa+uhSyC95dgb9bxk=; b=6gIW3hzwHPX7h9sRM+z2OFporGlJU+luHZLW4mAPf1Z+EShbd+nZZrCGeFkbOcyGbb r8MzoyDcVUaGEVBotTVm7NgQ20ciFDv7XHInV5c01doO3N8/VKdkXFfjBjl14uomsJKt 5MiEtIeNypbn8QYpOo1yLW3CPMfa72RtUv+3TxSY60fF3e8HS3Y6kvnwvjNSrwLiaiNf vtCYjZqNcb0SALBX2YoexSJbg3M4ErVaa9WaPnhgBKUnuuOrZamLQRxwR2LCpSmYR/BW IxNWo7cMTNyFkJYICnV4mm/bW26TN6VMw/KUPCRmAnwWdF83bUhlPfL/r0L/w5L5Q9tr 8/JA== X-Gm-Message-State: AOAM532w3cVjWfRWAEArAu6sLr9n3Cc57pDKKBW/HYpQ7Cezpg6+tKBy 0htIqbQt9YNW16MX03jJVVI= X-Google-Smtp-Source: ABdhPJxMbMXydtFMNDRzOikc97iALRWa2BHY78yEDBsHK90MSNPoteJbnFWvEKyH3mW9aeeUucyS4w== X-Received: by 2002:a5d:4890:0:b0:1ed:9d4e:f8ef with SMTP id g16-20020a5d4890000000b001ed9d4ef8efmr18962564wrq.595.1647875879268; Mon, 21 Mar 2022 08:17:59 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:58 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 13/18] clk: qcom: clk-krait: add enable disable ops Date: Mon, 21 Mar 2022 15:48:20 +0100 Message-Id: <20220321144825.11736-14-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add enable/disable ops for krait mux. On disable the mux is set to the safe selection. Signed-off-by: Ansuel Smith --- drivers/clk/qcom/clk-krait.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c index 7ba5dbc72bce..061af57b0ec2 100644 --- a/drivers/clk/qcom/clk-krait.c +++ b/drivers/clk/qcom/clk-krait.c @@ -85,7 +85,25 @@ static u8 krait_mux_get_parent(struct clk_hw *hw) return clk_mux_val_to_index(hw, mux->parent_map, 0, sel); } +static int krait_mux_enable(struct clk_hw *hw) +{ + struct krait_mux_clk *mux = to_krait_mux_clk(hw); + + __krait_mux_set_sel(mux, mux->en_mask); + + return 0; +} + +static void krait_mux_disable(struct clk_hw *hw) +{ + struct krait_mux_clk *mux = to_krait_mux_clk(hw); + + __krait_mux_set_sel(mux, mux->safe_sel); +} + const struct clk_ops krait_mux_clk_ops = { + .enable = krait_mux_enable, + .disable = krait_mux_disable, .set_parent = krait_mux_set_parent, .get_parent = krait_mux_get_parent, .determine_rate = __clk_mux_determine_rate_closest, From patchwork Mon Mar 21 14:48:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0321C433EF for ; Mon, 21 Mar 2022 15:18:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349961AbiCUPUK (ORCPT ); Mon, 21 Mar 2022 11:20:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350063AbiCUPTr (ORCPT ); Mon, 21 Mar 2022 11:19:47 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BD2B2BDB; Mon, 21 Mar 2022 08:18:02 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id q8so9804323wrc.0; Mon, 21 Mar 2022 08:18:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=31lps4Y21piTFXnOFtNqGqL08nWOpZSPVGhTdbNgLbg=; b=mDnw/cUqMU6dauqrttWkO3pJEkG+CjnaG4Y9w9THrckWQKJpWwO8uNzRWGCrTCdC46 gvIjBC6gYJBq0zuuqxF3dahB6oxfxFpcOpN1cUc824mx+mStw4YMCO0NjPVRJ0YqNW24 CZm3CHX80oMuUTOm+pdtDLKV+L8t1BjWYCo6A/v2hq41UL/Atu16xKfQ23Szy5UUZmTJ HR8pRdlpjwXJt6re+EuxrodALxHJI3/zCBR5HbaCJJKNApRt+i997r79NrrfWnBEzFXc 3K49Ypy8mgRZjN8ElxAY3brGjjLPIIeVhizG2yAciHU3domSSTgYq6yK5pKpSx4b4I2P 6ASg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=31lps4Y21piTFXnOFtNqGqL08nWOpZSPVGhTdbNgLbg=; b=1OJvclOWxKCT+8biyX+KkjCyWjD7CsGN/H9/sDvGn0LLCBvsWPy5FK1f81T2qj31Ul OKWKHn91p3S1lQl/a4X4r1OW9DIsN2vgb8WsoHoYE7RMyxDQeRs6ssSIU4LO+iP0dq1L s6KlCgB0ax7maArEgUAiH3j7gesOlSHkL9LBscAqGbDanAJwFJylwVGJNNDZs0DnJn7v MW//JFFekEl64nAvKMEe/aH52ti71aB/qf9/HfAv/2OS+S+hkJZvc5JVQkrMCxPi0XV6 qiXSG1Zc3/J6wNa0oM75NPjVX5EmCd1AitU/3bX8cxkhpls0SShLAoctVctGmpYS9cG6 loaQ== X-Gm-Message-State: AOAM533mL4w07gfmPegUqQCHAk/IIp9PASqhzCBQwNMRgabctvji+x3k K9+ujNrQA+lx3T4OpIs44Ew= X-Google-Smtp-Source: ABdhPJwiZtXwDHK2dAwaBHRjkGQ6pZeR+SFSW9i15vQuhr91BATdi7sDdqRDbqr/6lBaAZLo2c7G8Q== X-Received: by 2002:a05:6000:1e1e:b0:204:203:73ba with SMTP id bj30-20020a0560001e1e00b00204020373bamr8506072wrb.445.1647875880388; Mon, 21 Mar 2022 08:18:00 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.17.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:17:59 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 14/18] dt-bindings: clock: Convert qcom,krait-cc to yaml Date: Mon, 21 Mar 2022 15:48:21 +0100 Message-Id: <20220321144825.11736-15-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert qcom,krait-cc to yaml Documentation. Signed-off-by: Ansuel Smith Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/qcom,krait-cc.txt | 34 ----------- .../bindings/clock/qcom,krait-cc.yaml | 59 +++++++++++++++++++ 2 files changed, 59 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.txt create mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt b/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt deleted file mode 100644 index 030ba60dab08..000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt +++ /dev/null @@ -1,34 +0,0 @@ -Krait Clock Controller - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,krait-cc-v1" - "qcom,krait-cc-v2" - -- #clock-cells: - Usage: required - Value type: - Definition: must be 1 - -- clocks: - Usage: required - Value type: - Definition: reference to the clock parents of hfpll, secondary muxes. - -- clock-names: - Usage: required - Value type: - Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb". - -Example: - - kraitcc: clock-controller { - compatible = "qcom,krait-cc-v1"; - clocks = <&hfpll0>, <&hfpll1>, <&acpu0_aux>, <&acpu1_aux>, ; - clock-names = "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb"; - #clock-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml new file mode 100644 index 000000000000..e879bfbe67ac --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,krait-cc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Krait Clock Controller + +maintainers: + - Ansuel Smith + +description: | + Qualcomm Krait Clock Controller used to correctly scale the CPU and the L2 + rates. + +properties: + compatible: + enum: + - qcom,krait-cc-v1 + - qcom,krait-cc-v2 + + clocks: + items: + - description: phandle to hfpll for CPU0 mux + - description: phandle to hfpll for CPU1 mux + - description: phandle to CPU0 aux clock + - description: phandle to CPU1 aux clock + - description: phandle to QSB fixed clk + + clock-names: + items: + - const: hfpll0 + - const: hfpll1 + - const: acpu0_aux + - const: acpu1_aux + - const: qsb + + '#clock-cells': + const: 1 + +required: + - compatible + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller { + compatible = "qcom,krait-cc-v1"; + clocks = <&hfpll0>, <&hfpll1>, + <&acpu0_aux>, <&acpu1_aux>, <&qsb>; + clock-names = "hfpll0", "hfpll1", + "acpu0_aux", "acpu1_aux", "qsb"; + #clock-cells = <1>; + }; +... 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[93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.18.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:18:01 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 15/18] dt-bindings: clock: Add L2 clocks to qcom,krait-cc Documentation Date: Mon, 21 Mar 2022 15:48:22 +0100 Message-Id: <20220321144825.11736-16-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Krait-cc qcom driver provide also L2 clocks and require the acpu_l2_aux and the hfpll_l2 clock to be provided. Add these missing clocks to the Documentation. Signed-off-by: Ansuel Smith Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/clock/qcom,krait-cc.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml index e879bfbe67ac..f89b70ab01ae 100644 --- a/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.yaml @@ -23,16 +23,20 @@ properties: items: - description: phandle to hfpll for CPU0 mux - description: phandle to hfpll for CPU1 mux + - description: phandle to hfpll for L2 mux - description: phandle to CPU0 aux clock - description: phandle to CPU1 aux clock + - description: phandle to L2 aux clock - description: phandle to QSB fixed clk clock-names: items: - const: hfpll0 - const: hfpll1 + - const: hfpll_l2 - const: acpu0_aux - const: acpu1_aux + - const: acpu_l2_aux - const: qsb '#clock-cells': @@ -50,10 +54,10 @@ examples: - | clock-controller { compatible = "qcom,krait-cc-v1"; - clocks = <&hfpll0>, <&hfpll1>, - <&acpu0_aux>, <&acpu1_aux>, <&qsb>; - clock-names = "hfpll0", "hfpll1", - "acpu0_aux", "acpu1_aux", "qsb"; + clocks = <&hfpll0>, <&hfpll1>, <&hfpll_l2>, + <&acpu0_aux>, <&acpu1_aux>, <&acpu_l2_aux>, <&qsb>; + clock-names = "hfpll0", "hfpll1", "hfpll_l2", + "acpu0_aux", "acpu1_aux", "acpu_l2_aux", "qsb"; #clock-cells = <1>; }; ... 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[93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.18.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:18:02 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 16/18] ARM: dts: qcom: qcom-ipq8064: add missing krait-cc compatible and clocks Date: Mon, 21 Mar 2022 15:48:23 +0100 Message-Id: <20220321144825.11736-17-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add missing krait-cc clock-controller and define missing aux clock for CPUs. Also change phandle for l2cc node to point to pxo_board instead of gcc PXO_SRC. Signed-off-by: Ansuel Smith --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 996f4458d9fc..888f17d64283 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -468,11 +468,19 @@ IRQ_TYPE_EDGE_RISING)>, acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu0_aux"; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + #clock-cells = <0>; }; acc1: clock-controller@2098000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clock-output-names = "acpu1_aux"; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + #clock-cells = <0>; }; adm_dma: dma-controller@18300000 { @@ -782,11 +790,21 @@ tcsr: syscon@1a400000 { l2cc: clock-controller@2011000 { compatible = "qcom,kpss-gcc", "syscon"; reg = <0x2011000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; clock-names = "pll8_vote", "pxo"; clock-output-names = "acpu_l2_aux"; }; + kraitcc: clock-controller { + compatible = "qcom,krait-cc-v1"; + clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>, + <&acc0>, <&acc1>, <&l2cc>, <&qsb>; + clock-names = "hfpll0", "hfpll1", "hfpll_l2", + "acpu0_aux", "acpu1_aux", "acpu_l2_aux", + "qsb"; + #clock-cells = <1>; + }; + lcc: clock-controller@28000000 { compatible = "qcom,lcc-ipq8064"; reg = <0x28000000 0x1000>; From patchwork Mon Mar 21 14:48:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12787360 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FE78C433F5 for ; Mon, 21 Mar 2022 15:18:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350101AbiCUPUK (ORCPT ); Mon, 21 Mar 2022 11:20:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350056AbiCUPTr (ORCPT ); Mon, 21 Mar 2022 11:19:47 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4433031211; Mon, 21 Mar 2022 08:18:05 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id d7so21162498wrb.7; Mon, 21 Mar 2022 08:18:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=bWYd0ZpRAfAuB31BLlnofWY+miD3D1gba77XW/wHzGs=; b=ZObiOeh4gNAfK89eNiUBnF9jWtBmc5DiUZ6mX8+8vNFaQ0BJwnMKX0PH7lmyV9xRyn EvI5CWdKI5Iz594OTrSIexoxOZEeU3bD4EKHccr0hbwuVqI7h2985p5dmcq2aI+CCtXB vIBx8eXM1YmfBGh6d4b+gGrZexMV4EC4kEmTVNrGHJjAdh6Y37Nb9eUQqz1L7TbpgxO/ QYyWS3iJxItCakNc4kNNdWNJYpWVzwp3cskrD2BkSVakhTb2tUm6nHClat4MhMAhkaYn bPOMTEE0KmYsaPxZdeOHIqxzqJV8SVOUFRDere9HZJ1PWPrLVonEWDycmnhz9zIlET/E 6Y2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bWYd0ZpRAfAuB31BLlnofWY+miD3D1gba77XW/wHzGs=; b=UQm7lMy66Jy1TvnChdtE2BSpNDs2Vx6URBnoY4xBgxaQYNdpeuFj8d5/Z5WjgS0sCO tQZ/9xY5io+ORJgXVhcgq9nc0W3XHxNsY1RlP+vmMvJfZ3dHyltxfNooPkh60quCAfX4 BcZXwcCzH8jmPEyRbQ8txCm5TtlMgxKxC5/RaHTjPHRTOm4DtceXzp1CJF5SOO7fLYmw KZowat8U50WzYbaaupmX8AoqdaPkkB/F1mOW9VgRyyiC+zfizmjexC1ameP6vUCj1Td/ YNSB6+vDhPQ6SsGNBe2vNOICC+DuG7PpokAZPXFOZ5s/VuV/WQrMiQVK0nssCZjfVsBr DozA== X-Gm-Message-State: AOAM532CuQMawBeLQCvKp92+9EQTjS4eVVOWxabpkMxGRI4csi919VOs 5LWuLB/NAAX76NrcjJ0NCV+uWOzPKe8= X-Google-Smtp-Source: ABdhPJwm3eMCK7nuhCEXZAxv63oO6n86SXHhOzWW0VwTUpcHvrbm6/Jw/bPr6AvmUSYgnXbtFxO/nA== X-Received: by 2002:a05:6000:128f:b0:1f1:e586:87af with SMTP id f15-20020a056000128f00b001f1e58687afmr18728049wrx.222.1647875883534; Mon, 21 Mar 2022 08:18:03 -0700 (PDT) Received: from Ansuel-xps.localdomain (93-42-69-170.ip85.fastwebnet.it. [93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.18.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:18:03 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 17/18] dt-bindings: arm: msm: Convert kpss-acc driver Documentation to yaml Date: Mon, 21 Mar 2022 15:48:24 +0100 Message-Id: <20220321144825.11736-18-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert kpss-acc driver Documentation to yaml. The original Documentation was wrong all along. Fix it while we are converting it. The example was wrong as kpss-acc-v2 should only expose the regs but we don't have any driver that expose additional clocks. The kpss-acc driver is only specific to v1. For this exact reason, limit all the additional bindings to v1. Signed-off-by: Ansuel Smith --- .../bindings/arm/msm/qcom,kpss-acc.txt | 49 ----------- .../bindings/arm/msm/qcom,kpss-acc.yaml | 88 +++++++++++++++++++ 2 files changed, 88 insertions(+), 49 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt deleted file mode 100644 index 7f696362a4a1..000000000000 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt +++ /dev/null @@ -1,49 +0,0 @@ -Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) - -The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. -There is one ACC register region per CPU within the KPSS remapped region as -well as an alias register region that remaps accesses to the ACC associated -with the CPU accessing the region. - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: should be one of: - "qcom,kpss-acc-v1" - "qcom,kpss-acc-v2" - -- reg: - Usage: required - Value type: - Definition: the first element specifies the base address and size of - the register region. An optional second element specifies - the base address and size of the alias register region. - -- clocks: - Usage: required - Value type: - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: optional - Value type: - Definition: Name of the output clock. Typically acpuX_aux where X is a - CPU number starting at 0. - -Example: - - clock-controller@2088000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0x02088000 0x1000>, - <0x02008000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu0_aux"; - }; diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml new file mode 100644 index 000000000000..5a3233b1654a --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-acc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) + +maintainers: + - Ansuel Smith + +description: | + The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. + There is one ACC register region per CPU within the KPSS remapped region as + well as an alias register region that remaps accesses to the ACC associated + with the CPU accessing the region. + +properties: + compatible: + enum: + - qcom,kpss-acc-v1 + - qcom,kpss-acc-v2 + + reg: + items: + - description: Base address and size of the register region + - description: Optional base address and size of the alias register region + + clocks: + items: + - description: phandle to pll8_vote + - description: phandle to pxo_board + + clock-names: + items: + - const: pll8_vote + - const: pxo + + clock-output-names: + description: Name of the aux clock. Krait can have at most 4 cpu. + enum: + - acpu0_aux + - acpu1_aux + - acpu2_aux + - acpu3_aux + + '#clock-cells': + const: 0 + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,kpss-acc-v1 + then: + required: + - clocks + - clock-names + - clock-output-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + clock-controller@2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu0_aux"; + #clock-cells = <0>; + }; + + - | + clock-controller@f9088000 { + compatible = "qcom,kpss-acc-v2"; + reg = <0xf9088000 0x1000>, + <0xf9008000 0x1000>; + }; +... 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[93.42.69.170]) by smtp.googlemail.com with ESMTPSA id 10-20020a5d47aa000000b00204012e4373sm7239729wrb.101.2022.03.21.08.18.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 08:18:04 -0700 (PDT) From: Ansuel Smith To: Rob Herring , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Ansuel Smith , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 18/18] dt-bindings: arm: msm: Convert kpss-gcc driver Documentation to yaml Date: Mon, 21 Mar 2022 15:48:25 +0100 Message-Id: <20220321144825.11736-19-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220321144825.11736-1-ansuelsmth@gmail.com> References: <20220321144825.11736-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert kpss-gcc driver Documentation to yaml. Signed-off-by: Ansuel Smith --- .../bindings/arm/msm/qcom,kpss-gcc.txt | 44 ------------ .../bindings/arm/msm/qcom,kpss-gcc.yaml | 68 +++++++++++++++++++ 2 files changed, 68 insertions(+), 44 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt deleted file mode 100644 index e628758950e1..000000000000 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt +++ /dev/null @@ -1,44 +0,0 @@ -Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) - -PROPERTIES - -- compatible: - Usage: required - Value type: - Definition: should be one of the following. The generic compatible - "qcom,kpss-gcc" should also be included. - "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" - "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" - -- reg: - Usage: required - Value type: - Definition: base address and size of the register region - -- clocks: - Usage: required - Value type: - Definition: reference to the pll parents. - -- clock-names: - Usage: required - Value type: - Definition: must be "pll8_vote", "pxo". - -- clock-output-names: - Usage: required - Value type: - Definition: Name of the output clock. Typically acpu_l2_aux indicating - an L2 cache auxiliary clock. - -Example: - - l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; - reg = <0x2011000 0x1000>; - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; - clock-names = "pll8_vote", "pxo"; - clock-output-names = "acpu_l2_aux"; - }; diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml new file mode 100644 index 000000000000..20ee182eb16f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-gcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) + +maintainers: + - Ansuel Smith + +description: | + Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used + to control L2 mux (in the current implementation). + +properties: + compatible: + items: + - enum: + - qcom,kpss-gcc-ipq8064 + - qcom,kpss-gcc-apq8064 + - qcom,kpss-gcc-msm8974 + - qcom,kpss-gcc-msm8960 + - const: qcom,kpss-gcc + + reg: + maxItems: 1 + + clocks: + items: + - description: phandle to pll8_vote + - description: phandle to pxo_board + + clock-names: + items: + - const: pll8_vote + - const: pxo + + clock-output-names: + const: acpu_l2_aux + + '#clock-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - clock-output-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + clock-controller@2011000 { + compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; + reg = <0x2011000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu_l2_aux"; + #clock-cells = <0>; + }; +... +