From patchwork Wed Mar 23 18:34:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12790048 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35B9BC4332F for ; Wed, 23 Mar 2022 18:34:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343583AbiCWSgH (ORCPT ); Wed, 23 Mar 2022 14:36:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240059AbiCWSgB (ORCPT ); Wed, 23 Mar 2022 14:36:01 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7281271EC3; Wed, 23 Mar 2022 11:34:31 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 6B032223EA; Wed, 23 Mar 2022 19:34:29 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1648060469; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IqDHStJy0CawvNenzFeGPEaQ0ePnoq1IZcZH5bz6PPU=; b=Hr4CHPcuX+pFr29lrtcdKFcmrD/djeTTnmzeLJhQLwSdSubon8rTaBpdTWrmi9APQOaVrN YRKW8I8+5UwpnRMfRa5NuwDA5DkZScVCGiY83mMvJVazf9AsDPuTfy/Wke0fOm3y1zVQWM bxeJelAIznHjYnyLbup8bkUh72edDKE= From: Michael Walle To: Andrew Lunn , Heiner Kallweit , Russell King , Jakub Kicinski , Paolo Abeni Cc: "David S . Miller" , Xu Liang , Alexandre Belloni , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH RFC net-next 1/5] net: phy: mscc-miim: reject clause 45 register accesses Date: Wed, 23 Mar 2022 19:34:15 +0100 Message-Id: <20220323183419.2278676-2-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220323183419.2278676-1-michael@walle.cc> References: <20220323183419.2278676-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC The driver doesn't support clause 45 register access yet, but doesn't check if the access is a c45 one either. This leads to spurious register reads and writes. Add the check. Fixes: 542671fe4d86 ("net: phy: mscc-miim: Add MDIO driver") Signed-off-by: Michael Walle Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli --- drivers/net/mdio/mdio-mscc-miim.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio-mscc-miim.c index c483ba67c21f..582969751b4c 100644 --- a/drivers/net/mdio/mdio-mscc-miim.c +++ b/drivers/net/mdio/mdio-mscc-miim.c @@ -102,6 +102,9 @@ static int mscc_miim_read(struct mii_bus *bus, int mii_id, int regnum) u32 val; int ret; + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + ret = mscc_miim_wait_pending(bus); if (ret) goto out; @@ -145,6 +148,9 @@ static int mscc_miim_write(struct mii_bus *bus, int mii_id, struct mscc_miim_dev *miim = bus->priv; int ret; + if (regnum & MII_ADDR_C45) + return -EOPNOTSUPP; + ret = mscc_miim_wait_pending(bus); if (ret < 0) goto out; From patchwork Wed Mar 23 18:34:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12790049 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72E77C433F5 for ; Wed, 23 Mar 2022 18:34:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343712AbiCWSgL (ORCPT ); Wed, 23 Mar 2022 14:36:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34908 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240076AbiCWSgC (ORCPT ); Wed, 23 Mar 2022 14:36:02 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6DF371EC6; Wed, 23 Mar 2022 11:34:31 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id D640E223EF; Wed, 23 Mar 2022 19:34:29 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1648060470; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=jHCZJ6LDhJPWyNs1i/kh4KtN0UeNoQ/8cRyWcxS+ogQ=; b=dFlsyxAo8dcPa20FXsTjsnW6J2a7KECJKzXWhOAegSqtf/Tk0SiAJ2oMQvurANaz3FdvbF qYTG7UF9l8ILkDzyVM/kIkxXa0arjplxSHT79WCSfrUajgRhaFW+o2OVuOOWK3MuwGLYcy J3hVoODSg3Ct4zqcPPCRSeHVTqikW1w= From: Michael Walle To: Andrew Lunn , Heiner Kallweit , Russell King , Jakub Kicinski , Paolo Abeni Cc: "David S . Miller" , Xu Liang , Alexandre Belloni , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH RFC net-next 2/5] net: phy: support indirect c45 access in get_phy_c45_ids() Date: Wed, 23 Mar 2022 19:34:16 +0100 Message-Id: <20220323183419.2278676-3-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220323183419.2278676-1-michael@walle.cc> References: <20220323183419.2278676-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC There are some PHYs, namely the Maxlinear GPY215, whose driver is explicitly supporting C45-over-C22 access. At least that was the intention. In practice, it cannot work because get_phy_c45_ids() will always issue c45 register accesses. There is another issue at hand: the Microchip LAN8814, which is a c22 only quad PHY, has issues with c45 accesses on the same bus and its address decoder will find a match in the middle of another c45 transaction. This will lead to spurious reads and writes. The reads will corrupt the c45 in flight. The write will lead to random writes to the LAN8814 registers. As a workaround for PHYs which support C45-over-C22 register accesses, we can make the MDIO bus c22-only. For both reasons, extend the register accesses in get_phy_c45_ids() to allow indirect accesses, indicated by the bus->probe_capabilities bits. The probe_capabilites can then be degraded by a device tree property, for example. Or it will just work when the MDIO driver is c22-only and set the capabilities accordingly. Signed-off-by: Michael Walle --- drivers/net/phy/phy_device.c | 46 ++++++++++++++++++++++++++++++++---- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 8406ac739def..c766f5bb421a 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -649,6 +649,42 @@ struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, } EXPORT_SYMBOL(phy_device_create); +static int mdiobus_probe_mmd_read(struct mii_bus *bus, int prtad, int devad, + u16 regnum) +{ + int ret; + + /* For backwards compatibility, treat MDIOBUS_NO_CAP as c45 capable */ + if (bus->probe_capabilities == MDIOBUS_NO_CAP || + bus->probe_capabilities >= MDIOBUS_C45) + return mdiobus_c45_read(bus, prtad, devad, regnum); + + mutex_lock(&bus->mdio_lock); + + /* Write the desired MMD Devad */ + ret = __mdiobus_write(bus, prtad, MII_MMD_CTRL, devad); + if (ret) + goto out; + + /* Write the desired MMD register address */ + ret = __mdiobus_write(bus, prtad, MII_MMD_DATA, regnum); + if (ret) + goto out; + + /* Select the Function : DATA with no post increment */ + ret = __mdiobus_write(bus, prtad, MII_MMD_CTRL, + devad | MII_MMD_CTRL_NOINCR); + if (ret) + goto out; + + ret = __mdiobus_read(bus, prtad, MII_MMD_DATA); + +out: + mutex_unlock(&bus->mdio_lock); + + return ret; +} + /* phy_c45_probe_present - checks to see if a MMD is present in the package * @bus: the target MII bus * @prtad: PHY package address on the MII bus @@ -664,7 +700,7 @@ static int phy_c45_probe_present(struct mii_bus *bus, int prtad, int devad) { int stat2; - stat2 = mdiobus_c45_read(bus, prtad, devad, MDIO_STAT2); + stat2 = mdiobus_probe_mmd_read(bus, prtad, devad, MDIO_STAT2); if (stat2 < 0) return stat2; @@ -687,12 +723,12 @@ static int get_phy_c45_devs_in_pkg(struct mii_bus *bus, int addr, int dev_addr, { int phy_reg; - phy_reg = mdiobus_c45_read(bus, addr, dev_addr, MDIO_DEVS2); + phy_reg = mdiobus_probe_mmd_read(bus, addr, dev_addr, MDIO_DEVS2); if (phy_reg < 0) return -EIO; *devices_in_package = phy_reg << 16; - phy_reg = mdiobus_c45_read(bus, addr, dev_addr, MDIO_DEVS1); + phy_reg = mdiobus_probe_mmd_read(bus, addr, dev_addr, MDIO_DEVS1); if (phy_reg < 0) return -EIO; *devices_in_package |= phy_reg; @@ -776,12 +812,12 @@ static int get_phy_c45_ids(struct mii_bus *bus, int addr, continue; } - phy_reg = mdiobus_c45_read(bus, addr, i, MII_PHYSID1); + phy_reg = mdiobus_probe_mmd_read(bus, addr, i, MII_PHYSID1); if (phy_reg < 0) return -EIO; c45_ids->device_ids[i] = phy_reg << 16; - phy_reg = mdiobus_c45_read(bus, addr, i, MII_PHYSID2); + phy_reg = mdiobus_probe_mmd_read(bus, addr, i, MII_PHYSID2); if (phy_reg < 0) return -EIO; c45_ids->device_ids[i] |= phy_reg; From patchwork Wed Mar 23 18:34:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12790050 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06E1CC433FE for ; Wed, 23 Mar 2022 18:34:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343783AbiCWSgO (ORCPT ); Wed, 23 Mar 2022 14:36:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240068AbiCWSgC (ORCPT ); Wed, 23 Mar 2022 14:36:02 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE79871EC7; Wed, 23 Mar 2022 11:34:31 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2C3C5223F0; Wed, 23 Mar 2022 19:34:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1648060470; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=3CzDuRG/GDyuJLf4p2mHd876Lb9kEdmeUhatt1yVt28=; b=Spon9KQH6o6M3UIq+zJXUQco/bZmHjuwoFruqM0pY7wEPm0S9mCtB4NF/isyQzUkqpCdwX UeY1rBWclONKylMgP0UXJxBMFtOt7oZ58/ewlZohzJ2HdKnk4H+Iu3qBYxfjkD5BfUUOEv KVjDu6enozMC3msUEOnnV6mpbIoNniM= From: Michael Walle To: Andrew Lunn , Heiner Kallweit , Russell King , Jakub Kicinski , Paolo Abeni Cc: "David S . Miller" , Xu Liang , Alexandre Belloni , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH RFC net-next 3/5] net: phy: mscc-miim: add probe_capabilities Date: Wed, 23 Mar 2022 19:34:17 +0100 Message-Id: <20220323183419.2278676-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220323183419.2278676-1-michael@walle.cc> References: <20220323183419.2278676-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC The driver is currently only capable of doing c22 accesses. Add the corresponding probe_capabilities. Signed-off-by: Michael Walle Reviewed-by: Florian Fainelli --- drivers/net/mdio/mdio-mscc-miim.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio-mscc-miim.c index 582969751b4c..c9efcfa2a1ce 100644 --- a/drivers/net/mdio/mdio-mscc-miim.c +++ b/drivers/net/mdio/mdio-mscc-miim.c @@ -225,6 +225,7 @@ int mscc_miim_setup(struct device *dev, struct mii_bus **pbus, const char *name, bus->read = mscc_miim_read; bus->write = mscc_miim_write; bus->reset = mscc_miim_reset; + bus->probe_capabilities = MDIOBUS_C22; snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev)); bus->parent = dev; From patchwork Wed Mar 23 18:34:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12790051 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BD25C433F5 for ; Wed, 23 Mar 2022 18:34:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343822AbiCWSgR (ORCPT ); Wed, 23 Mar 2022 14:36:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240140AbiCWSgD (ORCPT ); Wed, 23 Mar 2022 14:36:03 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA50D71EC9; Wed, 23 Mar 2022 11:34:32 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 79C12223F6; Wed, 23 Mar 2022 19:34:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1648060470; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DhcMgIaTy6FRI8JLWQ7wMPHYxcmUnSolW4s0k7u/vp0=; b=ai1n4+g0tBDGnAqSzsNwyLDFmhInG7N8+fj+RBbLfLw8wWBGRN0e+myKHUnTDLkjkGuBCC wxFpztQK7zUG44ueibAf7P5EpUpewlvK+TVK4cA6H7MlwXS8EDIvzh5GD+gcftkIGbgQA5 t9IZB7hD5t2P2P/uknPqVR4AP/ColZs= From: Michael Walle To: Andrew Lunn , Heiner Kallweit , Russell King , Jakub Kicinski , Paolo Abeni Cc: "David S . Miller" , Xu Liang , Alexandre Belloni , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH RFC net-next 4/5] net: phy: introduce is_c45_over_c22 flag Date: Wed, 23 Mar 2022 19:34:18 +0100 Message-Id: <20220323183419.2278676-5-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220323183419.2278676-1-michael@walle.cc> References: <20220323183419.2278676-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC The GPY215 driver supports indirect accesses to c45 over the c22 registers. In its probe function phy_get_c45_ids() is called and the author descibed their use case as follows: The problem comes from condition "phydev->c45_ids.mmds_present & MDIO_DEVS_AN". Our product supports both C22 and C45. In the real system, we found C22 was used by customers (with indirect access to C45 registers when necessary). So it is pretty clear that the intention was to have a method to use the c45 features over a c22-only MDIO bus. The purpose of calling phy_get_c45_ids() is to populate the .c45_ids for a PHY which wasn't probed as a c45 one. Thus, first rename the phy_get_c45_ids() function to reflect its actual meaning and second, add a new flag which indicates that this is actually a c45 PHY but behind a c22 bus. The latter is important for phylink because phylink will treat c45 in a special way by checking the .is_c45 property. But in our case this isn't set. Signed-off-by: Michael Walle --- drivers/net/phy/mxl-gpy.c | 2 +- drivers/net/phy/phy_device.c | 20 +++++++++++++++----- include/linux/phy.h | 4 +++- 3 files changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/net/phy/mxl-gpy.c b/drivers/net/phy/mxl-gpy.c index 5ce1bf03bbd7..0c825ec20eaa 100644 --- a/drivers/net/phy/mxl-gpy.c +++ b/drivers/net/phy/mxl-gpy.c @@ -99,7 +99,7 @@ static int gpy_probe(struct phy_device *phydev) int ret; if (!phydev->is_c45) { - ret = phy_get_c45_ids(phydev); + ret = phy_get_c45_ids_by_c22(phydev); if (ret < 0) return ret; } diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index c766f5bb421a..43354b261bd5 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -1005,18 +1005,28 @@ void phy_device_remove(struct phy_device *phydev) EXPORT_SYMBOL(phy_device_remove); /** - * phy_get_c45_ids - Read 802.3-c45 IDs for phy device. + * phy_get_c45_ids - Read 802.3-c45 IDs for phy device by using indirect + * c22 accesses. * @phydev: phy_device structure to read 802.3-c45 IDs * * Returns zero on success, %-EIO on bus access error, or %-ENODEV if * the "devices in package" is invalid. */ -int phy_get_c45_ids(struct phy_device *phydev) +int phy_get_c45_ids_by_c22(struct phy_device *phydev) { - return get_phy_c45_ids(phydev->mdio.bus, phydev->mdio.addr, - &phydev->c45_ids); + int ret; + + if (WARN(phydev->is_c45, "PHY is already clause 45\n")) + return -EINVAL; + + ret = get_phy_c45_ids(phydev->mdio.bus, phydev->mdio.addr, + &phydev->c45_ids); + if (!ret) + phydev->is_c45_over_c22 = true; + + return ret; } -EXPORT_SYMBOL(phy_get_c45_ids); +EXPORT_SYMBOL(phy_get_c45_ids_by_c22); /** * phy_find_first - finds the first PHY device on the bus diff --git a/include/linux/phy.h b/include/linux/phy.h index 36ca2b5c2253..eb436d603feb 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -525,6 +525,7 @@ struct macsec_ops; * @phy_id: UID for this device found during discovery * @c45_ids: 802.3-c45 Device Identifiers if is_c45. * @is_c45: Set to true if this PHY uses clause 45 addressing. + * @is_c45_over_c22: Set to true if this PHY uses c45-over-c22 addressing. * @is_internal: Set to true if this PHY is internal to a MAC. * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. * @is_gigabit_capable: Set to true if PHY supports 1000Mbps @@ -606,6 +607,7 @@ struct phy_device { struct phy_c45_device_ids c45_ids; unsigned is_c45:1; + unsigned is_c45_over_c22:1; unsigned is_internal:1; unsigned is_pseudo_fixed_link:1; unsigned is_gigabit_capable:1; @@ -1466,7 +1468,7 @@ static inline int phy_device_register(struct phy_device *phy) static inline void phy_device_free(struct phy_device *phydev) { } #endif /* CONFIG_PHYLIB */ void phy_device_remove(struct phy_device *phydev); -int phy_get_c45_ids(struct phy_device *phydev); +int phy_get_c45_ids_by_c22(struct phy_device *phydev); int phy_init_hw(struct phy_device *phydev); int phy_suspend(struct phy_device *phydev); int phy_resume(struct phy_device *phydev); From patchwork Wed Mar 23 18:34:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12790052 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E4FDC433F5 for ; Wed, 23 Mar 2022 18:34:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343953AbiCWSgV (ORCPT ); Wed, 23 Mar 2022 14:36:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240154AbiCWSgE (ORCPT ); Wed, 23 Mar 2022 14:36:04 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D48E62A20; Wed, 23 Mar 2022 11:34:34 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C34FF223F7; Wed, 23 Mar 2022 19:34:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1648060470; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ss8GFR5rljClvU8CctXDwTGOGTKBTAeyK5+ukBPrIgk=; b=DVHyGE/jkdERvSTtUFF1a1JtXRfnREW6qcbLacNXBm2wWJYptvlN7brbpdEVGevGST6exd XwI2IGK3xrPrGhNTLHA6y3W1BM16j7iq3nBeoaNNVJQh4jnrc5CVd9nrS8ErZCRia0OU4Z UPhhrCckKrsqctgEVLw5FvYtQaKWJ3Q= From: Michael Walle To: Andrew Lunn , Heiner Kallweit , Russell King , Jakub Kicinski , Paolo Abeni Cc: "David S . Miller" , Xu Liang , Alexandre Belloni , Florian Fainelli , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH RFC net-next 5/5] net: phylink: handle the new is_c45_over_c22 property Date: Wed, 23 Mar 2022 19:34:19 +0100 Message-Id: <20220323183419.2278676-6-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220323183419.2278676-1-michael@walle.cc> References: <20220323183419.2278676-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Phylink treats C45 PHYs in a special way and assumes they can switch their SerDes lanes between modes. This check is done by looking at the is_c45 property. But there are PHYs, namely the GPY215, which are C45 PHYs but behind a C22 bus. Thus while the PHY is a C45 one, the is_c45 property is not set because it uses indirect MMD access via the C22 registers. Therefore, add the is_c45_over_c22 property to the check, which indicates this sort of PHY handling. Signed-off-by: Michael Walle --- drivers/net/phy/phylink.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 06943889d747..633cccfbd5f4 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1369,7 +1369,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, * speeds. We really need to know which interface modes the PHY and * MAC supports to properly work out which linkmodes can be supported. */ - if (phy->is_c45 && + if ((phy->is_c45 || phy->is_c45_over_c22) && interface != PHY_INTERFACE_MODE_RXAUI && interface != PHY_INTERFACE_MODE_XAUI && interface != PHY_INTERFACE_MODE_USXGMII)