From patchwork Tue Mar 29 18:38:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Martin_Povi=C5=A1er?= X-Patchwork-Id: 12795170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CC71C433EF for ; Tue, 29 Mar 2022 18:40:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=kpl7ajZDf1lRIdk993JOibJtrJC1rX0uqRwCksr/qHo=; b=gpFJqs25bFgwDw Fga2dqTOdFrSS7eJEvzvA0q+c3cKlLMZeidXsx2TOXx9XSTg4mDN8Yab/hKHgS7bYL89fwvJtJPfU /+SYRF9Mx2E6PYCj4Viu98k9cb1PtNGI70WnMajP1Yz1sXmKVWuhDuDK8Jm57rzX7LI7+3VJ8EwpD bt+OgvYhdpbcFtJkqNW1H1fSAz3qZCiYrJH+jzGV7YjnvO/+27rVNTJUAvP/WXExz6k529Ao2bU1+ xpjsM18c5G1/sKQqyrk8D8U8P4nEHtWgiwmefks6ew1jWdq3p4YoeP8hhSOLtwDbre5pEKSfqolno M9VpenOzH2au0GuaHQjQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nZGk0-00DFJr-50; Tue, 29 Mar 2022 18:38:52 +0000 Received: from hutie.ust.cz ([185.8.165.127]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nZGju-00DFJK-KB for linux-arm-kernel@lists.infradead.org; Tue, 29 Mar 2022 18:38:49 +0000 From: =?utf-8?q?Martin_Povi=C5=A1er?= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cutebit.org; s=mail; t=1648579115; bh=MNw6TZjQg12ilqVca1Iyk/1Sr/JwKEtEFZo4CqiuRdA=; h=From:To:Cc:Subject:Date; b=MK0FFNR/dSMhYqsYkSiQpNIza2jECdZ01Sz1FG5KrRdcROhl1cEAdsLSEG4wXdfeM eEMzqSrFbkDtDZ9SN0WP0Wmg5wGWgEy3BVWpFBv37e0G916tpdI4G+MZ3CvqY2yZzb ovpC3Ak2hp3f1boVZ3YgYRmmBggUEat5PHwD2+Dw= To: Hector Martin , Sven Peter , Michael Ellerman Cc: Alyssa Rosenzweig , Benjamin Herrenschmidt , Paul Mackerras , Jean Delvare , Olof Johansson , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Janne Grunau , =?utf-8?q?Martin?= =?utf-8?q?_Povi=C5=A1er?= Subject: [PATCH] i2c: pasemi: Wait for write xfers to finish Date: Tue, 29 Mar 2022 20:38:17 +0200 Message-Id: <20220329183817.21656-1-povik+lin@cutebit.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220329_113847_263471_1E91ECF6 X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Wait for completion of write transfers before returning from the driver. At first sight it may seem advantageous to leave write transfers queued for the controller to carry out on its own time, but there's a couple of issues with it: * Driver doesn't check for FIFO space. * The queued writes can complete while the driver is in its I2C read transfer path which means it will get confused by the raising of XEN (the 'transaction ended' signal). This can cause a spurious ENODATA error due to premature reading of the MRXFIFO register. Adding the wait fixes some unreliability issues with the driver. There's some efficiency cost to it (especially with pasemi_smb_waitready doing its polling), but that will be alleviated once the driver receives interrupt support. Fixes: beb58aa39e6e ("i2c: PA Semi SMBus driver") Signed-off-by: Martin PoviĊĦer Reviewed-by: Sven Peter --- Tested on Apple's t8103 chip. To my knowledge the PA Semi controller in its pre-Apple occurences behaves the same as far as this patch is concerned. drivers/i2c/busses/i2c-pasemi-core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/i2c/busses/i2c-pasemi-core.c b/drivers/i2c/busses/i2c-pasemi-core.c index 7728c8460dc0..9028ffb58cc0 100644 --- a/drivers/i2c/busses/i2c-pasemi-core.c +++ b/drivers/i2c/busses/i2c-pasemi-core.c @@ -137,6 +137,12 @@ static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter, TXFIFO_WR(smbus, msg->buf[msg->len-1] | (stop ? MTXFIFO_STOP : 0)); + + if (stop) { + err = pasemi_smb_waitready(smbus); + if (err) + goto reset_out; + } } return 0;