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Wed, 30 Mar 2022 09:04:28 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT042.mail.protection.outlook.com (10.13.174.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5123.19 via Frontend Transport; Wed, 30 Mar 2022 09:04:28 +0000 Received: from rtg-amd.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Wed, 30 Mar 2022 04:04:24 -0500 From: Arunpravin Paneer Selvam To: , , Subject: [PATCH] drm: round_up the size to the alignment value Date: Wed, 30 Mar 2022 14:34:10 +0530 Message-ID: <20220330090410.135332-1-Arunpravin.PaneerSelvam@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7b8bf5c2-a895-4353-b146-08da122c4bb6 X-MS-TrafficTypeDiagnostic: MN2PR12MB3966:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Mar 2022 09:04:28.2596 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b8bf5c2-a895-4353-b146-08da122c4bb6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT042.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3966 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexander.deucher@amd.com, Arunpravin Paneer Selvam , matthew.auld@intel.com, christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Round up the size value to the min_page_size and trim the last block to the required size. This solves a bug detected when size is not aligned with the min_page_size. Unigine Heaven has allocation requests for example required pages are 257 and alignment request is 256. To allocate the left over 1 page, continues the iteration to find the order value which is 0 and when it compares with min_order = 8, triggers the BUG_ON(order < min_order). To avoid this issue we round_up the size value to the min_page_size and trim the last block to the computed required size value. Signed-off-by: Arunpravin Paneer Selvam --- drivers/gpu/drm/drm_buddy.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) base-commit: ec57376fba5abc0e571617ff88e2ade7970c2e4b diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c index 72f52f293249..98d7ec359b08 100644 --- a/drivers/gpu/drm/drm_buddy.c +++ b/drivers/gpu/drm/drm_buddy.c @@ -641,6 +641,7 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm, unsigned int min_order, order; unsigned long pages; LIST_HEAD(allocated); + u64 cur_size; int err; if (size < mm->chunk_size) @@ -665,6 +666,11 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm, if (start + size == end) return __drm_buddy_alloc_range(mm, start, size, blocks); + cur_size = size; + + if (!IS_ALIGNED(size, min_page_size)) + size = round_up(size, min_page_size); + pages = size >> ilog2(mm->chunk_size); order = fls(pages) - 1; min_order = ilog2(min_page_size) - ilog2(mm->chunk_size); @@ -702,6 +708,31 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm, break; } while (1); + + /* + * If size value rounded up to min_page_size, trim the last block + * to the required size + */ + if (cur_size != size) { + struct drm_buddy_block *trim_block; + LIST_HEAD(trim_list); + u64 required_size; + + trim_block = list_last_entry(&allocated, typeof(*trim_block), link); + list_move_tail(&trim_block->link, &trim_list); + /* + * Compute the required_size value by subtracting the last block size + * with (aligned size - original size) + */ + required_size = drm_buddy_block_size(mm, trim_block) - (size - cur_size); + + drm_buddy_block_trim(mm, + required_size, + &trim_list); + + list_splice_tail(&trim_list, &allocated); + } + list_splice_tail(&allocated, blocks); return 0;