From patchwork Wed Mar 30 11:48:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12795719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09F66C433EF for ; Wed, 30 Mar 2022 11:54:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344318AbiC3Lzt (ORCPT ); Wed, 30 Mar 2022 07:55:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344444AbiC3LxK (ORCPT ); Wed, 30 Mar 2022 07:53:10 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF9CF261DF7; Wed, 30 Mar 2022 04:48:56 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id bh17so1480145ejb.8; Wed, 30 Mar 2022 04:48:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QnygP4l4hTZOc+NFDXu9YYi5sXjYreslpEJf/CgWJFU=; b=L4D9vUp++dIar8oRx2cyilIRQpIbE8aTyXC7bD8/IQy5GxKarN9FPrJKt8vtzjtYK8 MWTYlILu33ArTJ8ShiNwg1pOMYcgFwQvMJxcreeKPzN0tspJ0HK9Yvu3oyTPvtYsKJXY IrJRaZzbDlhgURR2UzliOGVkpCwaS/l/3LhQN91N195HK0ckoaGVLdgtxcOB+ZXdYCmO KpMOKWoRLB501a9wQuKcFWp4n0UldaFxeDVLCR3ANYXQd1VaIBpvr2dr5wwOAEQKtRzy 79Awx4y8ntCN3kwn5zGGwY7kDivYHem6swodfHzXGGOC7J6lAfxvHZom9ftcccvbj5Vp ROTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QnygP4l4hTZOc+NFDXu9YYi5sXjYreslpEJf/CgWJFU=; b=EYHGByaBKjGSO76P33iJA2BRFm0FgpaaMx35mYyMF5XMGudyOjqsQQ/OT79GRMsIII MdbCjb4jHRr4/4x5kdfdNXgryFQzovTov0kBTx7F7wehC+rqVEtbLstdyJdahIbVZnt2 dBR+JZhESgcP0eB87Otc/tZVVakTzW4yU/G5AvZHRIM1pgJ1dNTE+ehQQ4KOvC8yjTX5 6EPGbuVRSU3eUYDwmspsTHag1x5LGY/o4d+Zc37nwPMKzyLUCqUY/uSBdRQG1365/VT1 CvfmNcYAyjXuMbUF+n1dzixf71ce8CDQopP5IS3FxCUgQr0at1f+h7sZAt20ROfOz97A 7Mcw== X-Gm-Message-State: AOAM531UUrGSJRXZPf5fs3X3vNZrjv+v4bJ7rLe4PA56dtIugVaoTM3l bavbolBmUw/s2GtRoIwVOiggoNHQyPA= X-Google-Smtp-Source: ABdhPJw4fExfdVyAn2ssY8SyPCua0EfDQ35g+WWMCOkxPzNpgIv/ZzrQ/OVM2E3Kzv+Bw3J5rAnauQ== X-Received: by 2002:a17:907:94c6:b0:6da:9561:ce0 with SMTP id dn6-20020a17090794c600b006da95610ce0mr38918680ejc.342.1648640933738; Wed, 30 Mar 2022 04:48:53 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id g9-20020aa7c849000000b00412fc6bf26dsm9934442edt.80.2022.03.30.04.48.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 04:48:53 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/3] dt-bindings: clock: convert rockchip,rk3036-cru.txt to YAML Date: Wed, 30 Mar 2022 13:48:45 +0200 Message-Id: <20220330114847.18633-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Convert rockchip,rk3036-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/rockchip,rk3036-cru.txt | 56 --------------- .../bindings/clock/rockchip,rk3036-cru.yaml | 72 +++++++++++++++++++ 2 files changed, 72 insertions(+), 56 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt deleted file mode 100644 index 20df350b9..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt +++ /dev/null @@ -1,56 +0,0 @@ -* Rockchip RK3036 Clock and Reset Unit - -The RK3036 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rk3036-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "ext_i2s" - external I2S clock - optional, - - "rmii_clkin" - external EMAC clock - optional - -Example: Clock controller node: - - cru: cru@20000000 { - compatible = "rockchip,rk3036-cru"; - reg = <0x20000000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@20060000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20060000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml new file mode 100644 index 000000000..1376230fe --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3036 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RK3036 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with following + clock-output-names: + - "xin24m" - crystal input - required + - "ext_i2s" - external I2S clock - optional + - "rmii_clkin" - external EMAC clock - optional + +properties: + compatible: + enum: + - rockchip,rk3036-cru + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + const: xin24m + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20000000 { + compatible = "rockchip,rk3036-cru"; + reg = <0x20000000 0x1000>; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Wed Mar 30 11:48:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12795720 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D603C433EF for ; Wed, 30 Mar 2022 11:58:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344183AbiC3Lzs (ORCPT ); Wed, 30 Mar 2022 07:55:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344441AbiC3LxK (ORCPT ); Wed, 30 Mar 2022 07:53:10 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14BB1262400; Wed, 30 Mar 2022 04:48:56 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id bh17so1480213ejb.8; Wed, 30 Mar 2022 04:48:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=H5VTVLY2z6i13dvk5wtcwbzRR2pZJCvwJwdziJVAOMQ=; b=HCuend+++KI5ObYAh+8oGZAuDnrsOdDn31plrdpo+Fo3t+SXVujiaqqqU0MKgsq87H pHBc9cLbcal7y/FrS2eKcC3UJcA4YbCxtd1qqWKu/MxLiV09sKnz8GA6wy+zojN9+qdl 9X7RAOIWpv0KDT28qgzszlANqnPO8kyR1qWdms6+iiLhiP8r/fObG/zj079XptDkTJP6 uSHc1hiHqfiBWa9ICHDT8AvNYMlY2VeW2NE9M0IMexANL8oveZG0eeVHDK1VEsN2gPSv WpSpcvLyl049ozh7gqbu9t5c8WbbAYqB+PnY2dktwzYB7a4/AqFp+dg8jizIbBrmhB+3 Jagg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H5VTVLY2z6i13dvk5wtcwbzRR2pZJCvwJwdziJVAOMQ=; b=syJkl0AUFQGlFbiKZw9d6y4ewrIjTTl3xBB0NoaqQpDmdoqzbfSo7XqksYnKbIe3QL o1tcwzx/MH0uFrDVZzLLtAoaIMjFkazhKHv1BMMvfIDgDtR6xq/zborb8ZGJGxxBtvgk VtatZ/rnycpWWegaBh7i1SZMEr3DaedjARkkiQpHLaZplnftTKuLezn7USyLj3OG9M/1 mwAmlkKp14rJR9AQHIapV8QrlhCHygedo+TqwFDVXfMo2uypS6vFMAOmpfLfY/Vsm5PT AY742nGPvmFkS2UnN8sDRpGpYKbx7rBOWuHYpXMgjrHeVFmDjBN6FzwBLg8+E70lURVG sZnQ== X-Gm-Message-State: AOAM531Ys+x5YwMQjh3zD0zgi7BGzAyiW3gezHhizk3mN70x+pIOtYow MxWLrfwGz7OSigC3yQz1MXU= X-Google-Smtp-Source: ABdhPJw/Xl9g3IPsAOoM+4M6ZWl9RbIh1DIkd9VFUCU3+dZWBzlI38COLdIRHgd0iJ07HnsdsJadeg== X-Received: by 2002:a17:907:8690:b0:6da:8436:2b94 with SMTP id qa16-20020a170907869000b006da84362b94mr39851667ejc.33.1648640934543; Wed, 30 Mar 2022 04:48:54 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id g9-20020aa7c849000000b00412fc6bf26dsm9934442edt.80.2022.03.30.04.48.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 04:48:54 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/3] ARM: dts: rockchip: add clocks property to cru node rk3036 Date: Wed, 30 Mar 2022 13:48:46 +0200 Message-Id: <20220330114847.18633-2-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220330114847.18633-1-jbx6244@gmail.com> References: <20220330114847.18633-1-jbx6244@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add clocks and clock-names to the rk3036 cru node, because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3036.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index ba2b8891b..3894b8d2e 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -330,6 +330,8 @@ cru: clock-controller@20000000 { compatible = "rockchip,rk3036-cru"; reg = <0x20000000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; From patchwork Wed Mar 30 11:48:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12795718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E70DCC3527D for ; Wed, 30 Mar 2022 11:54:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344311AbiC3Lzt (ORCPT ); Wed, 30 Mar 2022 07:55:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344466AbiC3LxL (ORCPT ); Wed, 30 Mar 2022 07:53:11 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07B96260C7D; Wed, 30 Mar 2022 04:48:57 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id z92so24062875ede.13; Wed, 30 Mar 2022 04:48:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2thFVVxt8iOgZ/77vqKjkxGRR5i4huEJbYJ2HtMw6Bs=; b=QvmXvaXA67wdW5gKoKXNCL4TrnmKgs7pGbyP6N9v0oh8qzX1AhkIdDVPvFuw/qv525 7pVNXYdL/cPx7qUNvqkDFdGvf1vvLIdjSIQ1qXPfP4i2YY1Gy42ahLVroGE5fMXVmBGo ZAPtdBGvLHFD0rL3yJTkZDxPxDKcLb+EmcFJfi1J3OtSnF9FgE2tsoErNYbKvfHPN773 g5ePXpc+OpB0ZhPnBY3FKwEx/gsbCL53UGhmOpb015zFg9aSVw/EyNVazcCovhA+5dP2 CZl7R6kQFCOhgLZ4KT+x5Z5Lmf56EwyV5w0wgpTcPkdR7tSCcD0kdZ/AymL4NGqCOnjK waSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2thFVVxt8iOgZ/77vqKjkxGRR5i4huEJbYJ2HtMw6Bs=; b=obyE8AFNk9R187cjztaSjdHHFCKlfu+ZW1cesc0zjy1Wf6X1RUVFpSHD8RtfRrK3+5 y5ap/gnMPO13BEc2VmlVj6UiSw37/095gsSD4o+lzekOAvFQNYMFwFLDcYBhC0g21fUH cbzRUNV2FHtf9VUHrBXlIwx6VQRZWV8EEGZrANlqqcsgFgO+wFo/KPY8Vvdh97R0ZWGt zZeJJyL70b+xPt+kfXJ0wAycZCHp3zVCYEeUj/72tnu7IEZjP8eaSChmCOIR/j5okRtZ 9ITHbiFgyK3Y3dQqDdbbfVYXLvMtvP2DokLOiIxhLqp8s/CijkOsLJOvQSpG/WRldRPq UmZw== X-Gm-Message-State: AOAM532uveyFf0Olq0SeN/65dvCEPBlWh4JEAG60McfKHr/eho1NPCz3 uEhiwylOnqQxuBtW2TOqbqc= X-Google-Smtp-Source: ABdhPJw5YR6043SIYfTA+1UGWgg8uUODu5z2wYnauw+5pAB14UK9my7jiZRCsaGr1TAkDz5GfX0nag== X-Received: by 2002:aa7:cac8:0:b0:410:cc6c:6512 with SMTP id l8-20020aa7cac8000000b00410cc6c6512mr9938016edt.408.1648640935405; Wed, 30 Mar 2022 04:48:55 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id g9-20020aa7c849000000b00412fc6bf26dsm9934442edt.80.2022.03.30.04.48.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 04:48:55 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/3] ARM: dts: rockchip: rk3036: use generic node name for dma Date: Wed, 30 Mar 2022 13:48:47 +0200 Message-Id: <20220330114847.18633-3-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220330114847.18633-1-jbx6244@gmail.com> References: <20220330114847.18633-1-jbx6244@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The node names should be generic, so fix this for the rk3036 dma node and rename it to "dma-controller". Signed-off-by: Johan Jonker Reviewed-by: Krzysztof Kozlowski --- arch/arm/boot/dts/rk3036.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 3894b8d2e..c5aa1636a 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -558,7 +558,7 @@ status = "disabled"; }; - pdma: pdma@20078000 { + pdma: dma-controller@20078000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x20078000 0x4000>; interrupts = ,