From patchwork Wed Mar 30 13:16:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12795819 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FA38C43217 for ; Wed, 30 Mar 2022 13:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345850AbiC3NSF (ORCPT ); Wed, 30 Mar 2022 09:18:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345817AbiC3NSC (ORCPT ); Wed, 30 Mar 2022 09:18:02 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 226F62FFF8; Wed, 30 Mar 2022 06:16:16 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id bg10so41457684ejb.4; Wed, 30 Mar 2022 06:16:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kIZngZOjWy/J3S+b4z6+BUn/eXOxV020jVmkrkFNZpQ=; b=biH0nxISIqGQSS6v7IiQeP0zNDT0PEkBjLFaq1jmJRMkJP74TqKUjH2bP7aVt9KtQp TWRHFlLQ4mYWPEgAbR1NxjkfM75bZdcQu2rANl3Uo6noaZggYAYLZk9nXfn4965pQynB yooB4KgRMwDuXQPgsHGc2V49mFs4YafwhRqTzklEIj0mMBufGVxwLNzzVn9ba5f1qIJs iNbMX+bmavYi2ijWIwfXVxONCIlUgyCh1MGo3zg3A/nu1cVlHdB34YY5tM95G1/uym+q GgajeY3vUZ4rK263Jey0gj5Y6Iuq+lL5nNYHa03Ha+SR1tpxhGHob+DPqSw+g2NHMG+F 34BA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kIZngZOjWy/J3S+b4z6+BUn/eXOxV020jVmkrkFNZpQ=; b=klM1ZNhv2JrXjsEA20rl7rlfp10A61v1Prg8cLYaxdNQ2vGnfvowD/YBO/lqlMXbV5 yj+jmRLoAy3JIKJAvQ2mmeCHbPK2xGURj5MYhDRj7iuRZdqql3/eZrLdovoPqvcSOoxs f0msUmj0wv+KAM/d8L9pZ/ZEO6rmTpwEVWEXOl/WmX+rms2fEDmUTTRy6mpYHqPleDdl il2CDFxyA0PS8B9Z0wgbnYrMfslm0dJHMvyMagd3cDUAYWpIVZllp3xdfLZB+DsAumKv KeN0vz+BBRvIh1VBypKF6O8LdFZj/INiHayGSbXxaK/BY9buOLe9G8a+4fJUEDaWrnWK KmIg== X-Gm-Message-State: AOAM530k0FRXC7oY8cL8IKmpnrfYnKQwDNlLROBipbigHNACekovgLu4 zNPQogpCS6awR6zo3ygQzmk= X-Google-Smtp-Source: ABdhPJxS9G9VHO3IThZxz4ao9YzTgP8Wz1c0iHE9nerrkjAwT9R8JXr1OX+n2TYNV647tHhxNfQ6vg== X-Received: by 2002:a17:906:a4b:b0:6d0:fbdd:7cb5 with SMTP id x11-20020a1709060a4b00b006d0fbdd7cb5mr40462121ejf.152.1648646174471; Wed, 30 Mar 2022 06:16:14 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id ge13-20020a170907908d00b006e09a005d73sm6603476ejb.31.2022.03.30.06.16.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 06:16:14 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/3] dt-bindings: clock: convert rockchip,rv1108-cru.txt to YAML Date: Wed, 30 Mar 2022 15:16:06 +0200 Message-Id: <20220330131608.30040-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Convert rockchip,rv1108-cru.txt to YAML. Changes against original bindings: Add clocks and clock-names because the device has to have at least one input clock. Signed-off-by: Johan Jonker Reviewed-by: Krzysztof Kozlowski --- .../bindings/clock/rockchip,rv1108-cru.txt | 59 --------------- .../bindings/clock/rockchip,rv1108-cru.yaml | 75 +++++++++++++++++++ 2 files changed, 75 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt deleted file mode 100644 index 161326a4f..000000000 --- a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt +++ /dev/null @@ -1,59 +0,0 @@ -* Rockchip RV1108 Clock and Reset Unit - -The RV1108 clock controller generates and supplies clock to various -controllers within the SoC and also implements a reset controller for SoC -peripherals. - -Required Properties: - -- compatible: should be "rockchip,rv1108-cru" -- reg: physical base address of the controller and length of memory mapped - region. -- #clock-cells: should be 1. -- #reset-cells: should be 1. - -Optional Properties: - -- rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changeable, due to the missing pll lock status. - -Each clock is assigned an identifier and client nodes can use this identifier -to specify the clock which they consume. All available clocks are defined as -preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be -used in device tree sources. Similar macros exist for the reset sources in -these files. - -External clocks: - -There are several clocks that are generated outside the SoC. It is expected -that they are defined using standard clock bindings with following -clock-output-names: - - "xin24m" - crystal input - required, - - "ext_vip" - external VIP clock - optional - - "ext_i2s" - external I2S clock - optional - - "ext_gmac" - external GMAC clock - optional - - "hdmiphy" - external clock input derived from HDMI PHY - optional - - "usbphy" - external clock input derived from USB PHY - optional - -Example: Clock controller node: - - cru: cru@20200000 { - compatible = "rockchip,rv1108-cru"; - reg = <0x20200000 0x1000>; - rockchip,grf = <&grf>; - - #clock-cells = <1>; - #reset-cells = <1>; - }; - -Example: UART controller node that consumes the clock generated by the clock - controller: - - uart0: serial@10230000 { - compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart"; - reg = <0x10230000 0x100>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>; - }; diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml new file mode 100644 index 000000000..20421c22f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RV1108 Clock and Reset Unit (CRU) + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + The RV1108 clock controller generates and supplies clocks to various + controllers within the SoC and also implements a reset controller for SoC + peripherals. + Each clock is assigned an identifier and client nodes can use this identifier + to specify the clock which they consume. All available clocks are defined as + preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be + used in device tree sources. Similar macros exist for the reset sources in + these files. + There are several clocks that are generated outside the SoC. It is expected + that they are defined using standard clock bindings with following + clock-output-names: + - "xin24m" - crystal input - required + - "ext_vip" - external VIP clock - optional + - "ext_i2s" - external I2S clock - optional + - "ext_gmac" - external GMAC clock - optional + - "hdmiphy" - external clock input derived from HDMI PHY - optional + - "usbphy" - external clock input derived from USB PHY - optional + +properties: + compatible: + enum: + - rockchip,rv1108-cru + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + + clocks: + maxItems: 1 + + clock-names: + const: xin24m + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the "general register files" (GRF), + if missing pll rates are not changeable, due to the missing pll + lock status. + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + cru: clock-controller@20200000 { + compatible = "rockchip,rv1108-cru"; + reg = <0x20200000 0x1000>; + rockchip,grf = <&grf>; + #clock-cells = <1>; + #reset-cells = <1>; + }; From patchwork Wed Mar 30 13:16:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12795818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FDDCC4332F for ; Wed, 30 Mar 2022 13:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344304AbiC3NSG (ORCPT ); Wed, 30 Mar 2022 09:18:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345825AbiC3NSD (ORCPT ); Wed, 30 Mar 2022 09:18:03 -0400 Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [IPv6:2a00:1450:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D930730550; Wed, 30 Mar 2022 06:16:16 -0700 (PDT) Received: by mail-ed1-x535.google.com with SMTP id c62so24376627edf.5; Wed, 30 Mar 2022 06:16:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L9ZZEhaB4N93rT956KgttYvh8XmyGyWfb74vWE/N9yo=; b=OxCSsGJvh77imEAynSgD8C33TMeAri1Abo+xALPCW7rcixxwbhQ2Z74hwde1y40w3k z3fVY6Ye3uBfzDib/JTI1Vcpz3KWrS3sZxGtqrkNweTTUh0A1rS1AwDvQyN5m29wFzr3 233qyJgruVGJFrItJXNy//gjHN48XlEc0ErcyUVmRAo6V1YTtrFc8TJNV2q2GeZZtMdC gPwUIrPwSMEl0f1r9lQacTHI9jTyzpLAREhVhlQQSZ4Qqgl1xjSkEjqHMYAM0cAqP1bh mChICRwOMldaGtUIw/L4U82ozmcGZfaTtxZit2CAibTQQJcBgV7N+PV37RikNTiklutW WJ+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L9ZZEhaB4N93rT956KgttYvh8XmyGyWfb74vWE/N9yo=; b=Bv2jjH6OqT9ZNGWNafadWVMtzHn53iUWzQep9IJcWAdanIMVvuKLbpuK40pbPFlC1/ vW1C/Np6LA/DF9lD9DVGffipeuczWy62BFbjaqEfzn1RyHtB5JbYoHnVrnLCx/oTd5T6 jXFJ4dIfu4S0pcXAqAKsiLNXZZLO9/frf9ztQFJJLUSv7jWfhsaOVt7j3me0NjdS5lyK ZtyP4WKNIx+2yxAYoFufZ+JySHr29+HKdQE/MYGEtgwtDhk1/eB4kujLjW7r0bN+KUNn KOBOb/lcetKUrCkGS2zmHBjljn4BCpXgm4FMT/8CeoesWiJkuI8FxqXtfX09ymJaTx0E 8uBA== X-Gm-Message-State: AOAM532XwEmI97mGtX0Y+1MSWTxqiBbHFa1Cfm7Lx/wMTf9VGa88QA+w aJtXGdTjoTCJM4moTDacAfU= X-Google-Smtp-Source: ABdhPJzlLbsJKtH5PEczO5sFv3FiGYYMNpOjYnwx10oP6eTlECgWSBh06Txlx+WEhmHQTw1WiVZy3Q== X-Received: by 2002:a05:6402:54:b0:419:9b58:e305 with SMTP id f20-20020a056402005400b004199b58e305mr10545849edu.158.1648646175361; Wed, 30 Mar 2022 06:16:15 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id ge13-20020a170907908d00b006e09a005d73sm6603476ejb.31.2022.03.30.06.16.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 06:16:15 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/3] ARM: dts: rockchip: add clocks property to cru node rv1108 Date: Wed, 30 Mar 2022 15:16:07 +0200 Message-Id: <20220330131608.30040-2-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220330131608.30040-1-jbx6244@gmail.com> References: <20220330131608.30040-1-jbx6244@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Add clocks and clock-names to the rv1108 cru node, because the device has to have at least one input clock. Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rv1108.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 448254906..eceaa940b 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -456,6 +456,8 @@ cru: clock-controller@20200000 { compatible = "rockchip,rv1108-cru"; reg = <0x20200000 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; From patchwork Wed Mar 30 13:16:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 12795817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E29B3C433EF for ; Wed, 30 Mar 2022 13:16:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345847AbiC3NSF (ORCPT ); Wed, 30 Mar 2022 09:18:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345832AbiC3NSD (ORCPT ); Wed, 30 Mar 2022 09:18:03 -0400 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAE173054E; Wed, 30 Mar 2022 06:16:17 -0700 (PDT) Received: by mail-ed1-x534.google.com with SMTP id g20so24371382edw.6; Wed, 30 Mar 2022 06:16:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gs1vvcOmyeHWU2nvibJ9wj8P9a0Lnd/nEA7xnnwe/Uo=; b=S8gSdguyuYFeXvjQIF+N/KzFb5HSb0C6/XOwjXe1zZldnlDNiaxAUWaNvatdZSJ1T/ DthKq0Wy4wRSeXYFnxTGBmI/Jb7lYzpDafiYhjDvtQZsbK39peu/8dmph4Oo0fAGhygU TErQRp6v6FAPVFmv6MOZgLiDa5Dzs0j37cvQrn3glhZEFNrpgaVzsOJ8DGkqVVOF75lE j85VMXD6+A7XhHwEVw2GpjrpvndWtUw8XmZ00uOnVMmOAscupQaCK2CEV+6yBTl3x80m B9XJcoKLREPpXXoK26KH21Ep/8npIyicj+zRj693C8m25q1JXFnGqBMCrjhPsQUTHKIz I2ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gs1vvcOmyeHWU2nvibJ9wj8P9a0Lnd/nEA7xnnwe/Uo=; b=4nQlMJIfqzks4eCWNRejClLxyOmwzhdLmv5bM2qp2DFnWnkjfgIOCxj8b+D+2dZTsO sdVSfjb3ct0PDoA/aAGMbwTL2NnryENNcjASDXQLwy2TchgtXI0hzSdR+neZlE0uM6bp TBw5kRVzajS/sQEuQQuPlsL0hMZROM3hMceFYB2JEpySI6ZSMn3Ph/If45pcOgW9uMiP vq3HvGUjZqXT++xbv3Gno6VPKnM1cJ8RYDAtTsdl0W9WWgh94YhEO7gvvuNUI3l3CIOs Uo1VG6bXmIQqVvOdCMLwsqQjy5fiz2R5VYfqLcHryd3RRtAEEOdmvYS1A8fjm03YIIOG BiIQ== X-Gm-Message-State: AOAM5327C7TyzrBsVwHRzqUW2dLaIRNWBzmQV9XfMJTgBeq/J5EJKVSU t7mSbiaiUXNlRGO/vzS29+wjnxxCqJM= X-Google-Smtp-Source: ABdhPJxVHm9ajeOgUb7tlHvniIns/o2Y5rSQXdlfG1g7ZiVmjRT/qHDSX5u7MblMemJiINN8BKtiEw== X-Received: by 2002:aa7:cc96:0:b0:410:b9ac:241 with SMTP id p22-20020aa7cc96000000b00410b9ac0241mr10577416edt.246.1648646176461; Wed, 30 Mar 2022 06:16:16 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id ge13-20020a170907908d00b006e09a005d73sm6603476ejb.31.2022.03.30.06.16.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 06:16:15 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de, zhangqing@rock-chips.com Cc: robh+dt@kernel.org, krzk+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/3] ARM: dts: rockchip: Remove bogus "amba" bus nodes part 2 Date: Wed, 30 Mar 2022 15:16:08 +0200 Message-Id: <20220330131608.30040-3-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220330131608.30040-1-jbx6244@gmail.com> References: <20220330131608.30040-1-jbx6244@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful purpose, and certainly bear no relation at all to the actual underlying interconnect topology. They appear to be cargo-cult copying from a design misstep in the very early days of FDT adoption on ARM, which was righted with the "arm,primecell" compatible, and the last trace of the idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus""). As such, they can simply be removed and the DMA-330 nodes fitted into the normal sort order. The node names should be generic, so rename it to "dma-controller". Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rv1108.dtsi | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index eceaa940b..c158a7ea8 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -85,24 +85,6 @@ #clock-cells = <0>; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - pdma: pdma@102a0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x102a0000 0x4000>; - interrupts = ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC>; - clock-names = "apb_pclk"; - }; - }; - bus_intmem: sram@10080000 { compatible = "mmio-sram"; reg = <0x10080000 0x2000>; @@ -259,6 +241,17 @@ status = "disabled"; }; + pdma: dma-controller@102a0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x102a0000 0x4000>; + interrupts = ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC>; + clock-names = "apb_pclk"; + }; + grf: syscon@10300000 { compatible = "rockchip,rv1108-grf", "syscon", "simple-mfd"; reg = <0x10300000 0x1000>;