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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?+0ZswCrVPTb3nCtpzrVMbbM5mGHv?= =?utf-8?q?7Nl0tI3I0lP1E8sOxE2u/kbzcXokNXxYZrJhq3j0kX/4hNf7HmaISP8l7J3fLDRpa?= =?utf-8?q?aaYnV4Ndldw7fQyXPEHk+CldfAWw7jDU7vDd5E7SCsmWogH9hULTxWHQUIVHk4KlY?= =?utf-8?q?EPBtKlErTmwRU5Th91jJxe3yA3tMd9oPDYRZLv6whJP+2RVYl0D9zWx3WVEhcabUm?= =?utf-8?q?oR2mxvQtSxzBrtL0tAO4S7y/TlkHzwNvmE/B+ZjG0JeQ9OReOEKfD5H1aMOeWU3xn?= =?utf-8?q?/HZHcBhxHwNI/2fk2jAbAzKBr8NKUg/a9+/lc0TcChFW4Jfyd3uNZd4y6+fW1x+br?= =?utf-8?q?V0Slo3CS/CD80q+baPrpmzVAva032QRAl8ohJg75a8VLnY5YeswmNGCUmon+aFj6A?= =?utf-8?q?KtQ2yfdzBREQO8cezm4NeZGHycobM0YRkhOa7YZn0mPPJowRQYFW5s+PzZNx95kSz?= =?utf-8?q?T7c4ibMujTdQ55o1lHldaZbh6YRNFeTD0yritJOj3OBtvfNXal2mr/v44Dx8of2UE?= =?utf-8?q?EyUZMduS/CN69b9N8D+1xnroNT/SSjxgRVuAxQEdpPCG6KxfaLkts6fOcI+Ky5Cbj?= =?utf-8?q?+6lLxBDL5qbYeDwSglgY1/8JZpESjVXKC0orlJjR4BnVCaHF5h/96+kmf1hns1LQv?= =?utf-8?q?0TKBWs/k+eBelwMDHsTuEl7nihNgUs60S4OXOBWcZcl/zasBkTMlOdbd1ycb02NDX?= =?utf-8?q?VTowL2w56U+g8xWtNF862PEci2aiuEfiMVi64S4RTDzidrv7HMIkoQRZm7FQn1Llg?= =?utf-8?q?lzrYm6raIPLXxTUxuNwhIzWdlGfFFn2gh8RgGuiLFXmUcxuyhXSor0Y7gs/QoT8Yc?= =?utf-8?q?cjszZQdY46m+E04sDUVgm+vXtHg2UXb//CvelV78sodPnJqoAqtS00UghWcw7GGpv?= =?utf-8?q?hoAHmQoTxraO6G8lq6ymgBCP59OfGZ3D7VIj5QhxMbvGf8aL58b3L8E5iOrupvNbp?= =?utf-8?q?oK2QCeOvT5wpWM+s+oXBxUxc6tvP02XTvvuYm7deYbszV3unB4H5VZvMM/yYJBVzl?= =?utf-8?q?VX+D3ZumSPSy0Q9wUt+Br2BuZV4GOhcK9gKaZtNvkCaarbLoMTWbQD2R/3TLEbVhF?= =?utf-8?q?4ZmkbTX5OMkVCz9Xl4G00iRpd3ziyMxiNP0UxahT++9COikFB2ghsv6Da3qnOnGCL?= =?utf-8?q?3baZP+rScYcSF3ph7ElJgNRSbTcLzCOBmTOZ8sqcMEYWVovsGMN8RdEa7qhNTrl4k?= =?utf-8?q?/0r9vLjXGCGfRtuwQzli7FrSOe1AccMxbe1R2FSKbkD4GSFEc0hsbi9r6iEyAO2DN?= =?utf-8?q?18KkPOK5gLm6VstEoF5qa2tFpmpU9xSo4+yhesCVkU3f4hXXxYsdaUv+wfqswYyY9?= =?utf-8?q?WddQl9rBK9B2S+KyDTLgE72nPVN9wtMBj3o8Oo1ZLMrnbFOqeBuzoGfl5CwH9SEYC?= =?utf-8?q?/U20oW6hZVg1dl+cJmJy7WR06mmR6aN4v50zi7YDWHiY37WXqie60wQwLsMPm3cWu?= =?utf-8?q?bermm7id/cAspHqnh2PSDjStl0RV118zCObMuwto4jN8/5rzusuD7Q404qy7XgHDb?= =?utf-8?q?3zkIl0YfVZ43+j8ySFt4NUarcY1oxILLS07OMIyv8OKCaT+QV+SEQ86lctIcXSeXw?= =?utf-8?q?O2O6rf3mEA714HJhZRBBNvWVWO2mAWeIx1/vN0yhYh+ERY13CjN3GjjVg8OCSHCKA?= =?utf-8?q?kTEd5GvuY8Y57fSj2+K8JliqnorXTyEg=3D=3D?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 74fd2d73-fabe-4521-68f5-08da12f8febc X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8616.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Mar 2022 09:29:46.2546 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 9mmIUx9VUgow94qic/LnAooyQrhZF66/Z1VoDKGqZU5LewpiXQu5xCC1pEZYjeQm0z9uUBNj1hg1/+YQWzqokg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6161 Use the original calibration against PIT only when the platform timer is PIT. This implicitly excludes the "xen_guest" case from using the PIT logic (init_pit() fails there, and as of 5e73b2594c54 ["x86/time: minor adjustments to init_pit()"] using_pit also isn't being set too early anymore), so the respective hack there can be dropped at the same time. This also reduces calibration time from 100ms to 50ms, albeit this step is being skipped as of 0731a56c7c72 ("x86/APIC: no need for timer calibration when using TDT") anyway. While re-indenting the PIT logic in calibrate_APIC_clock(), besides adjusting style also switch around the 2nd TSC/TMCCT read pair, to match the order of the 1st one, yielding more consistent deltas. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- Open-coding apic_read() in apic_tmcct_read() isn't overly nice, but I wanted to avoid x2apic_enabled being evaluated twice in close succession. And I also wouldn't want to have the barrier there even for the (uncached) MMIO read. Unlike the CPU frequencies enumerated in CPUID leaf 0x16 (which aren't precise), using CPUID[0x15].ECX - if populated - may be an option to skip calibration altogether. Aiui the value there is precise, but using the systems I have easy access to I cannot verify this: In the sample of three I have, none have ECX populated. I wonder whether the secondary CPU freq measurement (used for display purposes only) wouldn't better be dropped at this occasion. --- v3: Move (and rename) read_tmcct() as previously suggested. v2: New. --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -1183,18 +1183,20 @@ static void __init check_deadline_errata "please update microcode to version %#x (or later)\n", rev); } -static void __init wait_tick_pvh(void) +uint32_t __init apic_tmcct_read(void) { - u64 lapse_ns = 1000000000ULL / HZ; - s_time_t start, curr_time; - - start = NOW(); + if ( x2apic_enabled ) + { + /* + * Have a barrier here just like in rdtsc_ordered() as it's + * unclear whether this non-serializing RDMSR also can be + * executed speculatively (like RDTSC can). + */ + alternative("lfence", "mfence", X86_FEATURE_MFENCE_RDTSC); + return apic_rdmsr(APIC_TMCCT); + } - /* Won't wrap around */ - do { - cpu_relax(); - curr_time = NOW(); - } while ( curr_time - start < lapse_ns ); + return apic_mem_read(APIC_TMCCT); } /* @@ -1212,9 +1214,6 @@ static void __init wait_tick_pvh(void) static void __init calibrate_APIC_clock(void) { - unsigned long long t1, t2; - unsigned long tt1, tt2; - unsigned int i; unsigned long bus_freq; /* KAF: pointer-size avoids compile warns. */ unsigned int bus_cycle; /* length of one bus cycle in pico-seconds */ #define LOOPS_FRAC 10U /* measure for one tenth of a second */ @@ -1227,39 +1226,38 @@ static void __init calibrate_APIC_clock( */ __setup_APIC_LVTT(0xffffffff); - if ( !xen_guest ) + bus_freq = calibrate_apic_timer(); + if ( !bus_freq ) + { + unsigned int i, tt1, tt2; + unsigned long t1, t2; + + ASSERT(!xen_guest); + /* - * The timer chip counts down to zero. Let's wait - * for a wraparound to start exact measurement: - * (the current tick might have been already half done) + * The timer chip counts down to zero. Let's wait for a wraparound to + * start exact measurement (the current tick might have been already + * half done): */ wait_8254_wraparound(); - else - wait_tick_pvh(); - /* - * We wrapped around just now. Let's start: - */ - t1 = rdtsc_ordered(); - tt1 = apic_read(APIC_TMCCT); + /* We wrapped around just now. Let's start: */ + t1 = rdtsc_ordered(); + tt1 = apic_read(APIC_TMCCT); - /* - * Let's wait HZ / LOOPS_FRAC ticks: - */ - for (i = 0; i < HZ / LOOPS_FRAC; i++) - if ( !xen_guest ) + /* Let's wait HZ / LOOPS_FRAC ticks: */ + for ( i = 0; i < HZ / LOOPS_FRAC; ++i ) wait_8254_wraparound(); - else - wait_tick_pvh(); - tt2 = apic_read(APIC_TMCCT); - t2 = rdtsc_ordered(); + t2 = rdtsc_ordered(); + tt2 = apic_read(APIC_TMCCT); - bus_freq = (tt1 - tt2) * APIC_DIVISOR * LOOPS_FRAC; + bus_freq = (tt1 - tt2) * APIC_DIVISOR * LOOPS_FRAC; - apic_printk(APIC_VERBOSE, "..... CPU clock speed is %lu.%04lu MHz.\n", - ((unsigned long)(t2 - t1) * LOOPS_FRAC) / 1000000, - (((unsigned long)(t2 - t1) * LOOPS_FRAC) / 100) % 10000); + apic_printk(APIC_VERBOSE, "..... CPU clock speed is %lu.%04lu MHz.\n", + ((t2 - t1) * LOOPS_FRAC) / 1000000, + (((t2 - t1) * LOOPS_FRAC) / 100) % 10000); + } apic_printk(APIC_VERBOSE, "..... host bus clock speed is %ld.%04ld MHz.\n", bus_freq / 1000000, (bus_freq / 100) % 10000); --- a/xen/arch/x86/include/asm/apic.h +++ b/xen/arch/x86/include/asm/apic.h @@ -192,6 +192,9 @@ extern void record_boot_APIC_mode(void); extern enum apic_mode current_local_apic_mode(void); extern void check_for_unexpected_msi(unsigned int vector); +uint64_t calibrate_apic_timer(void); +uint32_t apic_tmcct_read(void); + extern void check_nmi_watchdog(void); extern unsigned int nmi_watchdog; --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -1018,6 +1019,67 @@ static u64 __init init_platform_timer(vo return rc; } +static uint64_t __init read_pt_and_tmcct(uint32_t *tmcct) +{ + uint32_t tmcct_prev = *tmcct = apic_tmcct_read(), tmcct_min = ~0; + uint64_t best = best; + unsigned int i; + + for ( i = 0; ; ++i ) + { + uint64_t pt = plt_src.read_counter(); + uint32_t tmcct_cur = apic_tmcct_read(); + uint32_t tmcct_delta = tmcct_prev - tmcct_cur; + + if ( tmcct_delta < tmcct_min ) + { + tmcct_min = tmcct_delta; + *tmcct = tmcct_cur; + best = pt; + } + else if ( i > 2 ) + break; + + tmcct_prev = tmcct_cur; + } + + return best; +} + +uint64_t __init calibrate_apic_timer(void) +{ + uint32_t start, end; + uint64_t count = read_pt_and_tmcct(&start), elapsed; + uint64_t target = CALIBRATE_VALUE(plt_src.frequency), actual; + uint64_t mask = (uint64_t)~0 >> (64 - plt_src.counter_bits); + + /* + * PIT cannot be used here as it requires the timer interrupt to maintain + * its 32-bit software counter, yet here we run with IRQs disabled. + */ + if ( using_pit ) + return 0; + + while ( ((plt_src.read_counter() - count) & mask) < target ) + continue; + + actual = read_pt_and_tmcct(&end) - count; + elapsed = start - end; + + if ( likely(actual > target) ) + { + /* See the comment in calibrate_tsc(). */ + while ( unlikely(actual > (uint32_t)actual) ) + { + actual >>= 1; + target >>= 1; + } + elapsed = muldiv64(elapsed, target, actual); + } + + return elapsed * CALIBRATE_FRAC; +} + u64 stime2tsc(s_time_t stime) { struct cpu_time *t; From patchwork Thu Mar 31 09:30:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 12796954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C588DC433FE for ; Thu, 31 Mar 2022 09:38:05 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.296826.505384 (Exim 4.92) (envelope-from ) id 1nZrFX-00028N-9V; Thu, 31 Mar 2022 09:37:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 296826.505384; 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For one make the TDCR write actually use APIC_DIVISOR. With the necessary mask constant introduced, also use that in vLAPIC code. While introducing the constant, drop APIC_TDR_DIV_TMBASE: The bit has been undefined in halfway recent SDM and PM versions. And then introduce a constant tying together the scale used when converting nanoseconds to bus clocks. No functional change intended. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- v3: Introduce and use PASTE() instead of (ab)using _AC(). v2: New. --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -1078,8 +1078,8 @@ static void __setup_APIC_LVTT(unsigned i lvtt_value = APIC_TIMER_MODE_ONESHOT | LOCAL_TIMER_VECTOR; apic_write(APIC_LVTT, lvtt_value); - tmp_value = apic_read(APIC_TDCR); - apic_write(APIC_TDCR, tmp_value | APIC_TDR_DIV_1); + tmp_value = apic_read(APIC_TDCR) & ~APIC_TDR_DIV_MASK; + apic_write(APIC_TDCR, tmp_value | PASTE(APIC_TDR_DIV_, APIC_DIVISOR)); apic_write(APIC_TMICT, clocks / APIC_DIVISOR); } @@ -1212,6 +1212,8 @@ uint32_t __init apic_tmcct_read(void) * APIC irq that way. */ +#define BUS_SCALE_SHIFT 18 + static void __init calibrate_APIC_clock(void) { unsigned long bus_freq; /* KAF: pointer-size avoids compile warns. */ @@ -1265,8 +1267,8 @@ static void __init calibrate_APIC_clock( /* set up multipliers for accurate timer code */ bus_cycle = 1000000000000UL / bus_freq; /* in pico seconds */ bus_cycle += (1000000000000UL % bus_freq) * 2 > bus_freq; - bus_scale = (1000*262144)/bus_cycle; - bus_scale += ((1000 * 262144) % bus_cycle) * 2 > bus_cycle; + bus_scale = (1000 << BUS_SCALE_SHIFT) / bus_cycle; + bus_scale += ((1000 << BUS_SCALE_SHIFT) % bus_cycle) * 2 > bus_cycle; apic_printk(APIC_VERBOSE, "..... bus_scale = %#x\n", bus_scale); /* reset APIC to zero timeout value */ @@ -1353,7 +1355,8 @@ int reprogram_timer(s_time_t timeout) } if ( timeout && ((expire = timeout - NOW()) > 0) ) - apic_tmict = min_t(u64, (bus_scale * expire) >> 18, UINT_MAX); + apic_tmict = min_t(uint64_t, (bus_scale * expire) >> BUS_SCALE_SHIFT, + UINT32_MAX); apic_write(APIC_TMICT, (unsigned long)apic_tmict); --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -580,7 +580,7 @@ static uint32_t vlapic_get_tmcct(const s static void vlapic_set_tdcr(struct vlapic *vlapic, unsigned int val) { /* Only bits 0, 1 and 3 are settable; others are MBZ. */ - val &= 0xb; + val &= APIC_TDR_DIV_MASK; vlapic_set_reg(vlapic, APIC_TDCR, val); /* Update the demangled hw.timer_divisor. */ @@ -888,7 +888,7 @@ void vlapic_reg_write(struct vcpu *v, un { uint32_t current_divisor = vlapic->hw.timer_divisor; - vlapic_set_tdcr(vlapic, val & 0xb); + vlapic_set_tdcr(vlapic, val); vlapic_update_timer(vlapic, vlapic_get_reg(vlapic, APIC_LVTT), false, current_divisor); @@ -1020,7 +1020,7 @@ int guest_wrmsr_x2apic(struct vcpu *v, u break; case APIC_TDCR: - if ( msr_content & ~APIC_TDR_DIV_1 ) + if ( msr_content & ~APIC_TDR_DIV_MASK ) return X86EMUL_EXCEPTION; break; --- a/xen/arch/x86/include/asm/apicdef.h +++ b/xen/arch/x86/include/asm/apicdef.h @@ -106,7 +106,7 @@ #define APIC_TMICT 0x380 #define APIC_TMCCT 0x390 #define APIC_TDCR 0x3E0 -#define APIC_TDR_DIV_TMBASE (1<<2) +#define APIC_TDR_DIV_MASK 0xB #define APIC_TDR_DIV_1 0xB #define APIC_TDR_DIV_2 0x0 #define APIC_TDR_DIV_4 0x1 --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -13,6 +13,10 @@ #define count_args(args...) \ count_args_(., ## args, 8, 7, 6, 5, 4, 3, 2, 1, 0) +/* Indirect macros required for expanded argument pasting. */ +#define PASTE_(a, b) a ## b +#define PASTE(a, b) PASTE_(a, b) + #ifndef __ASSEMBLY__ #include From patchwork Thu Mar 31 09:31:02 2022 Content-Type: text/plain; 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Signed-off-by: Jan Beulich Reviewed-by: Julien Grall Reviewed-by: Roger Pau Monné --- v4: New. --- Originally I thought I'd also move KB() etc, but they're used in places where yet further adjustments (adding of #include) would be necessary. --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -3,6 +3,7 @@ /* Modified for ARM Xen by Ian Campbell */ #include +#include #include #undef ENTRY #undef ALIGN --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -2,6 +2,7 @@ /* Modified for i386/x86-64 Xen by Keir Fraser */ #include +#include #include #undef ENTRY #undef ALIGN --- a/xen/include/xen/config.h +++ b/xen/include/xen/config.h @@ -82,11 +82,6 @@ #define MB(_mb) (_AC(_mb, ULL) << 20) #define GB(_gb) (_AC(_gb, ULL) << 30) -#define IS_ALIGNED(val, align) (((val) & ((align) - 1)) == 0) - -#define __STR(...) #__VA_ARGS__ -#define STR(...) __STR(__VA_ARGS__) - /* allow existing code to work with Kconfig variable */ #define NR_CPUS CONFIG_NR_CPUS --- a/xen/include/xen/lib.h +++ b/xen/include/xen/lib.h @@ -3,6 +3,8 @@ #define ROUNDUP(x, a) (((x) + (a) - 1) & ~((a) - 1)) +#define IS_ALIGNED(val, align) (!((val) & ((align) - 1))) + #define DIV_ROUND(n, d) (((n) + (d) / 2) / (d)) #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) @@ -17,6 +19,9 @@ #define PASTE_(a, b) a ## b #define PASTE(a, b) PASTE_(a, b) +#define __STR(...) #__VA_ARGS__ +#define STR(...) __STR(__VA_ARGS__) + #ifndef __ASSEMBLY__ #include From patchwork Thu Mar 31 09:31:38 2022 Content-Type: text/plain; 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Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- I wasn't really sure whether it would be better to use simply void * for the type of the expression, resulting in an undesirable data -> function pointer conversion, but making it impossible to mistakenly try and call the (fake) function directly. --- v2: Comment wording. --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -607,10 +607,12 @@ static s64 __init cf_check init_tsc(stru return ret; } -static uint64_t __init cf_check read_tsc(void) -{ - return rdtsc_ordered(); -} +/* + * plt_tsc's read_counter hook is not (and should not be) invoked via the + * struct field. To avoid carrying an unused, indirectly reachable function, + * poison the field with an easily identifiable non-canonical pointer. + */ +#define read_tsc ((uint64_t(*)(void))0x75C75C75C75C75C0ul) static struct platform_timesource __initdata_cf_clobber plt_tsc = {