From patchwork Fri Apr 1 14:58:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12798450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7AA37C433F5 for ; Fri, 1 Apr 2022 15:54:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345180AbiDAP4Z (ORCPT ); Fri, 1 Apr 2022 11:56:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348480AbiDAPQt (ORCPT ); Fri, 1 Apr 2022 11:16:49 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B96B3A72F for ; Fri, 1 Apr 2022 07:58:28 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id u3so4665007wrg.3 for ; Fri, 01 Apr 2022 07:58:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ICeNYWa2Lu8MC4Yz+R4SAQRJBRHRTm1TYs96sZ9kNyc=; b=ebPjWiuajvdUO0CovP7ziagVo1cBG6ynbEdtJ9TwK+Ai5vXtgkIftvEib2Zi0MZNJJ Y0retZHoniG6FmRwBBuVvXKI2VVB2IO2JZ4fk1O5TW941s23XBjB3+X8Tld8HkzfbVWq kOXNee+vDaBX2ylx6olaxAz1wP+MOtovAC9UexyVe32kQ7T355lUquHKxuk4WXXpxZO4 /ZyHaLKssQtWz9mvjz7oCqjuuOZzqZgbt3qe2b1qDs0ocqFYj8uM4Vm4krLtXn25du8X r2UfV3GKJGu3yXMFJsNVwHKt6drobF/7XW+1zkOpRtzn564uu0S8Tvlyfd3mBgM5pUJ5 iIzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ICeNYWa2Lu8MC4Yz+R4SAQRJBRHRTm1TYs96sZ9kNyc=; b=wm3edKyIU6R4Tto6smy1aVwKAyu3HE5cdfzr0k0Zale0lhioBToYWl1OUWpioRZMlQ KZj1eqY4a1SqMTBIRgOhCWbWTjH3w2q/OX+vb6LGVPCGiUvPggaOaW98jENQ1HGdyvdh 7mQnTcvCUn+460oMN8K0GuNx91ezenQkpCncoYZlj1Y+FTltxWGxMsgU6hEkm+ewfOfJ Wsfez58b8hpqPD5Q3izZWTP3wdjQ/3wqU8BsGySALnVGcXTg7Et7mlooVeeZ8jXsKR54 ZTZD1kA2eRTZoKTd66KI3qclzfaURzNPoA99LJ4KzNsxvOE5Ri5KkVDs5ay3+GaLJLuj S2qg== X-Gm-Message-State: AOAM533c8Am1WeRLqPbal7AubnsckO1gecC8TLCAQblS2oo4s/qBqdUh o4kzj1sVd+XgNuFuYGKLI1ZcZaJqstB9mV1r X-Google-Smtp-Source: ABdhPJw+xy1DDvUDde0B9+44fl6cDuv49xHXyxQV9kuD+BTp4u3uSkrp32L1vOH8RhMpaqHPA0hXSg== X-Received: by 2002:adf:d1cc:0:b0:203:e857:85b4 with SMTP id b12-20020adfd1cc000000b00203e85785b4mr7817426wrd.666.1648825106657; Fri, 01 Apr 2022 07:58:26 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:26 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 1/4] dt-bindings: clock: qcom,gcc-sdm845: add parent power domain Date: Fri, 1 Apr 2022 16:58:17 +0200 Message-Id: <20220401145820.1003826-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Allow Qualcomm GCC to register its parent power domain (e.g. RPMHPD) to properly pass performance state from children. Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml index d902f137ab17..5fe1b2c42d5a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml @@ -43,6 +43,9 @@ properties: '#reset-cells': const: 1 + powert-domains: + maxItems: 1 + '#power-domain-cells': const: 1 From patchwork Fri Apr 1 14:58:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12798453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23340C433FE for ; Fri, 1 Apr 2022 15:54:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245360AbiDAP4l (ORCPT ); Fri, 1 Apr 2022 11:56:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350029AbiDAPQ7 (ORCPT ); Fri, 1 Apr 2022 11:16:59 -0400 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B5295749C for ; Fri, 1 Apr 2022 07:58:29 -0700 (PDT) Received: by mail-wm1-x336.google.com with SMTP id p12-20020a05600c430c00b0038cbdf52227so1634122wme.2 for ; Fri, 01 Apr 2022 07:58:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yqbLlrGI5hQozEiXWqvYHfniIQNP30Oy/0VrdHfx3iM=; b=V6jnvv6r9YfrqJxCPQR1XE4lXQoRmZhPDn4dIIIzVBExn/Frnd7K88FyQ3Azz/4YCe pb5ofMYAupzvIsopvutp/5h8LqWvqPHviJGWrqON/KjZwQmjwY58XoYOLeIxJMd1daXd igXzQKXqdMtUL5UCNndmU7iBMC2SnoJdqy//ej5rcFNMasoLMR598HrXFn3iMJVjb5fU +76H9dZ62+a6XeB2CAVqEmKGjMiFbpgFyhg9dzu3FM5ETYFde6rBqPxj5/Z5TCFleIqI xeHbP/8+XCwa/zzfdo2rc4NsHQw62BC0VFBMESrd65qg1ichA7hFg7AnStI/h0dbf8El Lg/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yqbLlrGI5hQozEiXWqvYHfniIQNP30Oy/0VrdHfx3iM=; b=Dcbd9pPkLR9C3NtIGpeWmwsyUc1ZTt7ks1sCd76ytTwoHHA5pvsy+GX8S/in6Zbimy AOVzyDuzB9DB1INgsdKzgDkVKhh68LsqLVxjEGCBbdXTEceykoWo7w7jo/LzX4Se8ix/ u8f/yb4ajeM3qF7b3O0qWX4YlTfko2wtUQJOV/Acl+NvNLDHmxTjoN+bnnlnBGdl2JLX ocP55fSY+KQ3ZjbpvHM6t/TLCAaPVkEdJ/fSTAuN6Eer0Ct/+Ss8+QRThVU93siy831w c5Mf8qvumLXjJnLk41/DsUie2ZP6KVrmDmygJ6uNF9sxCS6IdOhVX1MsAfhLSW0e/JNS RN9w== X-Gm-Message-State: AOAM530REVdd8aekxubluWJvbNyiw6lc9ocP2YhaS+61FHc7hiRyEg/T aKzhnrVLOTVzK0O3s0EW3XgZTQ== X-Google-Smtp-Source: ABdhPJxoCjSfUmJbbPFgP2qiKOG3R/tDXS/3ENLP1/9vqNzDjL9anir03X+Nj40T0FEdFVBXe1N2dA== X-Received: by 2002:a1c:f418:0:b0:38e:579a:da73 with SMTP id z24-20020a1cf418000000b0038e579ada73mr2955585wma.197.1648825107790; Fri, 01 Apr 2022 07:58:27 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:27 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 2/4] dt-bindings: ufs: common: allow OPP table Date: Fri, 1 Apr 2022 16:58:18 +0200 Message-Id: <20220401145820.1003826-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Except scaling UFS and bus clocks, it's necessary to scale also the voltages of regulators or power domain performance state levels. Adding Operating Performance Points table allows to adjust power domain performance state, depending on the UFS clock speed. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/ufs/ufs-common.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml index 47a4e9e1a775..ce767bfbf05a 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -26,6 +26,9 @@ properties: array is "0" then it is assumed that the frequency is set by the parent clock or a fixed rate clock source. + operating-points-v2: true + opp-table: true + interrupts: maxItems: 1 @@ -75,6 +78,7 @@ properties: dependencies: freq-table-hz: [ 'clocks' ] + operating-points-v2: [ 'freq-table-hz' ] required: - interrupts From patchwork Fri Apr 1 14:58:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12798451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11983C43217 for ; Fri, 1 Apr 2022 15:54:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244518AbiDAP4i (ORCPT ); Fri, 1 Apr 2022 11:56:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60564 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344057AbiDAPRL (ORCPT ); Fri, 1 Apr 2022 11:17:11 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 73FC25AA60 for ; Fri, 1 Apr 2022 07:58:30 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id bi13-20020a05600c3d8d00b0038c2c33d8f3so3665594wmb.4 for ; Fri, 01 Apr 2022 07:58:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K8iJL2q3As3zzwdz8529fEEZQXinzEbA6iVffO5JCw4=; b=gAw9uKXxBpP0+l/FsExGrFZKGlfbBOnEzDF2KtQgPGeonCt5ot3PcKIvm+oUPMtT8n y5ZqXPaqAarqpi8xfYYLJvu5tzPW9wT70R3am9D7xFITmMFwt4vsYIVqX/n8dhCnsH85 Ai6a5VeuNV4ZTtZBlcot20j4htC0DD/R4/mPB19BrA5i1HyplNnU9mSSOc0QsDhZ44x4 aZfaQ07vN4E/mgE4B1qqbokUKXCPJpaI0z7l5Y7d4Z9vF2GgZScHNyfiIVXhDS4W1IOu mowELakVMDfvVYVilPSjq6nwCjV6Zv1fbAqINaNJAy8z4f/Gw2HMoMgFBEYqlSiY/QWc Go5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K8iJL2q3As3zzwdz8529fEEZQXinzEbA6iVffO5JCw4=; b=FFfVFRoiezEhErvwbghAe8faYnmChp8IM9r9z/Ey+0PXjka+mxhkkYfXt0itudQjXc PhauZa11sgQ+ZqFDMNI/MlUzSvTtlaG7W3kcX5ohXsoHNYYNgc2JrQve3vAEl1y0l8dJ odRtZNzJ1a1hKSNCOAcyziwgNiwEl/nLtEX8CF8EPhCaRODLiSLM0rNKpu3yLcGQA10s IVD9buXqiVdpiCB4/nPOJ421Cf0q3/LpWoZChxOzo8vwBOWSA2J0iUxfNIx6gmP1lfDC JX6cHCZYudhYoVyIsu3naC/0zRl8qSUojrF608FhNJiwzWi3QTApYAEWnZBj7Dlb1TFj 5Dpg== X-Gm-Message-State: AOAM533c83SRFFgoKTZbUv7x9BquUa20/3sjkaDptVp9dCEj5yCrNPXY ZtvVqM6Yh+VsmUVrW+HV/lmnHw== X-Google-Smtp-Source: ABdhPJzRdJIaIzMFeeJvk97VMkntf14Z4PyRXAxrDx3BRlFhHFG2iJWpnqp97DFOyl9gYTo2sakUJA== X-Received: by 2002:a1c:7308:0:b0:38c:7b63:e385 with SMTP id d8-20020a1c7308000000b0038c7b63e385mr9094276wmb.116.1648825108956; Fri, 01 Apr 2022 07:58:28 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:28 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 3/4] arm64: dts: qcom: sdm845: control RPMHPD performance states with UFS Date: Fri, 1 Apr 2022 16:58:19 +0200 Message-Id: <20220401145820.1003826-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org UFS, when scaling gears, should choose appropriate performance state of RPMHPD power domain controller. Since UFS belongs to UFS_PHY_GDSC power domain, add necessary parent power domain to GCC. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b31bf62e8680..c999b41c2605 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1078,6 +1078,7 @@ gcc: clock-controller@100000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + power-domains = <&rpmhpd SDM845_CX>; }; qfprom@784000 { @@ -2336,8 +2337,22 @@ ufs_mem_hc: ufshc@1d84000 { <0 0>, <0 0>, <0 300000000>; - + operating-points-v2 = <&ufs_opp_table>; status = "disabled"; + + ufs_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; }; ufs_mem_phy: phy@1d87000 { From patchwork Fri Apr 1 14:58:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12798452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2A60C4332F for ; Fri, 1 Apr 2022 15:54:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238301AbiDAP4e (ORCPT ); Fri, 1 Apr 2022 11:56:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349535AbiDAPRL (ORCPT ); Fri, 1 Apr 2022 11:17:11 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C706116E7D8 for ; Fri, 1 Apr 2022 07:58:31 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id k124-20020a1ca182000000b0038c9cf6e2a6so1652180wme.0 for ; Fri, 01 Apr 2022 07:58:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gtC9x4ytC3JDkJusbSvfvwpkttX0Il5swFlaQVUSd6c=; b=kK1jfQ/KvmctsoV8Tq0dqinBZV+u8tXoMPNhe3nJx+b+MoKfJNH5DCOS/7mnV7dRhk q7YGYC7vI4tS09qSlHHi5vYpf2gJQgGEn/kEG8zveAPRv31NwjTAvHxO35H7LqmbArFn 2hZ4i1umE/adcAO/idQ50Om0Yl8lWDwl6IfGWmEWrB5IpwJig/nA7gDhEV9VDy8qdtou gEVysoaVnaGHsMfJKA0Tx3mTsavQEGHggt9MOxnUCdhgp+07onYLi/unPjqxGQcnQKKM g7d6FKvax+/9q50tUz1Vz8qjUxPUmkMoS5QxH8Jc31ELRcrr3z16cjH14w6SFy+e55eX tS8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gtC9x4ytC3JDkJusbSvfvwpkttX0Il5swFlaQVUSd6c=; b=mdOsSrJxavbbYszuzrcR6glapThNhAIGKnYyk5t24GmMxWH1u7ajVd6pWwKIxVZ2pL JWvxuyKVls31xY+XG8aFz6ln/tlfP9+LtDVuuBesd1IT6P8DUK4Fjhbz+KQJogBLKbzT zfLNQaQAIbyq/Ez7mTBoZFS+2VcsRulo+pIvFg15MzU3PC+GE6VDSNfOFPFsyqsMTzW8 dxA2FBN4t29paqUWbo3klPZsQcSAaAllItQuOfXUJwKAEgGh3Q7nk2oHq78Gbh4dEfBH bYz54+O5b6U4JhN4OCjRf5NhhbFnyII3Sg8xAnNMVb6LQwwBE+K5577mrHwLDAwuxWgM zONg== X-Gm-Message-State: AOAM530AIQIWyiDCBCbs/SyWsw2RQZq+rCl7CZ0ycnF8zw2WVm8zyduo sZFu8OIXscRZ1Ph1mJqqBFm3yg== X-Google-Smtp-Source: ABdhPJwtaWcw36Blxc0IzRLdygI31LgDSHd4FsVTGI0QR6xX+M9Y0j+RkfQerB0BG0DZ9gy7GpF2HA== X-Received: by 2002:a05:600c:34ce:b0:38c:a579:944a with SMTP id d14-20020a05600c34ce00b0038ca579944amr9037672wmq.113.1648825110300; Fri, 01 Apr 2022 07:58:30 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:29 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 4/4] ufs: set power domain performance state when scaling gears Date: Fri, 1 Apr 2022 16:58:20 +0200 Message-Id: <20220401145820.1003826-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Scaling gears requires not only scaling clocks, but also voltage levels, e.g. via performance states. USe the provided OPP table, to set proper OPP frequency which through required-opps will trigger performance state change. Signed-off-by: Krzysztof Kozlowski --- drivers/scsi/ufs/ufshcd-pltfrm.c | 6 +++++ drivers/scsi/ufs/ufshcd.c | 42 +++++++++++++++++++++++++------- drivers/scsi/ufs/ufshcd.h | 3 +++ 3 files changed, 42 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c index cca4b2181a81..c8f19b54be92 100644 --- a/drivers/scsi/ufs/ufshcd-pltfrm.c +++ b/drivers/scsi/ufs/ufshcd-pltfrm.c @@ -360,6 +360,12 @@ int ufshcd_pltfrm_init(struct platform_device *pdev, goto dealloc_host; } + if (devm_pm_opp_of_add_table(dev)) + dev_dbg(dev, "no OPP table (%d), no performance state control\n", + err); + else + hba->use_pm_opp = true; + ufshcd_init_lanes_per_dir(hba); err = ufshcd_init(hba, mmio_base, irq); diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 3f9caafa91bf..84912db86da8 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -1164,11 +1164,16 @@ static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba, static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up) { int ret = 0; + struct ufs_clk_info *clki; + unsigned long pm_opp_target_rate; struct ufs_pa_layer_attr new_pwr_info; + clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list); + if (scale_up) { memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info, sizeof(struct ufs_pa_layer_attr)); + pm_opp_target_rate = clki->max_freq; } else { memcpy(&new_pwr_info, &hba->pwr_info, sizeof(struct ufs_pa_layer_attr)); @@ -1184,6 +1189,13 @@ static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up) new_pwr_info.gear_tx = hba->clk_scaling.min_gear; new_pwr_info.gear_rx = hba->clk_scaling.min_gear; } + pm_opp_target_rate = clki->min_freq; + } + + if (hba->use_pm_opp && scale_up) { + ret = dev_pm_opp_set_rate(hba->dev, pm_opp_target_rate); + if (ret) + return ret; } /* check if the power mode needs to be changed or not? */ @@ -1194,6 +1206,11 @@ static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up) hba->pwr_info.gear_tx, hba->pwr_info.gear_rx, new_pwr_info.gear_tx, new_pwr_info.gear_rx); + if (ret && hba->use_pm_opp && scale_up) + dev_pm_opp_set_rate(hba->dev, hba->devfreq->previous_freq); + else if (hba->use_pm_opp && !scale_up) + ret = dev_pm_opp_set_rate(hba->dev, pm_opp_target_rate); + return ret; } @@ -1435,9 +1452,11 @@ static int ufshcd_devfreq_init(struct ufs_hba *hba) if (list_empty(clk_list)) return 0; - clki = list_first_entry(clk_list, struct ufs_clk_info, list); - dev_pm_opp_add(hba->dev, clki->min_freq, 0); - dev_pm_opp_add(hba->dev, clki->max_freq, 0); + if (!hba->use_pm_opp) { + clki = list_first_entry(clk_list, struct ufs_clk_info, list); + dev_pm_opp_add(hba->dev, clki->min_freq, 0); + dev_pm_opp_add(hba->dev, clki->max_freq, 0); + } ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile, &hba->vps->ondemand_data); @@ -1449,8 +1468,10 @@ static int ufshcd_devfreq_init(struct ufs_hba *hba) ret = PTR_ERR(devfreq); dev_err(hba->dev, "Unable to register with devfreq %d\n", ret); - dev_pm_opp_remove(hba->dev, clki->min_freq); - dev_pm_opp_remove(hba->dev, clki->max_freq); + if (!hba->use_pm_opp) { + dev_pm_opp_remove(hba->dev, clki->min_freq); + dev_pm_opp_remove(hba->dev, clki->max_freq); + } return ret; } @@ -1462,7 +1483,6 @@ static int ufshcd_devfreq_init(struct ufs_hba *hba) static void ufshcd_devfreq_remove(struct ufs_hba *hba) { struct list_head *clk_list = &hba->clk_list_head; - struct ufs_clk_info *clki; if (!hba->devfreq) return; @@ -1470,9 +1490,13 @@ static void ufshcd_devfreq_remove(struct ufs_hba *hba) devfreq_remove_device(hba->devfreq); hba->devfreq = NULL; - clki = list_first_entry(clk_list, struct ufs_clk_info, list); - dev_pm_opp_remove(hba->dev, clki->min_freq); - dev_pm_opp_remove(hba->dev, clki->max_freq); + if (!hba->use_pm_opp) { + struct ufs_clk_info *clki; + + clki = list_first_entry(clk_list, struct ufs_clk_info, list); + dev_pm_opp_remove(hba->dev, clki->min_freq); + dev_pm_opp_remove(hba->dev, clki->max_freq); + } } static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 88c20f3608c2..3bd02095897f 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -776,6 +776,8 @@ struct ufs_hba_monitor { * @auto_bkops_enabled: to track whether bkops is enabled in device * @vreg_info: UFS device voltage regulator information * @clk_list_head: UFS host controller clocks list node head + * @use_pm_opp: whether OPP table is provided and scaling gears should trigger + * setting OPP * @pwr_info: holds current power mode * @max_pwr_info: keeps the device max valid pwm * @clk_scaling_lock: used to serialize device commands and clock scaling @@ -894,6 +896,7 @@ struct ufs_hba { bool auto_bkops_enabled; struct ufs_vreg_info vreg_info; struct list_head clk_list_head; + bool use_pm_opp; /* Number of requests aborts */ int req_abort_count;