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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id k18-20020a056a00135200b004fb18fc6c78sm4374471pfu.31.2022.04.01.17.21.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 17:21:25 -0700 (PDT) Date: Fri, 01 Apr 2022 17:21:25 -0700 (PDT) X-Google-Original-Date: Fri, 01 Apr 2022 17:19:22 PDT (-0700) Subject: [GIT PULL] A single RISC-V fix, ideally for 5.18-rc1 CC: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, robh@kernel.org From: Palmer Dabbelt To: Linus Torvalds Message-ID: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220401_172126_750724_D2047C81 X-CRM114-Status: GOOD ( 10.81 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org merged tag 'riscv-for-linus-5.18-mw1' The following changes since commit a3dfc532b8731843c12bdc45e804eacc47e51e50: Merge tag 'riscv-for-linus-5.18-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2022-04-01 13:31:57 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.18-mw2 for you to fetch changes up to 2524257bce43610f5ec14feccbacf7a103cae94a: dt-bindings: Fix phandle-array issues in the idle-states bindings (2022-04-01 15:09:50 -0700) ---------------------------------------------------------------- A single RISC-V fix, ideally for 5.18-rc1 * Fix the RISC-V section of the generic CPU idle bindings to comply with the recently tightened DT schema. ---------------------------------------------------------------- This is a very recently written, reviewed, and committed patch. I usually don't like doing that, as it means it won't round trip through linux-next (and the automatic builds), but I think this is a good candidate for breaking the rules: we know this breaks the generic DT schema checks, it's been pretty extensively reviewed (thanks to Rob for the help), and it's very late already. We have a handful of other DT schema related failures on RISC-V, but it looks like those have been around for a while now. I've got the test running locally and will chase those around, but this one breaks the generic schema checks so I figured it's best not to delay. The caveats about that allyesconfig driver build breakages apply, as they did this morning. Otherwise this is still clean. Sorry for the headaches! ---------------------------------------------------------------- Palmer Dabbelt (1): dt-bindings: Fix phandle-array issues in the idle-states bindings Documentation/devicetree/bindings/cpu/idle-states.yaml | 16 ++++++++-------- Documentation/devicetree/bindings/riscv/cpus.yaml | 2 ++ 2 files changed, 10 insertions(+), 8 deletions(-)