From patchwork Sat Apr 2 05:12:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuldeep Singh X-Patchwork-Id: 12798952 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 897BEC433F5 for ; Sat, 2 Apr 2022 05:12:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239431AbiDBFOK (ORCPT ); Sat, 2 Apr 2022 01:14:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229992AbiDBFOH (ORCPT ); Sat, 2 Apr 2022 01:14:07 -0400 Received: from mail-pg1-x533.google.com (mail-pg1-x533.google.com [IPv6:2607:f8b0:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC20218A3C6; Fri, 1 Apr 2022 22:12:16 -0700 (PDT) Received: by mail-pg1-x533.google.com with SMTP id bc27so3888019pgb.4; Fri, 01 Apr 2022 22:12:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rl2KiTAWf0g00it/ZPSsvEky7u8HEu4NJtG420APAuk=; b=pMLcOSgwPDpGjFg22gpvLL3HUaQ5GBhg+F+vhrNuJ7sn8njlR720CU45G9Mfh1YNra 81DNYbLj0VQ7MkSs307Cwg5KhcwJSiNCXj7fUXBX7ov4KwYsxd7B6EvtLfxeMvjbAuVj yg3UGtlTxUacHQTuDuVlCH6ME02k4aw8HxUsGi8Tpx0fVVOyOfylHvOHiI2xoncw/OmX t4JxNYGQpAOK+liQYY6o772FGGwabE2//AqPOWgAjSuX1mEWy8BrOlgeqmyL/LxLtKPu WQdGHe+GiMQAYWbBSDcnioLHZEhyYcBIABb60KgZGfAtoApj4dwU30JM4bWfbmladk/0 4kBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rl2KiTAWf0g00it/ZPSsvEky7u8HEu4NJtG420APAuk=; b=ch7FmaEHDtj0HgTn4+AOVkXM7WDUsi/XjX0U/7Kpb/VfsJhNFoYF7AlydCUgy3hzlF va2MVHhkejfjw/q0KE5c3M7onyhpFQQ1xq0F8G6Mp+vLE6yr5tTXGLeCgdTK+gb/zDTe Rfb6occy+0RW5z+m+Gd+cW7ISp28uD3YMBigkBqwdhPdwLLt5kKVVkkc+jqCk0c/9CDO oicQpTjH2lQL4BO9icccnslklkp4Rs+VVumG1aK0BNje3WbdGeiZLmZEJam9kx4+bFgi XJ02yBhHXDFClwlc95rosWwMOVUW9WrxMk/n/n4CI9I7B84A9a7GcQhYQ01hNw0NqWoJ TNgg== X-Gm-Message-State: AOAM533jIWmyjB5TEOK0kWgRVAT84KRn+wBMBLU+Mk4ADFM/p8XDJgCH 23XlQhXvtJ/ubLoVpMsILVOfLG4QFNo= X-Google-Smtp-Source: ABdhPJy2u7ia0T2Lfe/8PhBVofJtraBQrliS6X0IGjCuawW2YSexmh95QjVsvTVmV+xHf7q2mpVMdQ== X-Received: by 2002:a63:788f:0:b0:386:3116:818c with SMTP id t137-20020a63788f000000b003863116818cmr17329345pgc.414.1648876336318; Fri, 01 Apr 2022 22:12:16 -0700 (PDT) Received: from localhost.localdomain ([122.161.51.18]) by smtp.gmail.com with ESMTPSA id u10-20020a63b54a000000b00380ea901cd2sm3834721pgo.6.2022.04.01.22.12.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 22:12:16 -0700 (PDT) From: Kuldeep Singh To: Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/5] dt-bindings: i2c: Add Qualcomm Geni based QUP i2c bindings Date: Sat, 2 Apr 2022 10:42:02 +0530 Message-Id: <20220402051206.6115-2-singh.kuldeep87k@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> References: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org GENI(generic interface) based Qualcomm Universal Peripheral controller can support multiple serial interfaces like spi,uart and i2c. Unlike other i2c controllers, QUP i2c bindings are present in parent schema. Move it out from parent to an individual binding and let parent refer to child schema later on. Please note, current schema isn't complete as it misses out few properties and thus, add these missing properties along the process. Signed-off-by: Kuldeep Singh --- .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 110 ++++++++++++++++++ 1 file changed, 110 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml new file mode 100644 index 000000000000..01a02e680ea3 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Geni based QUP I2C Controller + +maintainers: + - Andy Gross + - Bjorn Andersson + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - qcom,geni-i2c + + clocks: + maxItems: 1 + + clock-names: + const: se + + clock-frequency: + description: Desired I2C bus clock frequency in Hz + default: 100000 + + interconnects: + maxItems: 3 + + interconnect-names: + items: + - const: qup-core + - const: qup-config + - const: qup-memory + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + required-opps: + maxItems: 1 + + dmas: + maxItems: 2 + + dma-names: + items: + - const: tx + - const: rx + + pinctrl-0: true + pinctrl-1: true + + pinctrl-names: + minItems: 1 + items: + - const: default + - const: sleep + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - interrupts + - clocks + - clock-names + - reg + - "#address-cells" + - "#size-cells" + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + i2c@88000 { + compatible = "qcom,geni-i2c"; + reg = <0x00880000 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c0_default>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, + <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + required-opps = <&rpmhpd_opp_low_svs>; + }; +... From patchwork Sat Apr 2 05:12:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuldeep Singh X-Patchwork-Id: 12798953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8AEFC4332F for ; Sat, 2 Apr 2022 05:12:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352166AbiDBFOP (ORCPT ); Sat, 2 Apr 2022 01:14:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242466AbiDBFOL (ORCPT ); Sat, 2 Apr 2022 01:14:11 -0400 Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81A21189A2C; Fri, 1 Apr 2022 22:12:20 -0700 (PDT) Received: by mail-pg1-x52f.google.com with SMTP id w21so3880983pgm.7; Fri, 01 Apr 2022 22:12:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UDSgYN32AfJHFFW2LrlYc4myT1RM3QFcvjBNtontNQc=; b=nDYr8PrtODpKNUYnnfIslPNPRpnlNV5yEWDzDRrEghy6uBz5VmjpZJKFmSb7mW+beL Or6XX3/OQZt0VJ377PuFXGOXznQJXWJ46NMw5OpVvwLLK1Ub55ymWZB1uTJa9Mjkf7NO YxZ5P6pEII2wbUv4rrZ666ZEnQB722BuZSdtpZgH9tsZLgrTWtqY5Yzy2/RTsa1p3kSy FFDdmFPT5f1HHS/wJq1OjlzBkf35bYWtDANpnZq1d6P2c+H+mMxqg7uNrdC36VIMPy9C 4Uwng0VVm8Lt/ch8Odw5eWxS15HwgzXubd8djhdHKXTYXv0LKX8WpNqT161ZMAl7hzP8 qWkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UDSgYN32AfJHFFW2LrlYc4myT1RM3QFcvjBNtontNQc=; b=YDkYgKMd789d4khrkkqTYPENgCBBzppFLe8oHah4B6+CvYfKK0H2B04ytZtLOAB8pD 3TcsQuE/UfH4oMZTwam3fftVZImIkX9CLOlcNoR2fgPfayZu/ItKK+pJU4gd88NAOXAA jBpA2fDf/IbjkBXPjmu2g2GdByq6InPVf8IgYtY7fvbuHgo18vt/m3XSM3ksK91nwH69 MwBwZaLoVHCawyExjtwT5nW+mgELiYkRA+vPXKvaKExF3nk7K1eVn7hlfzoP1F6jhZXq fRDX6O3Km6b2fN+uEa7dFl+TjSX1lr8wew40hoa6lhCDQahkiDNEpenfW2BX5+onkKNj xeyw== X-Gm-Message-State: AOAM531RdwfXOsCZeUqhJpJ+ad0J1A9luP16JAR2nxOLPjcmprZXkLk9 BmZ7XcPwxLPYsXie31BoD/M= X-Google-Smtp-Source: ABdhPJwODkvvt6gpU649zQUdVjC9Hm7ry105K6u6fX37gs2HhjAz5EjXSKOW+h/QzeHau6lFGhwmeQ== X-Received: by 2002:a63:ae03:0:b0:386:2b5d:dd7d with SMTP id q3-20020a63ae03000000b003862b5ddd7dmr17260234pgf.332.1648876339977; Fri, 01 Apr 2022 22:12:19 -0700 (PDT) Received: from localhost.localdomain ([122.161.51.18]) by smtp.gmail.com with ESMTPSA id u10-20020a63b54a000000b00380ea901cd2sm3834721pgo.6.2022.04.01.22.12.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 22:12:19 -0700 (PDT) From: Kuldeep Singh To: Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Mukesh Savaliya , Akash Asthana Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/5] dt-bindings: qcom: geni-se: Update i2c schema reference Date: Sat, 2 Apr 2022 10:42:03 +0530 Message-Id: <20220402051206.6115-3-singh.kuldeep87k@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> References: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We now have geni based QUP i2c controller binding in place as dt-bindigs/i2c/qcom,i2c-geni-qcom.yaml similar to other controllers, update reference in parent schema and while at it, also remove properties defined for the controller from commown wrapper. Signed-off-by: Kuldeep Singh Reviewed-by: Krzysztof Kozlowski --- .../bindings/soc/qcom/qcom,geni-se.yaml | 26 +------------------ 1 file changed, 1 insertion(+), 25 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index 95fcb43675d6..e6073923e03a 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -128,31 +128,7 @@ patternProperties: "i2c@[0-9a-f]+$": type: object description: GENI serial engine based I2C controller. - $ref: /schemas/i2c/i2c-controller.yaml# - - properties: - compatible: - enum: - - qcom,geni-i2c - - interrupts: - maxItems: 1 - - "#address-cells": - const: 1 - - "#size-cells": - const: 0 - - clock-frequency: - description: Desired I2C bus clock frequency in Hz. - default: 100000 - - required: - - compatible - - interrupts - - "#address-cells" - - "#size-cells" + $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml# "serial@[0-9a-f]+$": type: object From patchwork Sat Apr 2 05:12:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuldeep Singh X-Patchwork-Id: 12798954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98BB2C433EF for ; Sat, 2 Apr 2022 05:12:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343814AbiDBFOT (ORCPT ); Sat, 2 Apr 2022 01:14:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353742AbiDBFOP (ORCPT ); Sat, 2 Apr 2022 01:14:15 -0400 Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F20018D9AE; Fri, 1 Apr 2022 22:12:24 -0700 (PDT) Received: by mail-pg1-x52e.google.com with SMTP id k14so3935787pga.0; Fri, 01 Apr 2022 22:12:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MErvedHfDHC4lr+xkiSj1NOx3p7e7op+yy3jW2e34dI=; b=J1J5AyiKM1mnABNbsSad47zaxB3zki9ezzHOrLKCltEqxoW3hiCTrs5YvkV8RVA+Uv e4JIscypTiH3roW18PET81j5+hZintrUhxB1rxn7GwYHKEI31mhiGXe8EexttDM2Ugrz XEDe9Wb0YKpgZ0JEj8MPkk/wuQ8HLKHQsS4HHNnzyyn63botdv4cmxK0HE06Q7cUiJvq kWHpBBa6Dw6oexF5hbnspAStjULllvspFVCQakGeigEMUnGM1XswmrxAxLaC+4+uCUDv QBPdWnxXQ0n9mVg1YRC38/bsHThuNTEcXQaZR86viR0bp1InRTDIZ4OjYR5jvwWFfv7S OHXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MErvedHfDHC4lr+xkiSj1NOx3p7e7op+yy3jW2e34dI=; b=Ftr1pzHQBvKivg5yDv75CFNjCxzG0w1M+klIiLUwkLOKyMv8uAVKkakz3+O5Q7ztWC bRoA2+mXjfGwpVEI+Kb6pRpiAHi0KowJ+Kr32gvBH9QGHfGpQDwMgQZ1Hi9/q+Pv8+4I QdS7ibOxYdlKa8AjlBqTROseBHwPz4M5kGkn50NQ7skHFfQnGmHSbSe2LHbQf9xOSXfZ WsSgZRFxEOp2EiLE/+K1ED9EbxgIDK54kK7nXZgS19v/8j14ibPjOQx7908BlpRIAnPx k0lUi+/6uYnnbq1ezjxDXW6m7ff5qx3QsoFoI7z/R1+U/vqOrwoXBLta2B6ZtUzybCh4 w52Q== X-Gm-Message-State: AOAM531DkMnf7kDh5nOVy/v80iK9iOwPyIEiIwZcu4d+Ju0PZW/LNau7 QEMz+GRRlQnYo0X+Hd2Sy48bSaXmbiI= X-Google-Smtp-Source: ABdhPJwpo0SffUyF7/y1s+uJHNxuHjfDEdKm7Wa4JaOVgyke1VERVUw5eEsf7qWr+462HzK6oFNRFA== X-Received: by 2002:a63:d149:0:b0:384:b288:8704 with SMTP id c9-20020a63d149000000b00384b2888704mr17416252pgj.112.1648876343770; Fri, 01 Apr 2022 22:12:23 -0700 (PDT) Received: from localhost.localdomain ([122.161.51.18]) by smtp.gmail.com with ESMTPSA id u10-20020a63b54a000000b00380ea901cd2sm3834721pgo.6.2022.04.01.22.12.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 22:12:23 -0700 (PDT) From: Kuldeep Singh To: Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 3/5] dt-bindings: serial: Update Qualcomm geni based QUP uart bindings Date: Sat, 2 Apr 2022 10:42:04 +0530 Message-Id: <20220402051206.6115-4-singh.kuldeep87k@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> References: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Similar to i2c controller, move geni based QUP uart controller bindings out from parent schema to an individual binding and let parent refer to child schema later on. Uart bindings also stand incomplete right now similar to i2c, complete it along this process. Signed-off-by: Kuldeep Singh Reviewed-by: Krzysztof Kozlowski --- .../serial/qcom,serial-geni-qcom.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml new file mode 100644 index 000000000000..717b0909280a --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Geni based QUP UART interface + +maintainers: + - Andy Gross + - Bjorn Andersson + +allOf: + - $ref: /schemas/serial/serial.yaml# + +properties: + compatible: + enum: + - qcom,geni-uart + - qcom,geni-debug-uart + + clocks: + maxItems: 1 + + clock-names: + const: se + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: qup-core + - const: qup-config + + interrupts: + minItems: 1 + items: + - description: UART core irq + - description: Wakeup irq (RX GPIO) + + operating-points-v2: true + + power-domains: + maxItems: 1 + + reg: + maxItems: 1 + + pinctrl-0: true + pinctrl-1: true + + pinctrl-names: + minItems: 1 + items: + - const: default + - const: sleep + +required: + - compatible + - clocks + - clock-names + - interrupts + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + serial@a88000 { + compatible = "qcom,geni-uart"; + reg = <0xa88000 0x7000>; + interrupts = ; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; + pinctrl-0 = <&qup_uart0_default>; + pinctrl-names = "default"; + interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>; + interconnect-names = "qup-core", "qup-config"; + }; +... From patchwork Sat Apr 2 05:12:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuldeep Singh X-Patchwork-Id: 12798955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C70ABC43219 for ; Sat, 2 Apr 2022 05:12:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345658AbiDBFOT (ORCPT ); Sat, 2 Apr 2022 01:14:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353277AbiDBFOS (ORCPT ); Sat, 2 Apr 2022 01:14:18 -0400 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1A2718B78B; Fri, 1 Apr 2022 22:12:27 -0700 (PDT) Received: by mail-pj1-x1032.google.com with SMTP id gb19so4127783pjb.1; Fri, 01 Apr 2022 22:12:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9ASkqhn+Ws2GVvPf0vS7kIuEFmBPDha4A2HzB935p68=; b=e1lbEdiZdq0PAQTQCZasXGcZ1mBQ7Rm595RwbHP2YRyUDnaOtCFK8PRKIczZHAqjT0 p7S4T+3UCYunkuTAO7DKF+750Mo1af4vnUqKP90m4zY7ePKvLLUdZkGKf5FV+lsiN17g kunqPEKoEcSygm/+cyQKcbUxtCQSLA7GPKbE6EQprl09/bRWduZjmeJAx1Fz43kbwm0b w6XwqZbjBdQHDR5eXGgv2TyZRBgSloLLhYEAt9QpN3pckh9ylJlo8NweHM6db2GB0r+E HyD65SF+kmIPZQOAvqnR8wQ+tvfqveVyKUa8HirQ3huz6G/gJPrDezLFe9GeLkDYQCoS oujQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9ASkqhn+Ws2GVvPf0vS7kIuEFmBPDha4A2HzB935p68=; b=EmKB++C7ft34d8v7V0YHSFi9pNCIAvVuyRE4f/UsmN6ku8SmwSMettRyoi46hUHg1J kxgIBxQ0+OBpQ037DU5HANq7rJJuIYw1ppQ1wC7xSXqD1hI5DYpe2RXtnRXaKgElaXbG HHPNyHXmfe4idQZKkJUhmIWSqpBy0HS6aPl1uk3ldFEtvsSwFAAafI/dWBb3Jdh0r9// Uop7WqczMUPkzdh1GceiHR20ZTF5FXPYk/ms14Rg/c68PAdkeBlo/kaej7rSOpIs9QUI LwPHDlK4rPnodaIn056ciwkr5F5BSEx34+MXa+7tWOgLCfBZZHjt/Xc+yNE9OdJz/Pe0 OFFA== X-Gm-Message-State: AOAM531LtI40VsHOacwC1PPorhgtsMlY90dZ1RLd8tCr9+9AIr8hrAG2 nqVK3pUyrWXR/Rjj2DMA68md8m24+mo= X-Google-Smtp-Source: ABdhPJwODUyh9G4mZ4HaUXUpjheGq7uMjknjcI/TIrFlOJnyoZ7qX0lsOa4bvQD0jWP0aJTOmnIXbw== X-Received: by 2002:a17:90b:4c44:b0:1c7:1326:ec90 with SMTP id np4-20020a17090b4c4400b001c71326ec90mr15330351pjb.87.1648876347460; Fri, 01 Apr 2022 22:12:27 -0700 (PDT) Received: from localhost.localdomain ([122.161.51.18]) by smtp.gmail.com with ESMTPSA id u10-20020a63b54a000000b00380ea901cd2sm3834721pgo.6.2022.04.01.22.12.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 22:12:27 -0700 (PDT) From: Kuldeep Singh To: Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Mukesh Savaliya , Akash Asthana Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 4/5] dt-bindings: qcom: geni-se: Update uart schema reference Date: Sat, 2 Apr 2022 10:42:05 +0530 Message-Id: <20220402051206.6115-5-singh.kuldeep87k@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> References: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We now have geni based QUP uart controller binding in place as dt-bindings/serial/qcom,serial-geni-qcom.yaml similar to other controllers, update reference in parent schema and while at it, also remove properties defined for the controller from commown wrapper. Signed-off-by: Kuldeep Singh Reviewed-by: Krzysztof Kozlowski --- .../bindings/soc/qcom/qcom,geni-se.yaml | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index e6073923e03a..9f72c676b22c 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -133,23 +133,7 @@ patternProperties: "serial@[0-9a-f]+$": type: object description: GENI Serial Engine based UART Controller. - $ref: /schemas/serial.yaml# - - properties: - compatible: - enum: - - qcom,geni-uart - - qcom,geni-debug-uart - - interrupts: - minItems: 1 - items: - - description: UART core irq - - description: Wakeup irq (RX GPIO) - - required: - - compatible - - interrupts + $ref: /schemas/serial/qcom,serial-geni-qcom.yaml# additionalProperties: false From patchwork Sat Apr 2 05:12:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuldeep Singh X-Patchwork-Id: 12798956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 074D5C433FE for ; Sat, 2 Apr 2022 05:12:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353747AbiDBFO3 (ORCPT ); Sat, 2 Apr 2022 01:14:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353750AbiDBFO2 (ORCPT ); Sat, 2 Apr 2022 01:14:28 -0400 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A04A51905A6; Fri, 1 Apr 2022 22:12:31 -0700 (PDT) Received: by mail-pf1-x432.google.com with SMTP id b15so4383831pfm.5; Fri, 01 Apr 2022 22:12:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cmh3zBP9GsKXvL2pssHcTFPMISefgaLSJBLP3U0JXlQ=; b=AoGYQZWG6wsdCVOGtMdF4xUeIPkQaO857bhsv+DdFDv8TAsgBuHcDnvGew1xll6gK5 klJwu4dxZcGZ7eQSROPJwcC+8p/a0sqnuL/fSoeZlIV8du8NOll29oVviZ5FmzNj9tAG 8WQ/UvBMM1sCbftS2oaY69leQOfS16+Svvf5SnXI+UXw/gghgbTjmpkAYV0jUWJnL3cR cOzZC7kV2VXbDsMP7i7iv5CkTEPVIiRXxHFIkX9Gy1EA+q2eZo/Go6JdkMG6AkcjH7iv Ap54wA3Gg4lQLaA/6whUmOcBY0gyIpB33Mv6MdA2MFXdGUp4/TnrSEdnZWeBPHHa/SzD A3NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cmh3zBP9GsKXvL2pssHcTFPMISefgaLSJBLP3U0JXlQ=; b=JgqX5ULQJobdNwWgNvi06wiEJKvE3psANHdb94SnEONiudUqyeUl9EBdHXC1iVRegl WC0y9S99DduH+yWFASVbi6ghqdCEkLpqX3eGzM40QLrId5DZEcBNRTvxIs5pJ0l87UzF KeydrTuISVIpStJgMRHPRElm/jgfQa4aByw99t9AeHyKu82fYJeDhB+JUepYYyctgOrJ USGJ3+ub0v20xHUhRJ3G268udT88zfCwlzzymSX+fJrWr0+qSYXAIxbiCQ7dGF2AAVXV cynJ7Wl7kUCYJrrND2yWVHfpWf4P+Rw10OXLEPa2yoQRRdJMMSWoTYJVl10Bw7yPJ1Yv BXaA== X-Gm-Message-State: AOAM530sDHZObovdvO8gfJB0QogCmCca22UblahJv8vfnkJZddTW7MyS QGMulKoPkSrzuFsuSomGaVY= X-Google-Smtp-Source: ABdhPJzMIkQ8AIMYzYpn8QBnw3j8ONlhGOQgm+9wuTzXUlfUzp8VRj+3yZ9t8Ii9kLYIji7gvaHrPA== X-Received: by 2002:a63:1758:0:b0:381:effc:b48f with SMTP id 24-20020a631758000000b00381effcb48fmr17861363pgx.124.1648876351130; Fri, 01 Apr 2022 22:12:31 -0700 (PDT) Received: from localhost.localdomain ([122.161.51.18]) by smtp.gmail.com with ESMTPSA id u10-20020a63b54a000000b00380ea901cd2sm3834721pgo.6.2022.04.01.22.12.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 22:12:30 -0700 (PDT) From: Kuldeep Singh To: Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Mukesh Savaliya , Akash Asthana Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 5/5] dt-bindings: qcom: geni-se: Remove common controller properties Date: Sat, 2 Apr 2022 10:42:06 +0530 Message-Id: <20220402051206.6115-6-singh.kuldeep87k@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> References: <20220402051206.6115-1-singh.kuldeep87k@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Now that Geni serial engine controllers(spi, i2c and uart) have their own individual bindings, it's time to remove all common properties of the controllers from parent schema. Signed-off-by: Kuldeep Singh --- .../bindings/soc/qcom/qcom,geni-se.yaml | 33 ------------------- 1 file changed, 33 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index 9f72c676b22c..c8e1a4a87ba8 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -64,39 +64,6 @@ required: - ranges patternProperties: - "^.*@[0-9a-f]+$": - type: object - description: Common properties for GENI Serial Engine based I2C, SPI and - UART controller. - - properties: - reg: - description: GENI Serial Engine register address and length. - maxItems: 1 - - clock-names: - const: se - - clocks: - description: Serial engine core clock needed by the device. - maxItems: 1 - - interconnects: - minItems: 2 - maxItems: 3 - - interconnect-names: - minItems: 2 - items: - - const: qup-core - - const: qup-config - - const: qup-memory - - required: - - reg - - clock-names - - clocks - "spi@[0-9a-f]+$": type: object description: GENI serial engine based SPI controller. SPI in master mode