From patchwork Mon Apr 4 13:38:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800222 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF51DC4332F for ; Mon, 4 Apr 2022 13:39:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237341AbiDDNlM (ORCPT ); Mon, 4 Apr 2022 09:41:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56110 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355344AbiDDNlL (ORCPT ); Mon, 4 Apr 2022 09:41:11 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 032132BF4; Mon, 4 Apr 2022 06:39:13 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 8AC46E000A; Mon, 4 Apr 2022 13:39:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079552; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wNpjgkUaNWn1Mm4Df5e8ycR/tOrOcvbl1JoeRb1Ktqk=; b=jU8IBFdVgB2NraQUFr/dnYcmJeAYDeRtz+uhB5SBJKlRNNpSJ88jmUxDUTewdETKn137m5 18ALgWoK0pcFvG8BxLVbTdgVDiSlWKR3dnXOTO1eFis2rCILBXaiKcqV0sZEfRbDoldq2y BBT02uPZ1Sz3Ayi4D0LwFusGV15RWQaigq13sjHCt/eW+szIReaP4+oIBBYy5MhOUozurY FrZPgyDDxjGukQQvvefMevykaG1X+rpieeF6DrdMeYpNx4oxEOax8UTzu9vRkUhZ27zBx+ /eahqo8V2MDEmH/yfQIoK/J6PR6vuE35r7BCWwAvD8zLENJleI2NdHCC6NO6bA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal , Geert Uytterhoeven , Rob Herring Subject: [PATCH v6 1/8] dt-bindings: dmaengine: Introduce RZN1 dmamux bindings Date: Mon, 4 Apr 2022 15:38:57 +0200 Message-Id: <20220404133904.1296258-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring --- .../bindings/dma/renesas,rzn1-dmamux.yaml | 51 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml new file mode 100644 index 000000000000..d83013b0dd74 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 DMA mux + +maintainers: + - Miquel Raynal + +allOf: + - $ref: "dma-router.yaml#" + +properties: + compatible: + const: renesas,rzn1-dmamux + + reg: + maxItems: 1 + description: DMA mux first register offset within the system control parent. + + '#dma-cells': + const: 6 + description: + The first four cells are dedicated to the master DMA controller. The fifth + cell gives the DMA mux bit index that must be set starting from 0. The + sixth cell gives the binary value that must be written there, ie. 0 or 1. + + dma-masters: + minItems: 1 + maxItems: 2 + + dma-requests: + const: 32 + +required: + - reg + - dma-requests + +additionalProperties: false + +examples: + - | + dma-router@a0 { + compatible = "renesas,rzn1-dmamux"; + reg = <0xa0 4>; + #dma-cells = <6>; + dma-masters = <&dma0 &dma1>; + dma-requests = <32>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index fd768d43e048..120d3ae57a4b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19040,6 +19040,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h From patchwork Mon Apr 4 13:38:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800223 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 654CBC433F5 for ; Mon, 4 Apr 2022 13:39:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355509AbiDDNlP (ORCPT ); Mon, 4 Apr 2022 09:41:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355344AbiDDNlN (ORCPT ); Mon, 4 Apr 2022 09:41:13 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F51D1CFC3; Mon, 4 Apr 2022 06:39:16 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 93B39E0011; Mon, 4 Apr 2022 13:39:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079554; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NUnsQ1oGbmfdJo7lE8MZSfdAsUjuXHnI++Iru8elyKw=; b=XBqQFdkycxqB1R2A0TBEg/GiT6A8WUe8Ogvo8rduhXMlqo4JCZTOJrZR+M5OJFl0mDcSog UWY9Az5I6kHffyY3Qc2OEFTApdWgPW3XnOQVyScfwRLds+MhHNww1zlYcQuhdRFIwEEQ71 ZUTrRSLumgXu0DG5ASm/KrM3g3Wlkx+4E+Jq4qttqqN9bo7+cuyYD/JV00yXGLM8qPe5zm P2ZuGNU+rLXjorvO6YGwV/Goyz4UVTbUo74p97smbUK/+rAEsxUICf5lkpQR6Qj9bbOSeD hjiQwc5Wn/be+4OF+xxS8Xhq5U4F4+Ju1CRwslYqGpM1r5SzPpuRa5q333bAZA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal , Rob Herring Subject: [PATCH v6 2/8] dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnode Date: Mon, 4 Apr 2022 15:38:58 +0200 Message-Id: <20220404133904.1296258-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This system controller contains several registers that have nothing to do with the clock handling, like the DMA mux register. Describe this part of the system controller as a subnode. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- .../bindings/clock/renesas,r9a06g032-sysctrl.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml index 25dbb0fac065..95bf485c6cec 100644 --- a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml @@ -39,6 +39,17 @@ properties: '#power-domain-cells': const: 0 + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + "^dma-router@[a-f0-9]+$": + type: object + $ref: "../dma/renesas,rzn1-dmamux.yaml#" + required: - compatible - reg From patchwork Mon Apr 4 13:38:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800224 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42BC5C433FE for ; Mon, 4 Apr 2022 13:39:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355647AbiDDNlS (ORCPT ); Mon, 4 Apr 2022 09:41:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355848AbiDDNlR (ORCPT ); Mon, 4 Apr 2022 09:41:17 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37E5332ECF; Mon, 4 Apr 2022 06:39:19 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 12F62E0014; Mon, 4 Apr 2022 13:39:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079558; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=psSRZJhAOXsPUtZ0dZbzo0PztnR1Q8vauZShn+Y/BqQ=; b=BSxZdIya68lfMURGYX+1uX4u2WuL3T++9gJNXzu1k5ZLvHB65DXThxmPTL7pTTAZ6CLqSU jqweAj8hrRlpaX6zISTPPjn0vt6YOVcSnfq9p6WHJqTwp5pxz7a3maKC1sDkxWWFp7+hH4 hHX2ZLFquBsdJ6/NrpXNJo/inTJkbCL1Jrq1sGGHMcWGasw+tnwTeuZZ/H9HUKEyB7e2nA PyMu2WQkeTk675cIx9GcGWcJFvMpaa/dSNrbZan+vIQkxII5V0Tjw5WHxH20geUSm/ViGu W3CdVoEZi/V+yRYgA59298wu0RFs8SwHl1+LU39qUfz2fO4wvvHsuPMBfBT1ug== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal , Geert Uytterhoeven , Rob Herring Subject: [PATCH v6 3/8] dt-bindings: dmaengine: Introduce RZN1 DMA compatible Date: Mon, 4 Apr 2022 15:38:59 +0200 Message-Id: <20220404133904.1296258-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Just like for the NAND controller that is also on this SoC, let's provide a SoC generic and a more specific couple of compatibles for the DMA controller. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 6b35089ac017..c13649bf7f19 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -15,7 +15,13 @@ allOf: properties: compatible: - const: snps,dma-spear1340 + oneOf: + - const: snps,dma-spear1340 + - items: + - enum: + - renesas,r9a06g032-dma + - const: renesas,rzn1-dma + "#dma-cells": minimum: 3 From patchwork Mon Apr 4 13:39:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F353C433FE for ; Mon, 4 Apr 2022 13:39:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355344AbiDDNlU (ORCPT ); Mon, 4 Apr 2022 09:41:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352304AbiDDNlU (ORCPT ); Mon, 4 Apr 2022 09:41:20 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 232F31D321; Mon, 4 Apr 2022 06:39:21 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 7D8C6E0005; Mon, 4 Apr 2022 13:39:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079560; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HQEOAxmeKlcOFkcMG1nSJmBWktBzpO3Au9ve1x/loAA=; b=acVslOAizGkBKAohi99ftA37xdHbGSR0XXMmQWAa6QZ12HhYNmb8IJRqDZfJQa/G7+IiGI 1Ed/VBCpiz8WWtd06hpHkvReJQ2HFpKgo69xSS/tKWBssRouknwZ/N05CawCbcUWKJiiOp E2Tecz/FgKGhRitTvqDONc2Ugo2eVo2OxWHv5woIzpPuzRGNVSUu0M5xrliA/LQllKDEVF p/Mx6kRVNWlzpO0bFqLsVrlkaIHrXIG+9OZSFD2LrP3L0zJ8DFl5kXyiocrq/jELwbIAuW qSh/lXK/l82ZdIr60V9B2CA/RcYixQXwCXYxiVAojhdxDQVauB2V4io1aB+8EA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal Subject: [PATCH v6 4/8] soc: renesas: rzn1-sysc: Export function to set dmamux Date: Mon, 4 Apr 2022 15:39:00 +0200 Message-Id: <20220404133904.1296258-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal --- drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++- include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..052d99059981 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -20,9 +20,12 @@ #include #include #include +#include #include #include +#define R9A06G032_SYSCTRL_DMAMUX 0xA0 + struct r9a06g032_gate { u16 gate, reset, ready, midle, scon, mirack, mistat; @@ -315,6 +318,30 @@ struct r9a06g032_priv { void __iomem *reg; }; +static struct r9a06g032_priv *sysctrl_priv; + +/* Exported helper to access the DMAMUX register */ +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) +{ + unsigned long flags; + u32 dmamux; + + if (!sysctrl_priv) + return -EPROBE_DEFER; + + spin_lock_irqsave(&sysctrl_priv->lock, flags); + + dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + + spin_unlock_irqrestore(&sysctrl_priv->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_set_dmamux); + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -963,7 +990,13 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) if (error) return error; - return r9a06g032_add_clk_domain(dev); + error = r9a06g032_add_clk_domain(dev); + if (error) + return error; + + sysctrl_priv = clocks; + + return 0; } static const struct of_device_id r9a06g032_match[] = { diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h new file mode 100644 index 000000000000..066dfb15cbdd --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */ From patchwork Mon Apr 4 13:39:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800226 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93048C433EF for ; Mon, 4 Apr 2022 13:39:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355945AbiDDNlX (ORCPT ); Mon, 4 Apr 2022 09:41:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355884AbiDDNlV (ORCPT ); Mon, 4 Apr 2022 09:41:21 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A86A726545; Mon, 4 Apr 2022 06:39:24 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E9041E0008; Mon, 4 Apr 2022 13:39:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079563; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5n9tI/w9BT74M1+hQAO6q0KmSNycrO6jqCkxNoRiAK8=; b=B7DrQYk7NJhp/ljSuAdeO3N8wUgpHO7bxJm+2sBCVB3QeIAv5BH7WVT8Tm7HA2ALBKrbIn rfY9khbHJLLiFQz31hoCDb6CnE78TsN3GnCLQbWvk0aFxyA4ViZLwLM898bWUsyRUZDG90 y9zR8IvbDFYbh88NaAxLZpgsebh7Vs3Gxse/YjpAAiE2UP64R3BgwRhi2emKJ/AqvOqadX 1xnifqUr+88zvAdMGOEoR3QI7Jrt3OwfxxrFR+v5Nxs8LrhxcQfvTNPTs9XBQ3xxnn0/ik SRw2Khlt8ag4t9Eu5rBrH1dp0R7ekB94H0JjPc/TfFqQ80XXco4hV9gcjvU5uA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal Subject: [PATCH v6 5/8] dmaengine: dw: dmamux: Introduce RZN1 DMA router support Date: Mon, 4 Apr 2022 15:39:01 +0200 Message-Id: <20220404133904.1296258-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Aside from the driver introduction, as these devices are described as subnodes of the system controller, we also need the system controller (clock) driver to populate its children manually. Starting from now on, one child can be the dmamux. Signed-off-by: Miquel Raynal --- drivers/clk/renesas/r9a06g032-clocks.c | 3 +- drivers/dma/dw/Kconfig | 9 ++ drivers/dma/dw/Makefile | 2 + drivers/dma/dw/rzn1-dmamux.c | 157 +++++++++++++++++++++++++ 4 files changed, 170 insertions(+), 1 deletion(-) create mode 100644 drivers/dma/dw/rzn1-dmamux.c diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index 052d99059981..1df56d7ab3e1 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -996,7 +997,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) sysctrl_priv = clocks; - return 0; + return of_platform_populate(np, NULL, NULL, dev); } static const struct of_device_id r9a06g032_match[] = { diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig index db25f9b7778c..a9828ddd6d06 100644 --- a/drivers/dma/dw/Kconfig +++ b/drivers/dma/dw/Kconfig @@ -16,6 +16,15 @@ config DW_DMAC Support the Synopsys DesignWare AHB DMA controller. This can be integrated in chips such as the Intel Cherrytrail. +config RZN1_DMAMUX + tristate "Renesas RZ/N1 DMAMUX driver" + depends on DW_DMAC + depends on ARCH_RZN1 || COMPILE_TEST + help + Support the Renesas RZ/N1 DMAMUX which is located in front of + the Synopsys DesignWare AHB DMA controller located on Renesas + SoCs. + config DW_DMAC_PCI tristate "Synopsys DesignWare AHB DMA PCI driver" depends on PCI diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile index a6f358ad8591..8025f75e589c 100644 --- a/drivers/dma/dw/Makefile +++ b/drivers/dma/dw/Makefile @@ -7,5 +7,7 @@ obj-$(CONFIG_DW_DMAC) += dw_dmac.o dw_dmac-y := platform.o dw_dmac-$(CONFIG_OF) += of.o +obj-$(CONFIG_RZN1_DMAMUX) += rzn1-dmamux.o + obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o dw_dmac_pci-y := pci.o diff --git a/drivers/dma/dw/rzn1-dmamux.c b/drivers/dma/dw/rzn1-dmamux.c new file mode 100644 index 000000000000..29e4a0d86f8b --- /dev/null +++ b/drivers/dma/dw/rzn1-dmamux.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Schneider-Electric + * Author: Miquel Raynal + */ +#include +#include +#include +#include + +#define RZN1_DMAMUX_LINES 64 +#define RZN1_DMAMUX_SPLIT 16 + +struct rzn1_dmamux_data { + struct dma_router dmarouter; + u32 used_chans; + struct mutex lock; +}; + +struct rzn1_dmamux_map { + unsigned int req_idx; +}; + +static void rzn1_dmamux_free(struct device *dev, void *route_data) +{ + struct rzn1_dmamux_data *dmamux = dev_get_drvdata(dev); + struct rzn1_dmamux_map *map = route_data; + + dev_dbg(dev, "Unmapping DMAMUX request %u\n", map->req_idx); + + mutex_lock(&dmamux->lock); + dmamux->used_chans &= ~BIT(map->req_idx); + mutex_unlock(&dmamux->lock); + + kfree(map); +} + +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct rzn1_dmamux_map *map; + unsigned int dmac_idx, chan, val; + u32 mask; + int ret; + + if (dma_spec->args_count != 6) + return ERR_PTR(-EINVAL); + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + chan = dma_spec->args[0]; + map->req_idx = dma_spec->args[4]; + val = dma_spec->args[5]; + dma_spec->args_count -= 2; + + if (chan >= RZN1_DMAMUX_SPLIT) { + dev_err(&pdev->dev, "Invalid DMA request line: %u\n", chan); + ret = -EINVAL; + goto free_map; + } + + if (map->req_idx >= RZN1_DMAMUX_LINES || + (map->req_idx % RZN1_DMAMUX_SPLIT) != chan) { + dev_err(&pdev->dev, "Invalid MUX request line: %u\n", map->req_idx); + ret = -EINVAL; + goto free_map; + } + + dmac_idx = map->req_idx < RZN1_DMAMUX_SPLIT ? 0 : 1; + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", dmac_idx); + if (!dma_spec->np) { + dev_err(&pdev->dev, "Can't get DMA master\n"); + ret = -EINVAL; + goto free_map; + } + + dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n", + map->req_idx, dmac_idx, chan); + + mask = BIT(map->req_idx); + mutex_lock(&dmamux->lock); + dmamux->used_chans |= mask; + ret = r9a06g032_sysctrl_set_dmamux(mask, val ? mask : 0); + mutex_unlock(&dmamux->lock); + if (ret) + goto free_mux; + + return map; + +free_mux: + mutex_lock(&dmamux->lock); + dmamux->used_chans &= ~mask; + mutex_unlock(&dmamux->lock); +free_map: + kfree(map); + + return ERR_PTR(ret); +} + +static const struct of_device_id rzn1_dmac_match[] = { + { .compatible = "renesas,rzn1-dma" }, + {} +}; + +static int rzn1_dmamux_probe(struct platform_device *pdev) +{ + struct device_node *mux_node = pdev->dev.of_node; + const struct of_device_id *match; + struct device_node *dmac_node; + struct rzn1_dmamux_data *dmamux; + + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); + if (!dmamux) + return -ENOMEM; + + mutex_init(&dmamux->lock); + + dmac_node = of_parse_phandle(mux_node, "dma-masters", 0); + if (!dmac_node) + return dev_err_probe(&pdev->dev, -ENODEV, "Can't get DMA master node\n"); + + match = of_match_node(rzn1_dmac_match, dmac_node); + of_node_put(dmac_node); + if (!match) + return dev_err_probe(&pdev->dev, -EINVAL, "DMA master is not supported\n"); + + dmamux->dmarouter.dev = &pdev->dev; + dmamux->dmarouter.route_free = rzn1_dmamux_free; + + platform_set_drvdata(pdev, dmamux); + + return of_dma_router_register(mux_node, rzn1_dmamux_route_allocate, + &dmamux->dmarouter); +} + +static const struct of_device_id rzn1_dmamux_match[] = { + { .compatible = "renesas,rzn1-dmamux" }, + {} +}; + +static struct platform_driver rzn1_dmamux_driver = { + .driver = { + .name = "renesas,rzn1-dmamux", + .of_match_table = rzn1_dmamux_match, + }, + .probe = rzn1_dmamux_probe, +}; +module_platform_driver(rzn1_dmamux_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Miquel Raynal X-Patchwork-Id: 12800227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C33ECC433EF for ; Mon, 4 Apr 2022 13:39:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355893AbiDDNl1 (ORCPT ); Mon, 4 Apr 2022 09:41:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355884AbiDDNl0 (ORCPT ); Mon, 4 Apr 2022 09:41:26 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B407DFD0; Mon, 4 Apr 2022 06:39:27 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 7D29DE0004; Mon, 4 Apr 2022 13:39:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079566; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GcS1gM79z1ubwsDkiDMnQBqYcbRumBBw75m5IkrMpwU=; b=nD4Y5KNg8sYt0hBmjJJRMVgltelfiF/zU/BfOXCv8tUPEPs90DZ2zScmQ5tVOPaSzbfay9 IY0bEbAOMPUw4tyfzmxrwsHKeglUsrxkeT0UNuqTBZ0zON4vozxlX1Oa3TWjJDl+FU2GFx 4oBsP41YAmzWYZ4H3RGl+ALTunUFEZOjjNQL0+L7j9rMs7TiLBuV0X1GjuXplZD0pLIwsd gwqWzpe7a3NLNmPibwihqpMfv+mcNq+C9CHjTv22qePkGQzKGMVZggB8EHRd1vnXAYamVu AmzrcS69RzVlM3CBQIydbjB+DVByTDG0atQIp7fCkEcmwq1ZB6+JSzal6RHbEA== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal , Geert Uytterhoeven Subject: [PATCH v6 6/8] dmaengine: dw: Add RZN1 compatible Date: Mon, 4 Apr 2022 15:39:02 +0200 Message-Id: <20220404133904.1296258-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The Renesas RZN1 DMA IP is very close to the original DW DMA IP, a DMA router has been introduced to handle the wiring options that have been added. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- drivers/dma/dw/platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c index 246118955877..47f2292dba98 100644 --- a/drivers/dma/dw/platform.c +++ b/drivers/dma/dw/platform.c @@ -137,6 +137,7 @@ static void dw_shutdown(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, + { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); From patchwork Mon Apr 4 13:39:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6D09C433F5 for ; Mon, 4 Apr 2022 13:39:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355884AbiDDNld (ORCPT ); Mon, 4 Apr 2022 09:41:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239110AbiDDNlc (ORCPT ); Mon, 4 Apr 2022 09:41:32 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 38C6722B1C; Mon, 4 Apr 2022 06:39:30 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 4D0EFE0006; Mon, 4 Apr 2022 13:39:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079569; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ge58NimhaKWCxwe0+hrNu+VcWrBPIvnbMynidvFnOMc=; b=ZDOefbrzBxIkm0FpSm5D38XjzyZ56GKiGoLkt4C0sBxAriuhcMq2QKfkPVhNeBjI71YfBV VQN70raGmKPXh/E47zedO6esFccOMMpWeuDAwdllcgtoTzQDLpESqpu+PajdreI1Ycpun/ qWdOSpmU4Q8bO8yeqayLxf+8KG3w4igkqPD5oMqY3rT54harHnExd6hqbxiI2gCjCDCTeF 84NWVE6GgwGkmTDDb727OPKGPD0JuJ607x7rx5RabFU1xsYLxUAhxnVDkmYtsmrPqmxfLv RoDBuirPEjKE03j6eTHP9/RY1j8Wl8NX7CjJRFcb7BXGEh4ktMaJil+gMFYwuw== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal , Geert Uytterhoeven Subject: [PATCH v6 7/8] ARM: dts: r9a06g032: Add the two DMA nodes Date: Mon, 4 Apr 2022 15:39:03 +0200 Message-Id: <20220404133904.1296258-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 636a6ab31c58..839580ec21ee 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -200,6 +200,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; From patchwork Mon Apr 4 13:39:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12800229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 920B9C433EF for ; Mon, 4 Apr 2022 13:39:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356102AbiDDNlf (ORCPT ); Mon, 4 Apr 2022 09:41:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57210 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356089AbiDDNle (ORCPT ); Mon, 4 Apr 2022 09:41:34 -0400 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C2FDBC3D; Mon, 4 Apr 2022 06:39:33 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 6E5D7E0013; Mon, 4 Apr 2022 13:39:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649079571; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gDMgEYZK2TXVp0tig+qscRTbrixY++njrNcYKAKseyE=; b=IRPf2nGCYdvJVhSZQ4HDpztoxrWWdI6r3Bx1z5x2da3UXGBr4Y4B8dbz3dXE4IuYcCCr3O wELpPwkO8e328SLrhE3Gf7fGd7wiGUeferpDlwS7Wh3P8eDL+OBhksWbU8h/Pyp8D/cbwL xy76hOGkcLkVld8JI+RLITcI+t1WFgZNCMkTZ5dwrwCjXGckyEfFOxBggE2snHL9ODM5yy 1HaA6bFMC3a2NtTYUW5dHEdrji3v5yh2B28qBXXMOPRU5+flPRKW3twcUduwebLfTR2tqA WexDQEZlsmcjwjvKOthehDvfqvgmotnWLyCeutW/X5RuI6H9u0KvSNCd8ySVVg== From: Miquel Raynal To: linux-renesas-soc@vger.kernel.org, Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Cc: Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Miquel Raynal Subject: [PATCH v6 8/8] ARM: dts: r9a06g032: Describe the DMA router Date: Mon, 4 Apr 2022 15:39:04 +0200 Message-Id: <20220404133904.1296258-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220404133904.1296258-1-miquel.raynal@bootlin.com> References: <20220404133904.1296258-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal --- arch/arm/boot/dts/r9a06g032.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 839580ec21ee..c854aa4cfa77 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -91,6 +91,16 @@ sysctrl: system-controller@4000c000 { clocks = <&ext_mclk>, <&ext_rtc_clk>, <&ext_jtag_clk>, <&ext_rgmii_ref>; clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; + #address-cells = <1>; + #size-cells = <1>; + + dmamux: dma-router@a0 { + compatible = "renesas,rzn1-dmamux"; + reg = <0xa0 4>; + #dma-cells = <6>; + dma-requests = <32>; + dma-masters = <&dma0 &dma1>; + }; }; uart0: serial@40060000 {