From patchwork Wed Apr 6 19:51:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Wahl X-Patchwork-Id: 12804076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99925C433F5 for ; Wed, 6 Apr 2022 21:09:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235523AbiDFVLA (ORCPT ); Wed, 6 Apr 2022 17:11:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235196AbiDFVKs (ORCPT ); Wed, 6 Apr 2022 17:10:48 -0400 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70727522EA; Wed, 6 Apr 2022 12:52:30 -0700 (PDT) Received: from pps.filterd (m0148663.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 236HOnn8020668; Wed, 6 Apr 2022 19:51:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=9fcEDTBymkCzxRXWh5HStMC0uPGxFf8X8/Y+P8j7Jgo=; b=O/7y+aZ0EJxOa5trXJu2Q1YjRRCavt26FjTBoPz608/FVkZlD2N6mzJ3jiM32wQGg0fM uNHVjJtK9fbr1e76wWItm3eOU/bw9QEsWhKr8wl+EO9Bbf/4QAW929ssMX72l0MIQl2+ WWO8kUj/a/qO7HW5oMMgEiKxt5emZdRzq9uKHF6zZ8uZ/EikRn87YyMHvRa+en6kFqFJ iI0Zv9nJnToyE3ZgF1+W8A3wSmM3eH7nclTTs+qij5ivAeYFyqk0PzxGuUcbJE78VY41 7CI/cHT3f1ujiFlRJcBjltuEoxzzzndqCk9gLZrHTDDirHfNhnGbxoKxJa4oHXE55SyB Xw== Received: from g9t5009.houston.hpe.com (g9t5009.houston.hpe.com [15.241.48.73]) by mx0a-002e3701.pphosted.com (PPS) with ESMTPS id 3f9d8ba9x6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 06 Apr 2022 19:51:51 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g9t5009.houston.hpe.com (Postfix) with ESMTP id E774863; Wed, 6 Apr 2022 19:51:50 +0000 (UTC) Received: from dog.eag.rdlabs.hpecorp.net (dog.eag.rdlabs.hpecorp.net [128.162.243.181]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 4C5774D; Wed, 6 Apr 2022 19:51:50 +0000 (UTC) Received: by dog.eag.rdlabs.hpecorp.net (Postfix, from userid 200934) id C936D3007794E; Wed, 6 Apr 2022 14:51:49 -0500 (CDT) From: Steve Wahl To: Borislav Petkov , Ingo Molnar , Thomas Gleixner , x86@kernel.org Cc: Mike Travis , Steve Wahl , Andy Shevchenko , Darren Hart , Dimitri Sivanich , "H . Peter Anvin" , Russ Anderson , linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v4 1/3] x86/platform/uv: Update NMI Handler for UV5 Date: Wed, 6 Apr 2022 14:51:47 -0500 Message-Id: <20220406195149.228164-2-steve.wahl@hpe.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220406195149.228164-1-steve.wahl@hpe.com> References: <20220406195149.228164-1-steve.wahl@hpe.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 8Gvke4zppVrqrS_nuqfRZVMKuCvFW1Us X-Proofpoint-GUID: 8Gvke4zppVrqrS_nuqfRZVMKuCvFW1Us X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-04-06_11,2022-04-06_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 adultscore=0 clxscore=1015 malwarescore=0 impostorscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2204060098 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org From: Mike Travis Update NMI handler for UV5 hardware. A platform register changed, and UV5 only uses one of the two NMI methods used on previous hardware. Signed-off-by: Mike Travis Signed-off-by: Steve Wahl Reviewed-by: Dimitri Sivanich --- v4: Clarify comments, change variable name to better convey what's happening v3: Fix mistake in UVH_EXTIO_INT0_BROADCAST check. Use true/false in setting bool flag. v2: Use bool flag to assume NMI support for UV5 and above. --- arch/x86/platform/uv/uv_nmi.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/x86/platform/uv/uv_nmi.c b/arch/x86/platform/uv/uv_nmi.c index 1e9ff28bc2e0..50fdd1a77f02 100644 --- a/arch/x86/platform/uv/uv_nmi.c +++ b/arch/x86/platform/uv/uv_nmi.c @@ -244,8 +244,10 @@ static inline bool uv_nmi_action_is(const char *action) /* Setup which NMI support is present in system */ static void uv_nmi_setup_mmrs(void) { + bool new_nmi_method_only = false; + /* First determine arch specific MMRs to handshake with BIOS */ - if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) { + if (UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK) { /* UV2,3,4 setup */ uvh_nmi_mmrx = UVH_EVENT_OCCURRED0; uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED0_ALIAS; uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT; @@ -255,26 +257,25 @@ static void uv_nmi_setup_mmrs(void) uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2; uvh_nmi_mmrx_req_shift = 62; - } else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) { + } else if (UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK) { /* UV5+ setup */ uvh_nmi_mmrx = UVH_EVENT_OCCURRED1; uvh_nmi_mmrx_clear = UVH_EVENT_OCCURRED1_ALIAS; uvh_nmi_mmrx_shift = UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT; uvh_nmi_mmrx_type = "OCRD1-EXTIO_INT0"; - uvh_nmi_mmrx_supported = UVH_EXTIO_INT0_BROADCAST; - uvh_nmi_mmrx_req = UVH_BIOS_KERNEL_MMR_ALIAS_2; - uvh_nmi_mmrx_req_shift = 62; + new_nmi_method_only = true; /* Newer nmi always valid on UV5+ */ + uvh_nmi_mmrx_req = 0; /* no request bit to clear */ } else { - pr_err("UV:%s:cannot find EVENT_OCCURRED*_EXTIO_INT0\n", - __func__); + pr_err("UV:%s:NMI support not available on this system\n", __func__); return; } /* Then find out if new NMI is supported */ - if (likely(uv_read_local_mmr(uvh_nmi_mmrx_supported))) { - uv_write_local_mmr(uvh_nmi_mmrx_req, - 1UL << uvh_nmi_mmrx_req_shift); + if (new_nmi_method_only || uv_read_local_mmr(uvh_nmi_mmrx_supported)) { + if (uvh_nmi_mmrx_req) + uv_write_local_mmr(uvh_nmi_mmrx_req, + 1UL << uvh_nmi_mmrx_req_shift); nmi_mmr = uvh_nmi_mmrx; nmi_mmr_clear = uvh_nmi_mmrx_clear; nmi_mmr_pending = 1UL << uvh_nmi_mmrx_shift; From patchwork Wed Apr 6 19:51:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Wahl X-Patchwork-Id: 12804074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72E64C433FE for ; Wed, 6 Apr 2022 21:09:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235500AbiDFVK5 (ORCPT ); Wed, 6 Apr 2022 17:10:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235192AbiDFVKs (ORCPT ); Wed, 6 Apr 2022 17:10:48 -0400 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBA6C4FC62; Wed, 6 Apr 2022 12:52:29 -0700 (PDT) Received: from pps.filterd (m0134425.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 236HOTOA030263; Wed, 6 Apr 2022 19:51:51 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=deDGlSAGrHXoBiYw4GDNlbX3BQkDTs4ChJEJLjIyjBk=; b=Vq0wppohIWz80El75m92n+8bpgJ0l6U2POQmYUN5YpzYRguN1AqA7EGmH7W7rDmmFu3p 9AaHvM7rrc3vYi5I9UT6xFlXLH9xGG4Kq5d2tLkcEhOlQwgd9zZT1ecNca1anqVdEODn iDc/Vv0yM41s7wus2CUie8xKKKSfjhCBKYEBJtL30qBx6qbFWfn+xxfeCHqkwyWxr6wo vuS3RI8rAXQxtcKncOyVLyAlvc8FP3B81OnjZRMvxaN0JD2Rh22ueaUph3adUqX9USZa rDx56AYLWSsC9Wieub2aFd5FVExXH+1ipBiDQITFd1wyfaI6G1uXxTuIhAT1QU3bXHYG FQ== Received: from g4t3425.houston.hpe.com (g4t3425.houston.hpe.com [15.241.140.78]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3f9cnd2ypj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 06 Apr 2022 19:51:51 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3425.houston.hpe.com (Postfix) with ESMTP id E778B92; Wed, 6 Apr 2022 19:51:50 +0000 (UTC) Received: from dog.eag.rdlabs.hpecorp.net (dog.eag.rdlabs.hpecorp.net [128.162.243.181]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 4C3C14C; Wed, 6 Apr 2022 19:51:50 +0000 (UTC) Received: by dog.eag.rdlabs.hpecorp.net (Postfix, from userid 200934) id C9F9930087627; Wed, 6 Apr 2022 14:51:49 -0500 (CDT) From: Steve Wahl To: Borislav Petkov , Ingo Molnar , Thomas Gleixner , x86@kernel.org Cc: Mike Travis , Steve Wahl , Andy Shevchenko , Darren Hart , Dimitri Sivanich , "H . Peter Anvin" , Russ Anderson , linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v4 2/3] x86/platform/uv: Update TSC sync state for UV5 Date: Wed, 6 Apr 2022 14:51:48 -0500 Message-Id: <20220406195149.228164-3-steve.wahl@hpe.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220406195149.228164-1-steve.wahl@hpe.com> References: <20220406195149.228164-1-steve.wahl@hpe.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 1DQITyUzCqf0vSmn82lXa7JZfmIFQLy3 X-Proofpoint-GUID: 1DQITyUzCqf0vSmn82lXa7JZfmIFQLy3 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-04-06_11,2022-04-06_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2204060098 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org From: Mike Travis The UV5 platform synchronizes the TSCs among all chassis, and will not proceed to OS boot without achieving synchronization. Previous UV platforms provided a register indicating successful synchronization. This is no longer available on UV5. On this platform TSC_ADJUST should not be reset by the kernel. Signed-off-by: Mike Travis Signed-off-by: Steve Wahl Reviewed-by: Dimitri Sivanich --- v2: Update patch description to be more explanatory. v4: Update patch description to provide better context Removed a pr_debug() and an unrelated whitespace change --- arch/x86/kernel/apic/x2apic_uv_x.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index f5a48e66e4f5..a6e9c2794ef5 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -199,7 +199,13 @@ static void __init uv_tsc_check_sync(void) int mmr_shift; char *state; - /* Different returns from different UV BIOS versions */ + /* UV5 guarantees synced TSCs; do not zero TSC_ADJUST */ + if (!is_uv(UV2|UV3|UV4)) { + mark_tsc_async_resets("UV5+"); + return; + } + + /* UV2,3,4, UV BIOS TSC sync state available */ mmr = uv_early_read_mmr(UVH_TSC_SYNC_MMR); mmr_shift = is_uv2_hub() ? UVH_TSC_SYNC_SHIFT_UV2K : UVH_TSC_SYNC_SHIFT; From patchwork Wed Apr 6 19:51:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Wahl X-Patchwork-Id: 12804073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D89FEC433EF for ; Wed, 6 Apr 2022 21:09:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235385AbiDFVK4 (ORCPT ); Wed, 6 Apr 2022 17:10:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235082AbiDFVKs (ORCPT ); Wed, 6 Apr 2022 17:10:48 -0400 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB9FB4F9EA; Wed, 6 Apr 2022 12:52:30 -0700 (PDT) Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 236HOm2e032349; Wed, 6 Apr 2022 19:51:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=LeJpnDEr3epWjZgzgmr38Yn+CW3qOfLR6wVlG8e/Gbg=; b=jGIeIAzxVmdBs9MoPZAn8LUq2K94fAC7VMtP1Arp3MlbhOtJ1H/RPgT6nV/JFAqlvWt+ MJoTnT61Oc6vFgm3pBrVzSKw9ou1vdg7h5ybt7Y09raJfOtaWLrxYAkoDQQfGltn3O4B EefFpDSUIUi7JEZjN19ayRhVVUgSh80aVBiVQBjwppKbPruz9IIz+6CTUkmRHFIKOS0D OFE2C8tGCd7JTRbTymw2dn0cZYKYu3n0q5Ke2oxDVg5fRJO1Ix9znGmRGyash6mvNfIh ur5BKzfsQSpYOviFxcZXNtNgOERv71xZ1TG/t6ny6REMSu4e5Y9niM5TMT3pIZvinMX2 Uw== Received: from g9t5009.houston.hpe.com (g9t5009.houston.hpe.com [15.241.48.73]) by mx0a-002e3701.pphosted.com (PPS) with ESMTPS id 3f93m4q5eg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 06 Apr 2022 19:51:51 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g9t5009.houston.hpe.com (Postfix) with ESMTP id E78A766; Wed, 6 Apr 2022 19:51:50 +0000 (UTC) Received: from dog.eag.rdlabs.hpecorp.net (dog.eag.rdlabs.hpecorp.net [128.162.243.181]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 4C0814A; Wed, 6 Apr 2022 19:51:50 +0000 (UTC) Received: by dog.eag.rdlabs.hpecorp.net (Postfix, from userid 200934) id CC39730090F7A; Wed, 6 Apr 2022 14:51:49 -0500 (CDT) From: Steve Wahl To: Borislav Petkov , Ingo Molnar , Thomas Gleixner , x86@kernel.org Cc: Mike Travis , Steve Wahl , Andy Shevchenko , Darren Hart , Dimitri Sivanich , "H . Peter Anvin" , Russ Anderson , linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v4 3/3] x86/platform/uv: Log gap hole end size Date: Wed, 6 Apr 2022 14:51:49 -0500 Message-Id: <20220406195149.228164-4-steve.wahl@hpe.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220406195149.228164-1-steve.wahl@hpe.com> References: <20220406195149.228164-1-steve.wahl@hpe.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: Htzs53Ie2KlJ7nFWu_3bcKDZLQlU8M-s X-Proofpoint-GUID: Htzs53Ie2KlJ7nFWu_3bcKDZLQlU8M-s X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-04-06_11,2022-04-06_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 priorityscore=1501 mlxscore=0 mlxlogscore=962 bulkscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 spamscore=0 malwarescore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2204060098 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org From: Mike Travis Show value of gap end in the kernel log which equates to number of physical address bits used by system. Signed-off-by: Mike Travis Signed-off-by: Steve Wahl --- v2: Update patch description to be more explanatory. v4: Clarify commit message --- arch/x86/kernel/apic/x2apic_uv_x.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index a6e9c2794ef5..482855227964 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -1346,7 +1346,7 @@ static void __init decode_gam_params(unsigned long ptr) static void __init decode_gam_rng_tbl(unsigned long ptr) { struct uv_gam_range_entry *gre = (struct uv_gam_range_entry *)ptr; - unsigned long lgre = 0; + unsigned long lgre = 0, gend = 0; int index = 0; int sock_min = 999999, pnode_min = 99999; int sock_max = -1, pnode_max = -1; @@ -1380,6 +1380,9 @@ static void __init decode_gam_rng_tbl(unsigned long ptr) flag, size, suffix[order], gre->type, gre->nasid, gre->sockid, gre->pnode); + if (gre->type == UV_GAM_RANGE_TYPE_HOLE) + gend = (unsigned long)gre->limit << UV_GAM_RANGE_SHFT; + /* update to next range start */ lgre = gre->limit; if (sock_min > gre->sockid) @@ -1397,7 +1400,8 @@ static void __init decode_gam_rng_tbl(unsigned long ptr) _max_pnode = pnode_max; _gr_table_len = index; - pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x) pnodes(min:%x,max:%x)\n", index, _min_socket, _max_socket, _min_pnode, _max_pnode); + pr_info("UV: GRT: %d entries, sockets(min:%x,max:%x), pnodes(min:%x,max:%x), gap_end(%d)\n", + index, _min_socket, _max_socket, _min_pnode, _max_pnode, fls64(gend)); } /* Walk through UVsystab decoding the fields */