From patchwork Mon Apr 11 07:23:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12808611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D96AC433F5 for ; Mon, 11 Apr 2022 07:24:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245340AbiDKH0j (ORCPT ); Mon, 11 Apr 2022 03:26:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245329AbiDKH0e (ORCPT ); Mon, 11 Apr 2022 03:26:34 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0748115FE9; Mon, 11 Apr 2022 00:24:18 -0700 (PDT) X-UUID: 9a19b8be10b243c18293008907b1b950-20220411 X-UUID: 9a19b8be10b243c18293008907b1b950-20220411 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1764143010; Mon, 11 Apr 2022 15:24:07 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 11 Apr 2022 15:24:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 11 Apr 2022 15:24:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , Benjamin Gaignard , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Subject: [PATCH v14 1/6] soc: mediatek: mutex: add common interface to accommodate multiple modules operationg MUTEX Date: Mon, 11 Apr 2022 15:23:58 +0800 Message-ID: <20220411072403.24016-2-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220411072403.24016-1-moudy.ho@mediatek.com> References: <20220411072403.24016-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In order to allow multiple modules to operate MUTEX hardware through a common interfrace, a flexible index "mtk_mutex_table_index" needs to be added to replace original component ID so that like DDP and MDP can add their own MUTEX table settings independently. In addition, 4 generic interface "mtk_mutex_set_mod", "mtk_mutex_set_sof", "mtk_mutex_clear_mod" and "mtk_mutex_clear_sof" have been added, which is expected to replace the "mtk_mutex_add_comp" and "mtk_mutex_remove_comp" pair originally dedicated to DDP in the future. Signed-off-by: Moudy Ho Change-Id: I6a2ab74fccf36248165ce4a6b268d82a1177afc9 --- drivers/soc/mediatek/mtk-mutex.c | 89 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-mutex.h | 21 ++++++ 2 files changed, 110 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index aaf8fc1abb43..48a04dce50d5 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -156,6 +156,8 @@ struct mtk_mutex_data { const unsigned int *mutex_sof; const unsigned int mutex_mod_reg; const unsigned int mutex_sof_reg; + const unsigned int *mutex_table_mod; + const unsigned int *mutex_table_sof; const bool no_clk; }; @@ -445,6 +447,54 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex, } EXPORT_SYMBOL_GPL(mtk_mutex_add_comp); +void mtk_mutex_set_mod(struct mtk_mutex *mutex, + enum mtk_mutex_table_index idx) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + unsigned int reg; + unsigned int offset; + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + if (idx < MUTEX_TABLE_IDX_MDP_RDMA0 || + idx >= MUTEX_TABLE_IDX_MAX) { + dev_err(mtx->dev, "Not supported MOD table index : %d", idx); + return; + } + + offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, + mutex->id); + + reg = readl_relaxed(mtx->regs + offset); + reg |= 1 << mtx->data->mutex_table_mod[idx]; + writel_relaxed(reg, mtx->regs + offset); +} +EXPORT_SYMBOL_GPL(mtk_mutex_set_mod); + +void mtk_mutex_set_sof(struct mtk_mutex *mutex, + enum mtk_mutex_table_index idx) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + unsigned int sof_id; + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + if (idx < MUTEX_TABLE_IDX_MDP_RDMA0 || + idx >= MUTEX_TABLE_IDX_MAX) { + dev_err(mtx->dev, "Not supported SOF table index : %d", idx); + return; + } + + sof_id = mtx->data->mutex_table_sof[idx]; + + writel_relaxed(mtx->data->mutex_sof[sof_id], + mtx->regs + + DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id)); +} +EXPORT_SYMBOL_GPL(mtk_mutex_set_sof); + void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id) { @@ -485,6 +535,45 @@ void mtk_mutex_remove_comp(struct mtk_mutex *mutex, } EXPORT_SYMBOL_GPL(mtk_mutex_remove_comp); +void mtk_mutex_clear_mod(struct mtk_mutex *mutex, + enum mtk_mutex_table_index idx) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + unsigned int reg; + unsigned int offset; + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + if (idx < MUTEX_TABLE_IDX_MDP_RDMA0 || + idx >= MUTEX_TABLE_IDX_MAX) { + dev_err(mtx->dev, "Not supported MOD table index : %d", idx); + return; + } + + offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, + mutex->id); + + reg = readl_relaxed(mtx->regs + offset); + reg &= ~(1 << mtx->data->mutex_table_mod[idx]); + writel_relaxed(reg, mtx->regs + offset); +} +EXPORT_SYMBOL_GPL(mtk_mutex_clear_mod); + +void mtk_mutex_clear_sof(struct mtk_mutex *mutex) +{ + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + writel_relaxed(MUTEX_SOF_SINGLE_MODE, + mtx->regs + + DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, + mutex->id)); +} +EXPORT_SYMBOL_GPL(mtk_mutex_clear_sof); + void mtk_mutex_enable(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h index 6fe4ffbde290..200f4365c950 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -10,14 +10,35 @@ struct regmap; struct device; struct mtk_mutex; +enum mtk_mutex_table_index { + /* MDP table index */ + MUTEX_TABLE_IDX_MDP_RDMA0, + MUTEX_TABLE_IDX_MDP_RSZ0, + MUTEX_TABLE_IDX_MDP_RSZ1, + MUTEX_TABLE_IDX_MDP_TDSHP0, + MUTEX_TABLE_IDX_MDP_WROT0, + MUTEX_TABLE_IDX_MDP_WDMA, + MUTEX_TABLE_IDX_MDP_AAL0, + MUTEX_TABLE_IDX_MDP_CCORR0, + + MUTEX_TABLE_IDX_MAX /* ALWAYS keep at the end */ +}; + struct mtk_mutex *mtk_mutex_get(struct device *dev); int mtk_mutex_prepare(struct mtk_mutex *mutex); void mtk_mutex_add_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); +void mtk_mutex_set_mod(struct mtk_mutex *mutex, + enum mtk_mutex_table_index idx); +void mtk_mutex_set_sof(struct mtk_mutex *mutex, + enum mtk_mutex_table_index idx); void mtk_mutex_enable(struct mtk_mutex *mutex); void mtk_mutex_disable(struct mtk_mutex *mutex); void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); +void mtk_mutex_clear_mod(struct mtk_mutex *mutex, + enum mtk_mutex_table_index idx); +void mtk_mutex_clear_sof(struct mtk_mutex *mutex); void mtk_mutex_unprepare(struct mtk_mutex *mutex); void mtk_mutex_put(struct mtk_mutex *mutex); void mtk_mutex_acquire(struct mtk_mutex *mutex); From patchwork Mon Apr 11 07:23:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12808609 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B806C433F5 for ; Mon, 11 Apr 2022 07:24:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245311AbiDKH0g (ORCPT ); Mon, 11 Apr 2022 03:26:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245321AbiDKH0c (ORCPT ); Mon, 11 Apr 2022 03:26:32 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DD8412AD1; Mon, 11 Apr 2022 00:24:17 -0700 (PDT) X-UUID: 431e84d04b564941b3adbeb5ace4b25e-20220411 X-UUID: 431e84d04b564941b3adbeb5ace4b25e-20220411 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1381180753; Mon, 11 Apr 2022 15:24:08 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 11 Apr 2022 15:24:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 11 Apr 2022 15:24:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , "Benjamin Gaignard" , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Subject: [PATCH v14 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD settings for MDP Date: Mon, 11 Apr 2022 15:23:59 +0800 Message-ID: <20220411072403.24016-3-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220411072403.24016-1-moudy.ho@mediatek.com> References: <20220411072403.24016-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org For the purpose of module independence, related settings should be moved from MDP to the corresponding driver. This patch adds 8183 MUTEX MOD settings for MDP. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mutex.c | 33 ++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index 48a04dce50d5..fc9ba2749946 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -80,6 +80,15 @@ #define MT8183_MUTEX_MOD_DISP_GAMMA0 16 #define MT8183_MUTEX_MOD_DISP_DITHER0 17 +#define MT8183_MUTEX_MOD_MDP_RDMA0 2 +#define MT8183_MUTEX_MOD_MDP_RSZ0 4 +#define MT8183_MUTEX_MOD_MDP_RSZ1 5 +#define MT8183_MUTEX_MOD_MDP_TDSHP0 6 +#define MT8183_MUTEX_MOD_MDP_WROT0 7 +#define MT8183_MUTEX_MOD_MDP_WDMA 8 +#define MT8183_MUTEX_MOD_MDP_AAL0 23 +#define MT8183_MUTEX_MOD_MDP_CCORR0 24 + #define MT8173_MUTEX_MOD_DISP_OVL0 11 #define MT8173_MUTEX_MOD_DISP_OVL1 12 #define MT8173_MUTEX_MOD_DISP_RDMA0 13 @@ -245,6 +254,17 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0, }; +static const unsigned int mt8183_mutex_table_mod[MUTEX_TABLE_IDX_MAX] = { + [MUTEX_TABLE_IDX_MDP_RDMA0] = MT8183_MUTEX_MOD_MDP_RDMA0, + [MUTEX_TABLE_IDX_MDP_RSZ0] = MT8183_MUTEX_MOD_MDP_RSZ0, + [MUTEX_TABLE_IDX_MDP_RSZ1] = MT8183_MUTEX_MOD_MDP_RSZ1, + [MUTEX_TABLE_IDX_MDP_TDSHP0] = MT8183_MUTEX_MOD_MDP_TDSHP0, + [MUTEX_TABLE_IDX_MDP_WROT0] = MT8183_MUTEX_MOD_MDP_WROT0, + [MUTEX_TABLE_IDX_MDP_WDMA] = MT8183_MUTEX_MOD_MDP_WDMA, + [MUTEX_TABLE_IDX_MDP_AAL0] = MT8183_MUTEX_MOD_MDP_AAL0, + [MUTEX_TABLE_IDX_MDP_CCORR0] = MT8183_MUTEX_MOD_MDP_CCORR0, +}; + static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0, [DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0, @@ -296,6 +316,17 @@ static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0, }; +static const unsigned int mt8183_mutex_table_sof[MUTEX_TABLE_IDX_MAX] = { + [MUTEX_TABLE_IDX_MDP_RDMA0] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_RSZ0] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_RSZ1] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_TDSHP0] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_WROT0] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_WDMA] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_AAL0] = MUTEX_SOF_SINGLE_MODE, + [MUTEX_TABLE_IDX_MDP_CCORR0] = MUTEX_SOF_SINGLE_MODE, +}; + static const unsigned int mt8186_mutex_sof[MUTEX_SOF_DSI3 + 1] = { [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE, [MUTEX_SOF_DSI0] = MT8186_MUTEX_SOF_DSI0 | MT8186_MUTEX_EOF_DSI0, @@ -336,6 +367,8 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = { .mutex_sof = mt8183_mutex_sof, .mutex_mod_reg = MT8183_MUTEX0_MOD0, .mutex_sof_reg = MT8183_MUTEX0_SOF0, + .mutex_table_mod = mt8183_mutex_table_mod, + .mutex_table_sof = mt8183_mutex_table_sof, .no_clk = true, }; From patchwork Mon Apr 11 07:24:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12808606 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71FC6C433F5 for ; Mon, 11 Apr 2022 07:24:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245317AbiDKH0c (ORCPT ); Mon, 11 Apr 2022 03:26:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245311AbiDKH0a (ORCPT ); Mon, 11 Apr 2022 03:26:30 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81905E019; Mon, 11 Apr 2022 00:24:14 -0700 (PDT) X-UUID: 97fa6df90e9c4bad82d026175b2da3f3-20220411 X-UUID: 97fa6df90e9c4bad82d026175b2da3f3-20220411 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1545205006; Mon, 11 Apr 2022 15:24:08 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 11 Apr 2022 15:24:07 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 11 Apr 2022 15:24:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 11 Apr 2022 15:24:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , "Benjamin Gaignard" , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Subject: [PATCH v14 3/6] dt-bindings: soc: mediatek: move out common module from display folder Date: Mon, 11 Apr 2022 15:24:00 +0800 Message-ID: <20220411072403.24016-4-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220411072403.24016-1-moudy.ho@mediatek.com> References: <20220411072403.24016-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In order to share the same hardware information with MDP3, change the MUTEX dt-binding to the path "soc/mediatek". Signed-off-by: Moudy Ho Acked-by: Rob Herring Acked-by: Chun-Kuang Hu Reviewed-by: AngeloGioacchino Del Regno --- .../bindings/{display => soc}/mediatek/mediatek,mutex.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) rename Documentation/devicetree/bindings/{display => soc}/mediatek/mediatek,mutex.yaml (97%) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml similarity index 97% rename from Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml rename to Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml index 00e6a1041a9b..40598243c84d 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/display/mediatek/mediatek,mutex.yaml# +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mutex.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek mutex From patchwork Mon Apr 11 07:24:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12808608 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E3EFC433EF for ; Mon, 11 Apr 2022 07:24:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245326AbiDKH0f (ORCPT ); Mon, 11 Apr 2022 03:26:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245319AbiDKH0c (ORCPT ); Mon, 11 Apr 2022 03:26:32 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C9C012AA3; Mon, 11 Apr 2022 00:24:16 -0700 (PDT) X-UUID: 66868e6bc2294e8cb68b0d354e6cfdc0-20220411 X-UUID: 66868e6bc2294e8cb68b0d354e6cfdc0-20220411 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1615402702; Mon, 11 Apr 2022 15:24:08 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 11 Apr 2022 15:24:07 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 11 Apr 2022 15:24:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 11 Apr 2022 15:24:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , "Benjamin Gaignard" , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Subject: [PATCH v14 4/6] dt-bindings: soc: mediatek: add gce-client-reg for MUTEX Date: Mon, 11 Apr 2022 15:24:01 +0800 Message-ID: <20220411072403.24016-5-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220411072403.24016-1-moudy.ho@mediatek.com> References: <20220411072403.24016-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In order to allow modules with latency requirements such as MDP3 to set registers through CMDQ, add the relevant GCE property. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: CK Hu --- .../bindings/soc/mediatek/mediatek,mutex.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml index 40598243c84d..e4399e1f9b1c 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml @@ -60,6 +60,18 @@ properties: include/dt-bindings/gce/-gce.h of each chips. $ref: /schemas/types.yaml#/definitions/uint32-array + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + description: The register of client driver can be configured by gce with + 4 arguments defined in this property. Each GCE subsys id is mapping to + a client defined in the header include/dt-bindings/gce/-gce.h. + required: - compatible - reg From patchwork Mon Apr 11 07:24:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12808610 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D72C8C433EF for ; Mon, 11 Apr 2022 07:24:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245339AbiDKH0h (ORCPT ); Mon, 11 Apr 2022 03:26:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245322AbiDKH0c (ORCPT ); Mon, 11 Apr 2022 03:26:32 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A96213D05; Mon, 11 Apr 2022 00:24:18 -0700 (PDT) X-UUID: 7ad360e2c542481995c0103ca829d446-20220411 X-UUID: 7ad360e2c542481995c0103ca829d446-20220411 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 447064444; Mon, 11 Apr 2022 15:24:07 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 11 Apr 2022 15:24:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 11 Apr 2022 15:24:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , Benjamin Gaignard , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Subject: [PATCH v14 5/6] dts: arm64: mt8183: add GCE client property for Mediatek MUTEX Date: Mon, 11 Apr 2022 15:24:02 +0800 Message-ID: <20220411072403.24016-6-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220411072403.24016-1-moudy.ho@mediatek.com> References: <20220411072403.24016-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In order to allow modules with latency requirements such as MDP3 to set registers through CMDQ, add the relevant dts property. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 4b08691ed39e..fc6ac2a46324 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1514,6 +1514,7 @@ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; mediatek,gce-events = , ; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>; }; larb0: larb@14017000 { From patchwork Mon Apr 11 07:24:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moudy Ho X-Patchwork-Id: 12808612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D89E0C433FE for ; Mon, 11 Apr 2022 07:24:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245363AbiDKH0l (ORCPT ); Mon, 11 Apr 2022 03:26:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245328AbiDKH0e (ORCPT ); Mon, 11 Apr 2022 03:26:34 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 071F115A15; Mon, 11 Apr 2022 00:24:18 -0700 (PDT) X-UUID: 493af11560844203903c37df24f89464-20220411 X-UUID: 493af11560844203903c37df24f89464-20220411 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 823411995; Mon, 11 Apr 2022 15:24:08 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 11 Apr 2022 15:24:07 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 11 Apr 2022 15:24:06 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , "Benjamin Gaignard" , AngeloGioacchino Del Regno , daoyuan huang , Ping-Hsun Wu , , , , , , , , , Subject: [PATCH v14 6/6] soc: mediatek: mutex: add functions that operate registers by CMDQ Date: Mon, 11 Apr 2022 15:24:03 +0800 Message-ID: <20220411072403.24016-7-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220411072403.24016-1-moudy.ho@mediatek.com> References: <20220411072403.24016-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Due to HW limitations, MDP3 is necessary to enable MUTEX in each frame for SOF triggering and cooperate with CMDQ control to reduce the amount of interrupts generated(also, reduce frame latency). In response to the above situation, a new interface "mtk_mutex_enable_by_cmdq" has been added to achieve the purpose. Signed-off-by: Moudy Ho --- drivers/soc/mediatek/mtk-mutex.c | 42 +++++++++++++++++++++++++- include/linux/soc/mediatek/mtk-mutex.h | 2 ++ 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index fc9ba2749946..1811beaf399d 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -7,10 +7,12 @@ #include #include #include +#include #include #include #include #include +#include #define MT2701_MUTEX0_MOD0 0x2c #define MT2701_MUTEX0_SOF0 0x30 @@ -176,6 +178,9 @@ struct mtk_mutex_ctx { void __iomem *regs; struct mtk_mutex mutex[10]; const struct mtk_mutex_data *data; + phys_addr_t addr; + struct cmdq_client_reg cmdq_reg; + bool has_gce_client_reg; }; static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = { @@ -618,6 +623,28 @@ void mtk_mutex_enable(struct mtk_mutex *mutex) } EXPORT_SYMBOL_GPL(mtk_mutex_enable); +void mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, void *pkt) +{ +#if IS_REACHABLE(CONFIG_MTK_CMDQ) + struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + struct cmdq_pkt *cmdq_pkt = (struct cmdq_pkt *)pkt; + + WARN_ON(&mtx->mutex[mutex->id] != mutex); + + if (!mtx->has_gce_client_reg) { + dev_dbg(mtx->dev, "mediatek,gce-client-reg hasn't been set in dts"); + return; + } + + cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys, + mtx->addr + DISP_REG_MUTEX_EN(mutex->id), 1); +#else + dev_err(mtx->dev, "Not support for enable MUTEX by CMDQ"); +#endif +} +EXPORT_SYMBOL_GPL(mtk_mutex_enable_by_cmdq); + void mtk_mutex_disable(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx = container_of(mutex, struct mtk_mutex_ctx, @@ -656,7 +683,7 @@ static int mtk_mutex_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct mtk_mutex_ctx *mtx; - struct resource *regs; + struct resource *regs, addr; int i; mtx = devm_kzalloc(dev, sizeof(*mtx), GFP_KERNEL); @@ -677,6 +704,19 @@ static int mtk_mutex_probe(struct platform_device *pdev) } } + if (of_address_to_resource(dev->of_node, 0, &addr) < 0) + mtx->addr = 0L; + else + mtx->addr = addr.start; + +#if IS_REACHABLE(CONFIG_MTK_CMDQ) + ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0); + if (ret) + dev_dbg(dev, "No mediatek,gce-client-reg!\n"); + else + mtx->has_gce_client_reg = true; +#endif + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); mtx->regs = devm_ioremap_resource(dev, regs); if (IS_ERR(mtx->regs)) { diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/mediatek/mtk-mutex.h index 200f4365c950..17eea55b6809 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -33,6 +33,8 @@ void mtk_mutex_set_mod(struct mtk_mutex *mutex, void mtk_mutex_set_sof(struct mtk_mutex *mutex, enum mtk_mutex_table_index idx); void mtk_mutex_enable(struct mtk_mutex *mutex); +void mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, + void *pkt); void mtk_mutex_disable(struct mtk_mutex *mutex); void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id);