From patchwork Mon Apr 11 15:42:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aidan MacDonald X-Patchwork-Id: 12809338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D9F3C4332F for ; Mon, 11 Apr 2022 15:42:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348121AbiDKPoT (ORCPT ); Mon, 11 Apr 2022 11:44:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348114AbiDKPoS (ORCPT ); Mon, 11 Apr 2022 11:44:18 -0400 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18BE53A72E; Mon, 11 Apr 2022 08:42:04 -0700 (PDT) Received: by mail-wm1-x32f.google.com with SMTP id v64-20020a1cac43000000b0038cfd1b3a6dso12386200wme.5; Mon, 11 Apr 2022 08:42:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2qRlr8ZfTQ3raGd+E44T5DsXd8r35uC0pnPSIlIhBAM=; b=V3C7xQeOR3CSb1V0/I+e4R9iEaktHAqeKhhVjzxFUPZ1HebGtBSYM/LuQS3IzTbwgC 4nzGBwlvzmlBOAAX3IWAMUk+JLmGhtns94OVRpVALquCJ0ipSeXQHUJCyqF4m9ePebst S5M5/nqMrjQ8cejdpo4/A7KVChJSRS5r7ehFgsk7rdbBr2yFEi+gy/lpiWQI3zjQKxL6 r+LvkzrvM2afyIHNfKssBWV3eErgRHIuF0qyAdspn8cGRy+Vy4UIByfdJPoqrgqNmbC2 wbeOgR/v1XMW5BNM/UYamOMMaMzdGksxkmotKeVawt8tRYavsiiJJ1uEIDwU+zSrjT7A Hz7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2qRlr8ZfTQ3raGd+E44T5DsXd8r35uC0pnPSIlIhBAM=; b=BpmQq0SrTmi7OxKAl4a2ljkgmmIp5cnqKCqIF5QeFoAcJ1ZomBZZChDRhc6hjZly2a dxAWGCDcvbjO7Mz8a6Jru9rEihco+xT9PnuZ1vEaVAtQ8/FILeoqSac/fM85lX7159if jwmrFhgjch+PfUp1RRII+Rg9vj3cuQWlzwS5021wMDqW19ks3yhJH0193xwskXr+9YBv xV3HbUIHxAHGIrQ7UNqSmobN4RMsWDbGce6MOd0bRLRyBHsdWK+k89lMkuq5oV8dvNkO jQvxtWFFGiKle8W2Ou5KKMGhhvFvRDW4bHrL7VEEP6d0A4TeTx1O6iVqzzd++4Wr+Ome FMhw== X-Gm-Message-State: AOAM533XWx8jMNMJcAFdf+wK/Odl1+KzA77wirF3fLzgdlU86OPcQUvh G/OHKgP0ETmHQCVCYzyJOwM= X-Google-Smtp-Source: ABdhPJyVsB4t3DoK+e84eXlXXtUqWrV6hCqBJHPlpgCG1/hDc7vuBwj10fyw4GAH9Qinrhd5+3Wz9Q== X-Received: by 2002:a05:600c:6019:b0:38d:fbc:7988 with SMTP id az25-20020a05600c601900b0038d0fbc7988mr29612654wmb.100.1649691722754; Mon, 11 Apr 2022 08:42:02 -0700 (PDT) Received: from localhost (92.40.202.92.threembb.co.uk. [92.40.202.92]) by smtp.gmail.com with ESMTPSA id f15-20020a0560001a8f00b002078f74ccd2sm12314323wry.36.2022.04.11.08.42.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:42:02 -0700 (PDT) From: Aidan MacDonald To: paul@crapouillou.net, robh+dt@kernel.org, krzk+dt@kernel.org, tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 1/2] mips: dts: ingenic: Add TCU clock to x1000/x1830 tcu device node Date: Mon, 11 Apr 2022 16:42:40 +0100 Message-Id: <20220411154241.50834-2-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20220411154241.50834-1-aidanmacdonald.0x0@gmail.com> References: <20220411154241.50834-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org This clock is a gate for the TCU hardware block on these SoCs, but it wasn't included in the device tree since the ingenic-tcu driver erroneously did not request it. Signed-off-by: Aidan MacDonald Reviewed-by: Paul Cercueil --- arch/mips/boot/dts/ingenic/x1000.dtsi | 5 +++-- arch/mips/boot/dts/ingenic/x1830.dtsi | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index 8bd27edef216..c69df8eb158e 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -111,8 +111,9 @@ tcu: timer@10002000 { clocks = <&cgu X1000_CLK_RTCLK>, <&cgu X1000_CLK_EXCLK>, - <&cgu X1000_CLK_PCLK>; - clock-names = "rtc", "ext", "pclk"; + <&cgu X1000_CLK_PCLK>, + <&cgu X1000_CLK_TCU>; + clock-names = "rtc", "ext", "pclk", "tcu"; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index 2595df8671c7..4408df24ca98 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -104,8 +104,9 @@ tcu: timer@10002000 { clocks = <&cgu X1830_CLK_RTCLK>, <&cgu X1830_CLK_EXCLK>, - <&cgu X1830_CLK_PCLK>; - clock-names = "rtc", "ext", "pclk"; + <&cgu X1830_CLK_PCLK>, + <&cgu X1830_CLK_TCU>; + clock-names = "rtc", "ext", "pclk", "tcu"; interrupt-controller; #interrupt-cells = <1>; From patchwork Mon Apr 11 15:42:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aidan MacDonald X-Patchwork-Id: 12809339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3C11C433EF for ; Mon, 11 Apr 2022 15:42:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348128AbiDKPoV (ORCPT ); Mon, 11 Apr 2022 11:44:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346555AbiDKPoT (ORCPT ); Mon, 11 Apr 2022 11:44:19 -0400 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 731073A72E; Mon, 11 Apr 2022 08:42:05 -0700 (PDT) Received: by mail-wm1-x32d.google.com with SMTP id h16so10193504wmd.0; Mon, 11 Apr 2022 08:42:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jI0EvweldafVkAuij5gIPkwDPKF6ejG+3VYtG6fV4jM=; b=Nha6ydSRr6MR/73lGSpupUHjXzCe3Fl3LB7kdB+sNlq3S4H8bmdszRSEfrx6CPJz7R WdQKiRB5H1DSFeMnD4jqhtU6It57/068wHn5Rga3MvcRhAUxEbVef/36FaNbcvFJW8nI YFm9j6lP0JvrwpLp7u7jDYzo2OViXG5j0UjDqwkOEguu3KKugdkWRdQN07zNw0nFd3Xj pPz5nshd0/ejP8rS8m8IDbSFNgCXjVnfv9BgpdpZZ2CMAkiWtP7AUzjZKcMyPlUWE44h TuOFgJ8jN9XR0RmhjW5z8v4M5HTXEu9ZFHOzUaVRBqDxZ5nV7xs+4e6/ZRE78okYv1Y3 MXqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jI0EvweldafVkAuij5gIPkwDPKF6ejG+3VYtG6fV4jM=; b=3IoJKN5aiOA8n06/A4zTwGIKnV8cT+R4cDruVMfDnl8zQooCSBFxWgdmLwMQfLK6rA s2rKO62Fojlj6T+64AAMmvFJ8frFS+JJ8ghCcj2Rk5gKkew3V58u4lkrWkWddsaK3qh0 qh43zFUNbffAxGmDttILYpCnmpXx8mRUg6NlVHaeWU2mdpDGTnEQ3B2nM05E6rKr0bEp YYrlLOZ3TH0ZJFDtpMXngYOJjqUFuamnpfGCGjpG122DFlJWcNYKGGUQw/qZZZ6IOpFH U/gzISuC1L3cREigdNIfAcQ9nKSVwBMdKqpczvlL2mPYoJloww22nfE9PPo8P32LTUtq pZIA== X-Gm-Message-State: AOAM530VuzEJerZvXZUpPwPHfWfFmkd4+ne2QHumu42VupWYjIP7Ij2J yvIgMuGyxIg51OQPZ5YmWwI= X-Google-Smtp-Source: ABdhPJwgX5v91HwXKxnlwkfVA4+hq3nT8jeTDRqqV9FlZMjxQr5i9sNajG30P3xPlwy2nWnHD9BYvw== X-Received: by 2002:a05:600c:3487:b0:38c:9a42:4d49 with SMTP id a7-20020a05600c348700b0038c9a424d49mr30267607wmq.29.1649691724026; Mon, 11 Apr 2022 08:42:04 -0700 (PDT) Received: from localhost (92.40.202.92.threembb.co.uk. [92.40.202.92]) by smtp.gmail.com with ESMTPSA id f15-20020a0560001a8f00b002078f74ccd2sm12314323wry.36.2022.04.11.08.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:42:03 -0700 (PDT) From: Aidan MacDonald To: paul@crapouillou.net, robh+dt@kernel.org, krzk+dt@kernel.org, tsbogend@alpha.franken.de, mturquette@baylibre.com, sboyd@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v4 2/2] clk: ingenic-tcu: Fix missing TCU clock for X1000 SoCs Date: Mon, 11 Apr 2022 16:42:41 +0100 Message-Id: <20220411154241.50834-3-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20220411154241.50834-1-aidanmacdonald.0x0@gmail.com> References: <20220411154241.50834-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The TCU clock gate on X1000 wasn't requested by the driver and could be gated automatically later on in boot, which prevents timers from running and breaks PWM. Add a workaround to support old device trees that don't specify the "tcu" clock gate. In this case the kernel will print a warning and attempt to continue without the clock, which is wrong, but it could work if "clk_ignore_unused" is in the kernel arguments. Signed-off-by: Aidan MacDonald Reviewed-by: Paul Cercueil Reported-by: kernel test robot Reported-by: kernel test robot Reported-by: Dan Carpenter --- drivers/clk/ingenic/tcu.c | 38 ++++++++++++++++++++++++++------------ 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/drivers/clk/ingenic/tcu.c b/drivers/clk/ingenic/tcu.c index 77acfbeb4830..ce8c768db997 100644 --- a/drivers/clk/ingenic/tcu.c +++ b/drivers/clk/ingenic/tcu.c @@ -31,6 +31,7 @@ struct ingenic_soc_info { unsigned int num_channels; bool has_ost; bool has_tcu_clk; + bool allow_missing_tcu_clk; }; struct ingenic_tcu_clk_info { @@ -320,7 +321,8 @@ static const struct ingenic_soc_info jz4770_soc_info = { static const struct ingenic_soc_info x1000_soc_info = { .num_channels = 8, .has_ost = false, /* X1000 has OST, but it not belong TCU */ - .has_tcu_clk = false, + .has_tcu_clk = true, + .allow_missing_tcu_clk = true, }; static const struct of_device_id __maybe_unused ingenic_tcu_of_match[] __initconst = { @@ -354,15 +356,27 @@ static int __init ingenic_tcu_probe(struct device_node *np) if (tcu->soc_info->has_tcu_clk) { tcu->clk = of_clk_get_by_name(np, "tcu"); if (IS_ERR(tcu->clk)) { - ret = PTR_ERR(tcu->clk); - pr_crit("Cannot get TCU clock\n"); - goto err_free_tcu; - } - - ret = clk_prepare_enable(tcu->clk); - if (ret) { - pr_crit("Unable to enable TCU clock\n"); - goto err_put_clk; + /* + * Old device trees for some SoCs did not include the + * TCU clock because this driver (incorrectly) didn't + * use it. In this case we complain loudly and attempt + * to continue without the clock, which might work if + * booting with workarounds like "clk_ignore_unused". + */ + if (tcu->soc_info->allow_missing_tcu_clk && + PTR_ERR(tcu->clk) == -EINVAL) { + pr_warn("TCU clock missing from device tree, please update your device tree\n"); + tcu->clk = NULL; + } else { + pr_crit("Cannot get TCU clock from device tree\n"); + goto err_free_tcu; + } + } else { + ret = clk_prepare_enable(tcu->clk); + if (ret) { + pr_crit("Unable to enable TCU clock\n"); + goto err_put_clk; + } } } @@ -432,10 +446,10 @@ static int __init ingenic_tcu_probe(struct device_node *np) clk_hw_unregister(tcu->clocks->hws[i]); kfree(tcu->clocks); err_clk_disable: - if (tcu->soc_info->has_tcu_clk) + if (tcu->clk) clk_disable_unprepare(tcu->clk); err_put_clk: - if (tcu->soc_info->has_tcu_clk) + if (tcu->clk) clk_put(tcu->clk); err_free_tcu: kfree(tcu);