From patchwork Thu Apr 14 12:37:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yicong Yang X-Patchwork-Id: 12813474 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0B46C433EF for ; Thu, 14 Apr 2022 12:40:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243505AbiDNMmc (ORCPT ); Thu, 14 Apr 2022 08:42:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235273AbiDNMmY (ORCPT ); Thu, 14 Apr 2022 08:42:24 -0400 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE8BB3C73C; Thu, 14 Apr 2022 05:39:58 -0700 (PDT) Received: from canpemm500009.china.huawei.com (unknown [172.30.72.53]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4KfJsB50fTzgYp9; Thu, 14 Apr 2022 20:38:06 +0800 (CST) Received: from localhost.localdomain (10.67.164.66) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 14 Apr 2022 20:39:56 +0800 From: Yicong Yang To: , CC: , , , Yicong Yang , Mika Westerberg Subject: [PATCH v3] PCI: Make sure the bus bridge powered on when scanning bus Date: Thu, 14 Apr 2022 20:37:36 +0800 Message-ID: <20220414123736.34150-1-yangyicong@hisilicon.com> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 X-Originating-IP: [10.67.164.66] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org When the bus bridge is runtime suspended, we'll fail to rescan the devices through sysfs as we cannot access the configuration space correctly when the bridge is in D3hot. It can be reproduced like: $ echo 1 > /sys/bus/pci/devices/0000:80:00.0/0000:81:00.1/remove $ echo 1 > /sys/bus/pci/devices/0000:80:00.0/pci_bus/0000:81/rescan 0000:80:00.0 is root port and is runtime suspended and we cannot get 0000:81:00.1 after rescan. Make bridge powered on when scanning the child bus, by adding pm_runtime_get_sync()/pm_runtime_put() in pci_scan_child_bus_extend(). A similar issue is met and solved by d963f6512e15 ("PCI: Power on bridges before scanning new devices") which rescan the devices through /sys/bus/pci/devices/0000:80:00.0/rescan. The callstack is like: dev_rescan_restore() pci_rescan_bus() pci_scan_bridge_extend() pci_scan_child_bus_extend() /* will wake up the bridge with this patch */ With this patch the issue is also resolved, so let's remove the calls of pm_runtime_*() in pci_scan_bridge_extend(). Cc: Mika Westerberg Cc: Bjorn Helgaas Signed-off-by: Yicong Yang --- Change since v2: - just rebase it on v5.18-rc2 Link: https://lore.kernel.org/linux-pci/1601029386-4928-1-git-send-email-yangyicong@hisilicon.com/ Change since v1: - use an intermediate variable *bridge as suggested - remove the pm_runtime_*() calls in pci_scan_bridge_extend() Link: https://lore.kernel.org/linux-pci/1596022223-4765-1-git-send-email-yangyicong@hisilicon.com/ drivers/pci/probe.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 17a969942d37..2ca6b4b708e3 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -1257,12 +1257,6 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev, u8 fixed_sec, fixed_sub; int next_busnr; - /* - * Make sure the bridge is powered on to be able to access config - * space of devices below it. - */ - pm_runtime_get_sync(&dev->dev); - pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses); primary = buses & 0xFF; secondary = (buses >> 8) & 0xFF; @@ -1464,8 +1458,6 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev, out: pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl); - pm_runtime_put(&dev->dev); - return max; } @@ -2859,11 +2851,19 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, unsigned int used_buses, normal_bridges = 0, hotplug_bridges = 0; unsigned int start = bus->busn_res.start; unsigned int devfn, fn, cmax, max = start; - struct pci_dev *dev; + struct pci_dev *dev, *bridge = bus->self; int nr_devs; dev_dbg(&bus->dev, "scanning bus\n"); + /* + * Make sure the bus bridge is powered on, otherwise we may not be + * able to scan the devices as we may fail to access the configuration + * space of subordinates. + */ + if (bridge) + pm_runtime_get_sync(&bridge->dev); + /* Go find them, Rover! */ for (devfn = 0; devfn < 256; devfn += 8) { nr_devs = pci_scan_slot(bus, devfn); @@ -2976,6 +2976,9 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus, } } + if (bridge) + pm_runtime_put(&bridge->dev); + /* * We've scanned the bus and so we know all about what's on * the other side of any bridges that may be on this bus plus