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Wysocki" , Nathan Fontenot , Deepak Sharma , "Alex Deucher" , Mario Limonciello , Jinzhou Su , Perry Yuan , Xiaojian Du , Viresh Kumar , Borislav Petkov , , Meng Li Subject: [PATCH V3 1/3] cpufreq: amd-pstate: Expose struct amd_cpudata Date: Thu, 21 Apr 2022 15:41:50 +0800 Message-ID: <20220421074152.599419-2-li.meng@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220421074152.599419-1-li.meng@amd.com> References: <20220421074152.599419-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2027affb-9262-4ba9-2ccb-08da236a76f0 X-MS-TrafficTypeDiagnostic: BN6PR12MB1795:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bPBgiRyWj9gkBK1ppJkSlaBxUF5VALZoCU1mdhro4AbdaVoP4ZoPBfwPcbXMvaOaKWwJPCnLKwvR3tbl9eJ+niVYkFmUqb221Os6Hx4vYN67HO6EQJRZZij0n1bekHPfUYep3zUoyHNmxwRm293EtrQazWqBimPp/4Y2Ytrc6guuYcAaV3XAS5cN7dRc8filpq61WqmsjE/vqA2PUGo0OaOvO0bi8Dx9+yje9gcFQRX21Pb01WrHLjt8K8AlANqIbJVTLBRdq+l3fIgTqdbYLPV67O5i0ikKbLEFtVLedC6GxseLMIArQYx1z3898vczvzVB7WAsHml44FyLY8MrhdA7vrimv6fO0H7YqKGYhuRVa4BVpE8CXvAoROVUKK435fbFwsy+6Sl0MhzTvdFkyW9ilC/0W6Vo/k4pqU+W5xgQV5KycpOF/u5uqrWVRoKbESHc2RLYVRTBJuYIcl3nDlne+a5S8ILQUElfH1pW4XXi7bQtGauc03EZQKVK/mkvY8ulgI+Okj22W2ZHpxgDScJvzHgD53pJ4MYBgNC6dq234zW2vhxaEfHq4iISy+qkooIBYj328TZbcXwY4eQYROSNuvtboj9mg8L3xCPKphNZoGr9jg2/GSYof7OvbBhx8Mjckz4+s3oaYDhRhEMl7+ChKRG69b8u2tc0B/VQfrWQJI1l7cK8XElOBELqLNgDboECrPuQRpsHMc04D1W6Cg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(336012)(36860700001)(1076003)(316002)(2616005)(426003)(16526019)(186003)(86362001)(356005)(70586007)(70206006)(83380400001)(81166007)(47076005)(4326008)(40460700003)(26005)(508600001)(5660300002)(7696005)(54906003)(6666004)(36756003)(2906002)(110136005)(8936002)(82310400005)(8676002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2022 07:42:19.4678 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2027affb-9262-4ba9-2ccb-08da236a76f0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1795 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Expose struct amd_cpudata to AMD P-State unit test module. This data struct will be used on the following AMD P-State unit test (amd_pstate_testmod) module. The amd_pstate_testmod module can get some AMD infomations by this data struct. For example: highest perf, nominal perf, boost supported etc. Signed-off-by: Meng Li --- MAINTAINERS | 1 + drivers/cpufreq/amd-pstate.c | 60 +--------------------------- include/linux/amd-pstate.h | 77 ++++++++++++++++++++++++++++++++++++ 3 files changed, 79 insertions(+), 59 deletions(-) create mode 100644 include/linux/amd-pstate.h diff --git a/MAINTAINERS b/MAINTAINERS index 61d9f114c37f..6f814eda95b5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1020,6 +1020,7 @@ L: linux-pm@vger.kernel.org S: Supported F: Documentation/admin-guide/pm/amd-pstate.rst F: drivers/cpufreq/amd-pstate* +F: include/linux/amd-pstate.h F: tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py AMD PTDMA DRIVER diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 7be38bc6a673..5f7a00a64f76 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -65,65 +66,6 @@ MODULE_PARM_DESC(shared_mem, static struct cpufreq_driver amd_pstate_driver; -/** - * struct amd_aperf_mperf - * @aperf: actual performance frequency clock count - * @mperf: maximum performance frequency clock count - * @tsc: time stamp counter - */ -struct amd_aperf_mperf { - u64 aperf; - u64 mperf; - u64 tsc; -}; - -/** - * struct amd_cpudata - private CPU data for AMD P-State - * @cpu: CPU number - * @req: constraint request to apply - * @cppc_req_cached: cached performance request hints - * @highest_perf: the maximum performance an individual processor may reach, - * assuming ideal conditions - * @nominal_perf: the maximum sustained performance level of the processor, - * assuming ideal operating conditions - * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power - * savings are achieved - * @lowest_perf: the absolute lowest performance level of the processor - * @max_freq: the frequency that mapped to highest_perf - * @min_freq: the frequency that mapped to lowest_perf - * @nominal_freq: the frequency that mapped to nominal_perf - * @lowest_nonlinear_freq: the frequency that mapped to lowest_nonlinear_perf - * @cur: Difference of Aperf/Mperf/tsc count between last and current sample - * @prev: Last Aperf/Mperf/tsc count value read from register - * @freq: current cpu frequency value - * @boost_supported: check whether the Processor or SBIOS supports boost mode - * - * The amd_cpudata is key private data for each CPU thread in AMD P-State, and - * represents all the attributes and goals that AMD P-State requests at runtime. - */ -struct amd_cpudata { - int cpu; - - struct freq_qos_request req[2]; - u64 cppc_req_cached; - - u32 highest_perf; - u32 nominal_perf; - u32 lowest_nonlinear_perf; - u32 lowest_perf; - - u32 max_freq; - u32 min_freq; - u32 nominal_freq; - u32 lowest_nonlinear_freq; - - struct amd_aperf_mperf cur; - struct amd_aperf_mperf prev; - - u64 freq; - bool boost_supported; -}; - static inline int pstate_enable(bool enable) { return wrmsrl_safe(MSR_AMD_CPPC_ENABLE, enable); diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h new file mode 100644 index 000000000000..4dffb7db3807 --- /dev/null +++ b/include/linux/amd-pstate.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/include/linux/amd-pstate.h + * + * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. + * + * Author: Meng Li + */ + +#ifndef _LINUX_AMD_PSTATE_H +#define _LINUX_AMD_PSTATE_H + +#include + +/********************************************************************* + * AMD P-state INTERFACE * + *********************************************************************/ +/** + * struct amd_aperf_mperf + * @aperf: actual performance frequency clock count + * @mperf: maximum performance frequency clock count + * @tsc: time stamp counter + */ +struct amd_aperf_mperf { + u64 aperf; + u64 mperf; + u64 tsc; +}; + +/** + * struct amd_cpudata - private CPU data for AMD P-State + * @cpu: CPU number + * @req: constraint request to apply + * @cppc_req_cached: cached performance request hints + * @highest_perf: the maximum performance an individual processor may reach, + * assuming ideal conditions + * @nominal_perf: the maximum sustained performance level of the processor, + * assuming ideal operating conditions + * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power + * savings are achieved + * @lowest_perf: the absolute lowest performance level of the processor + * @max_freq: the frequency that mapped to highest_perf + * @min_freq: the frequency that mapped to lowest_perf + * @nominal_freq: the frequency that mapped to nominal_perf + * @lowest_nonlinear_freq: the frequency that mapped to lowest_nonlinear_perf + * @cur: Difference of Aperf/Mperf/tsc count between last and current sample + * @prev: Last Aperf/Mperf/tsc count value read from register + * @freq: current cpu frequency value + * @boost_supported: check whether the Processor or SBIOS supports boost mode + * + * The amd_cpudata is key private data for each CPU thread in AMD P-State, and + * represents all the attributes and goals that AMD P-State requests at runtime. + */ +struct amd_cpudata { + int cpu; + + struct freq_qos_request req[2]; + u64 cppc_req_cached; + + u32 highest_perf; + u32 nominal_perf; + u32 lowest_nonlinear_perf; + u32 lowest_perf; + + u32 max_freq; + u32 min_freq; + u32 nominal_freq; + u32 lowest_nonlinear_freq; + + struct amd_aperf_mperf cur; + struct amd_aperf_mperf prev; + + u64 freq; + bool boost_supported; +}; + +#endif /* _LINUX_AMD_PSTATE_H */ From patchwork Thu Apr 21 07:41:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Meng, Li (Jassmine)" X-Patchwork-Id: 12821237 X-Patchwork-Delegate: shuah@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF926C4332F for ; Thu, 21 Apr 2022 07:42:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386034AbiDUHpR (ORCPT ); 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Thu, 21 Apr 2022 02:42:17 -0500 From: Meng Li To: Shuah Khan , Huang Rui , CC: "Rafael J . Wysocki" , Nathan Fontenot , Deepak Sharma , "Alex Deucher" , Mario Limonciello , Jinzhou Su , Perry Yuan , Xiaojian Du , Viresh Kumar , Borislav Petkov , , Meng Li Subject: [PATCH V3 2/3] selftests: cpufreq: Add wapper script for test AMD P-State Date: Thu, 21 Apr 2022 15:41:51 +0800 Message-ID: <20220421074152.599419-3-li.meng@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220421074152.599419-1-li.meng@amd.com> References: <20220421074152.599419-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 623bdc17-d01c-4eef-9cce-08da236a786d X-MS-TrafficTypeDiagnostic: DM6PR12MB3434:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: jMuLCjgjbw5ZTeauJ7gC3JdBjrarKzmfE3QMReeUeWGW2ZKVj8+EtXY/pDNgmcCtgZNmee5VYMDQfstaLSt8kjaYd9ibEiQ/oy236CNfWJVaMHeppXFPPl5EGQNLemu5fsKLcrmnxk8iltvYmVa45P0Mbg2bvEO0CYKX+PnQ9bnOyqKatSMP3+USOvyoLvJLJBIJ++CVBTdn07ZbIsx4601XEywiLarPIdrSk8V0Mekux01Cq20V3UBbHsMil7EL59HFo9uM+ofqounqKPox/RAYasMkbkhbo8a7/DdblzDipoDf+S8/Vq+PDH1n+avNQlyPNyGKXBSxkHUyNwT9q7nqp4powvrJc3lvYL1I5XxFhpfHqIZvgvcfINGoKQHfo4o/be/uPIb2zEvlXIKtEMgjFlprbTYEQZwZWq2JSWfAWyqpQbqf+ul8DFTC4O300IIdWqXYlFiiRNM3JYNA9Kw7xLklzWi62ZQeE2VtZg/l9HxYSPtwftnKKZRg3jApMIl2j0X2gH20a6Ag4wV91sq2iMOqUq1gPTCJdX1eKlTbovA54dYReB8CBLLcSXL4gexVfhRy4HVRpF6rACNEqoetU7KCm/yjVHvd5cAYnilFQaaQ/lYU26rSKPx064zYBbUUfw1YEQ14tadzdOHEf/VDzyniK9mB6jC8ek4tolWZ0D4bIThCutABJz/aNKNXBowlwR5xRUv3OKgAPc6L1Q== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(36860700001)(1076003)(110136005)(426003)(54906003)(356005)(70586007)(81166007)(70206006)(2616005)(47076005)(4326008)(8676002)(82310400005)(336012)(40460700003)(26005)(316002)(83380400001)(8936002)(7696005)(508600001)(86362001)(5660300002)(186003)(2906002)(36756003)(6666004)(16526019)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2022 07:42:21.9676 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 623bdc17-d01c-4eef-9cce-08da236a786d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3434 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Adds a wrapper shell script for the amd_pstate_testmod module. Signed-off-by: Meng Li --- tools/testing/selftests/cpufreq/amd_pstate_testmod.sh | 4 ++++ tools/testing/selftests/cpufreq/config | 1 + tools/testing/selftests/cpufreq/main.sh | 1 + 3 files changed, 6 insertions(+) create mode 100755 tools/testing/selftests/cpufreq/amd_pstate_testmod.sh diff --git a/tools/testing/selftests/cpufreq/amd_pstate_testmod.sh b/tools/testing/selftests/cpufreq/amd_pstate_testmod.sh new file mode 100755 index 000000000000..5398ad568885 --- /dev/null +++ b/tools/testing/selftests/cpufreq/amd_pstate_testmod.sh @@ -0,0 +1,4 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 +# Tests the AMD P-State unit test infrastructure using amd_pstate_testmod kernel module. +$(dirname $0)/../kselftest/module.sh "amd_pstate_testmod" amd_pstate_testmod diff --git a/tools/testing/selftests/cpufreq/config b/tools/testing/selftests/cpufreq/config index 75e900793e8a..374a8adbb34c 100644 --- a/tools/testing/selftests/cpufreq/config +++ b/tools/testing/selftests/cpufreq/config @@ -13,3 +13,4 @@ CONFIG_DEBUG_LOCK_ALLOC=y CONFIG_PROVE_LOCKING=y CONFIG_LOCKDEP=y CONFIG_DEBUG_ATOMIC_SLEEP=y +CONFIG_AMD_PSTATE_TESTMOD=m diff --git a/tools/testing/selftests/cpufreq/main.sh b/tools/testing/selftests/cpufreq/main.sh index 60ce18ed0666..d3602fa11392 100755 --- a/tools/testing/selftests/cpufreq/main.sh +++ b/tools/testing/selftests/cpufreq/main.sh @@ -6,6 +6,7 @@ source cpufreq.sh source governor.sh source module.sh source special-tests.sh +source amd_pstate_testmod.sh FUNC=basic # do basic tests by default OUTFILE=cpufreq_selftest From patchwork Thu Apr 21 07:41:52 2022 Content-Type: text/plain; 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Wysocki" , Nathan Fontenot , Deepak Sharma , "Alex Deucher" , Mario Limonciello , Jinzhou Su , Perry Yuan , Xiaojian Du , Viresh Kumar , Borislav Petkov , , Meng Li Subject: [PATCH V3 3/3] selftests: cpufreq: Add amd_pstate_testmod kernel module for testing Date: Thu, 21 Apr 2022 15:41:52 +0800 Message-ID: <20220421074152.599419-4-li.meng@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220421074152.599419-1-li.meng@amd.com> References: <20220421074152.599419-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0e53928f-e640-4fc5-d72e-08da236a7abc X-MS-TrafficTypeDiagnostic: MN2PR12MB2973:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tPwUHD3OhkF6y+Iforh+Lq9f+LLCx75MBddXWxNcFhxWM87wVM1qXAgO+emCEHIaQVQ5vjmAgRIGPG0dplrbiKkDNtrvD3v6RQIQzYF6g0Db5ajujqXNk1wYQdUjKI2xOpJ1G/03Qzj8ZBKDnhWXhTC102AfzYgqNE+SavFeEG9FbBTTcX7nFI7xn7hk4dX1+c2PIAfobqxmpLlQVJwCVBQrE0SKb0N27U4bp/yh2+fcxmqD0lc7wfz3fEhY+L5q1Rz/ggTTovO4uFxNxHWQDLiReyMz5QGKeL2peofPoKRUrkA90iXX3S7Xkq0xekuunxww5T50usAV/8vERv0gGkpgZ2dTt5tNefcwy5J33OOpMBRzVY8jCySczYEzdzgtB3yAHwYTygsusCOauFMDgx5nhJ1mmR4kJffEnkwUICLSw7wYT5muKR2T/xKi6pZkAptdciyC7z1apU0k6kQRrx1YQ+pL9uar9Rn+SmziZ9a8HDhTkaWYlTZfubu3gJNzA1nBdh+ZLOUjpV3ghW73cNTM8iWuC2GB4FvDTmy0m5qtkuqhJm7mzBpAL4P+5h1kg2bsRa58CPABlLqN3EhGuHKexILwBtqraATOqGjHoqRhNoOQBQDcm3634Q97SLTIkTe2+UN2sUMv4J7NPlvXHw0YCBHS5ThvKA70Fyc4n5LaMKLfklgLCReDxZZPCyEiTHA244mkcfhEDjupHPU5cg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(26005)(86362001)(7696005)(36860700001)(356005)(508600001)(30864003)(6666004)(2906002)(5660300002)(81166007)(8936002)(83380400001)(2616005)(70206006)(1076003)(40460700003)(336012)(47076005)(186003)(426003)(16526019)(70586007)(36756003)(82310400005)(110136005)(316002)(8676002)(54906003)(4326008)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2022 07:42:25.8267 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0e53928f-e640-4fc5-d72e-08da236a7abc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB2973 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add amd_pstate_testmod module, which is conceptually out-of-tree module and provides ways for selftests/cpufreq amd pstate driver to test various kernel module-related functionality. This module will be expected by some of selftests to be present and loaded. Signed-off-by: Meng Li --- .../cpufreq/amd_pstate_testmod/Makefile | 20 ++ .../amd_pstate_testmod/amd_pstate_testmod.c | 329 ++++++++++++++++++ 2 files changed, 349 insertions(+) create mode 100644 tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile create mode 100644 tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c diff --git a/tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile b/tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile new file mode 100644 index 000000000000..8a5596cb2c18 --- /dev/null +++ b/tools/testing/selftests/cpufreq/amd_pstate_testmod/Makefile @@ -0,0 +1,20 @@ +AMD_PSTATE_TESTMOD_DIR := $(realpath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +KDIR ?= $(abspath $(AMD_PSATE_TESTMOD_DIR)/../../../../..) + +ifeq ($(V),1) +Q = +else +Q = @ +endif + +MODULES = amd_pstate_testmod.ko + +obj-m += amd_pstate_testmod.o +CFLAGS_amd_pstate_testmod.o = -I$(src) + +all: + +$(Q)make -C $(KDIR) M=$(AMD_PSTATE_TESTMOD_DIR) modules + +clean: + +$(Q)make -C $(KDIR) M=$(AMD_PSTATE_TESTMOD_DIR) clean + diff --git a/tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c b/tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c new file mode 100644 index 000000000000..5391412a49c4 --- /dev/null +++ b/tools/testing/selftests/cpufreq/amd_pstate_testmod/amd_pstate_testmod.c @@ -0,0 +1,329 @@ +// SPDX-License-Identifier: GPL-1.0-or-later +/* + * AMD Processor P-state Frequency Driver Unit Test + * + * Copyright (C) 2022 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Author: Meng Li + * + * The AMD P-State Unit Test is a test module for testing the amd-pstate + * driver. 1) It can help all users to verify their processor support + * (SBIOS/Firmware or Hardware). 2) Kernel can have a basic function + * test to avoid the kernel regression during the update. 3) We can + * introduce more functional or performance tests to align the result + * together, it will benefit power and performance scale optimization. + * + * At present, it only implements the basic framework and some simple + * test cases. Next, 1) we will add a rst document. 2) we will add more + * test cases to improve the depth and coverage of the test. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include "../../kselftest_module.h" + +#include +#include +#include +#include +#include + +#include + +/* + * Abbreviations: + * aput: used as a shortform for AMD P-State unit test. + * It helps to keep variable names smaller, simpler + */ + +KSTM_MODULE_GLOBALS(); + +/* + * Kernel module for testing the AMD P-State unit test + */ +enum aput_result { + APUT_RESULT_PASS, + APUT_RESULT_FAIL, + MAX_APUT_RESULT, +}; + +struct aput_struct { + const char *name; + void (*func)(u32 index); + enum aput_result result; +}; + +static const char ap_drv[] = "amd-pstate"; + +static void aput_x86_vendor(u32 index); +static void aput_modprobed_driver(u32 index); +static void aput_acpi_cpc(u32 index); +static void aput_check_enabled(u32 index); +static void aput_check_perf(u32 index); +static void aput_check_freq(u32 index); + +static struct aput_struct aput_conditions[] = { + {"x86_vendor", aput_x86_vendor }, + {"modprobed_amd_pstate", aput_modprobed_driver }, +}; + +static struct aput_struct aput_cases[] = { + {"acpi_cpc_valid", aput_acpi_cpc }, + {"check_enabled", aput_check_enabled }, + {"check_perf", aput_check_perf }, + {"check_freq", aput_check_freq } +}; + +static bool get_shared_mem(void) +{ + bool result = false; + char buf[5] = {0}; + struct file *filp = NULL; + loff_t pos = 0; + ssize_t ret; + + filp = filp_open("/sys/module/amd_pstate/parameters/shared_mem", FMODE_PREAD, 0); + if (IS_ERR(filp)) + pr_err("%s Open param file fail!\n", __func__); + else { + ret = kernel_read(filp, &buf, sizeof(buf), &pos); + if (ret < 0) + pr_err("%s ret=%ld unable to read from param file!\n", __func__, ret); + filp_close(filp, NULL); + } + + if ('Y' == *buf) + result = true; + + return result; +} + +static void aput_x86_vendor(u32 index) +{ + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) + aput_conditions[index].result = APUT_RESULT_PASS; + else { + aput_conditions[index].result = APUT_RESULT_FAIL; + pr_warn("Exit test: the vendor is not X86_VENDOR_AMD!\n"); + } +} + +static void aput_modprobed_driver(u32 index) +{ + const char *cur_drv; + + cur_drv = cpufreq_get_current_driver(); + if (cur_drv) { + if (!strncmp(cur_drv, ap_drv, min_t(size_t, strlen(cur_drv), strlen(ap_drv)))) + aput_conditions[index].result = APUT_RESULT_PASS; + else { + aput_conditions[index].result = APUT_RESULT_FAIL; + pr_warn("Exit test: current driver %s is not amd-pstate!\n", cur_drv); + } + } else { + aput_conditions[index].result = APUT_RESULT_FAIL; + pr_warn("Exit test: this cpu is not supported anymore!\n"); + } +} + +static void aput_acpi_cpc(u32 index) +{ + if (acpi_cpc_valid()) + aput_cases[index].result = APUT_RESULT_PASS; + else + aput_cases[index].result = APUT_RESULT_FAIL; +} + +static void aput_pstate_enable(u32 index) +{ + int ret = 0; + u64 cppc_enable = 0; + + ret = rdmsrl_safe(MSR_AMD_CPPC_ENABLE, &cppc_enable); + if (ret) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s rdmsrl_safe MSR_AMD_CPPC_ENABLE ret=%d is error!\n", __func__, ret); + return; + } + if (cppc_enable) + aput_cases[index].result = APUT_RESULT_PASS; + else + aput_cases[index].result = APUT_RESULT_FAIL; +} + +/* + *Check if enabled amd pstate + */ +static void aput_check_enabled(u32 index) +{ + if (get_shared_mem()) + aput_cases[index].result = APUT_RESULT_PASS; + else + aput_pstate_enable(index); +} + +/* + * Check if the each performance values are reasonable. + * highest_perf >= nominal_perf > lowest_nonlinear_perf > lowest_perf > 0 + */ +static void aput_check_perf(u32 index) +{ + int cpu = 0, ret = 0; + u32 highest_perf = 0, nominal_perf = 0, lowest_nonlinear_perf = 0, lowest_perf = 0; + u64 cap1 = 0; + struct cppc_perf_caps cppc_perf; + struct cpufreq_policy *policy = NULL; + struct amd_cpudata *cpudata = NULL; + + highest_perf = amd_get_highest_perf(); + + for_each_possible_cpu(cpu) { + policy = cpufreq_cpu_get(cpu); + if (!policy) + break; + cpudata = policy->driver_data; + + if (get_shared_mem()) { + ret = cppc_get_perf_caps(cpu, &cppc_perf); + if (ret) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cppc_get_perf_caps ret=%d is error!\n", __func__, ret); + return; + } + + nominal_perf = cppc_perf.nominal_perf; + lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; + lowest_perf = cppc_perf.lowest_perf; + } else { + ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &cap1); + if (ret) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s read CPPC_CAP1 ret=%d is error!\n", __func__, ret); + return; + } + + nominal_perf = AMD_CPPC_NOMINAL_PERF(cap1); + lowest_nonlinear_perf = AMD_CPPC_LOWNONLIN_PERF(cap1); + lowest_perf = AMD_CPPC_LOWEST_PERF(cap1); + } + + if ((highest_perf != READ_ONCE(cpudata->highest_perf)) || + (nominal_perf != READ_ONCE(cpudata->nominal_perf)) || + (lowest_nonlinear_perf != READ_ONCE(cpudata->lowest_nonlinear_perf)) || + (lowest_perf != READ_ONCE(cpudata->lowest_perf))) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cpu%d highest=%d %d nominal=%d %d lowest_nonlinear=%d %d lowest=%d %d are not equal!\n", + __func__, cpu, highest_perf, cpudata->highest_perf, + nominal_perf, cpudata->nominal_perf, + lowest_nonlinear_perf, cpudata->lowest_nonlinear_perf, + lowest_perf, cpudata->lowest_perf); + return; + } + + if (!((highest_perf >= nominal_perf) && + (nominal_perf > lowest_nonlinear_perf) && + (lowest_nonlinear_perf > lowest_perf) && + (lowest_perf > 0))) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cpu%d highest=%d nominal=%d lowest_nonlinear=%d lowest=%d have error!\n", + __func__, cpu, highest_perf, nominal_perf, + lowest_nonlinear_perf, lowest_perf); + return; + } + } + + aput_cases[index].result = APUT_RESULT_PASS; +} + +/* + * Check if the each frequency values are reasonable. + * max_freq >= nominal_freq > lowest_nonlinear_freq > min_freq > 0 + * check max freq when set support boost mode. + */ +static void aput_check_freq(u32 index) +{ + int cpu = 0; + struct cpufreq_policy *policy = NULL; + struct amd_cpudata *cpudata = NULL; + + for_each_possible_cpu(cpu) { + policy = cpufreq_cpu_get(cpu); + if (!policy) + break; + cpudata = policy->driver_data; + + if (!((cpudata->max_freq >= cpudata->nominal_freq) && + (cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) && + (cpudata->lowest_nonlinear_freq > cpudata->min_freq) && + (cpudata->min_freq > 0))) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cpu%d max=%d nominal=%d lowest_nonlinear=%d min=%d have error!\n", + __func__, cpu, cpudata->max_freq, cpudata->nominal_freq, + cpudata->lowest_nonlinear_freq, cpudata->min_freq); + return; + } + + if (cpudata->min_freq != policy->min) { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cpu%d cpudata_min_freq=%d policy_min=%d have error!\n", + __func__, cpu, cpudata->min_freq, policy->min); + return; + } + + if (cpudata->boost_supported) { + if ((policy->max == cpudata->max_freq) || + (policy->max == cpudata->nominal_freq)) + aput_cases[index].result = APUT_RESULT_PASS; + else { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cpu%d policy_max=%d cpu_max=%d cpu_nominal=%d have error!\n", + __func__, cpu, policy->max, cpudata->max_freq, + cpudata->nominal_freq); + return; + } + } else { + aput_cases[index].result = APUT_RESULT_FAIL; + pr_err("%s cpu%d not support boost!\n", __func__, cpu); + return; + } + } +} + +static bool aput_check_conditions(void) +{ + bool result = true; + u32 i = 0, arr_size = ARRAY_SIZE(aput_conditions); + + for (i = 0; i < arr_size; i++) { + aput_conditions[i].func(i); + if (aput_conditions[i].result != APUT_RESULT_PASS) { + result = false; + break; + } + } + + return result; +} + +static void aput_do_test_case(void) +{ + u32 i = 0, arr_size = ARRAY_SIZE(aput_cases); + + for (i = 0; i < arr_size; i++) { + pr_info("****** Begin %-5d\t %-20s\t ******\n", i+1, aput_cases[i].name); + aput_cases[i].func(i); + KSTM_CHECK_ZERO(aput_cases[i].result); + pr_info("****** End %-5d\t %-20s\t ******\n", i+1, aput_cases[i].name); + } +} + +static void __init selftest(void) +{ + if (aput_check_conditions()) + aput_do_test_case(); +} + +KSTM_MODULE_LOADERS(amd_pstate_testmod); +MODULE_AUTHOR("Meng Li "); +MODULE_DESCRIPTION("Unit test for AMD P-state driver"); +MODULE_LICENSE("GPL");