From patchwork Thu Apr 21 08:51:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821311 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D212C43219 for ; Thu, 21 Apr 2022 08:51:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386964AbiDUIyM (ORCPT ); Thu, 21 Apr 2022 04:54:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35148 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348497AbiDUIyK (ORCPT ); Thu, 21 Apr 2022 04:54:10 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 747CB1DA48; Thu, 21 Apr 2022 01:51:20 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id E4E5760006; Thu, 21 Apr 2022 08:51:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531079; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7PA5+rXzWjZ9Q6wg5gmJXLAXoBOOOTL5d3kZBJW8pVc=; b=e3gaJMITFbe/cDV9SORToKkuA3WaZJpsrBGFB+xmtFhu8/XVrzeAQqVVMqUgUWu7pPZ2Mg /041XvowIxe46VQLEr9Zn/QxhDi0ZxKNqHHkKN8ikh0Vqzma2rw/YR0PSIO6GsApmv2Jjc eMNbbXnshshuNyv4+M5iJwLb4xx21iC2spgMNOAGR+YWxC/l5giXEZ9ASon/02cSKCOQ4/ I+rFBflHLHGE4slVtRaXaKpYdIdoBcJEup4kPfwsP/RdblflUykSdoPWQOekA8xosK2x0m dYFWg7IIrpy7hrS11RnQ/6srkGxGdfjKhXB1JnkqkDxF89B0y2nE19/mO4dLcg== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v11 1/9] dt-bindings: dmaengine: Introduce RZN1 dmamux bindings Date: Thu, 21 Apr 2022 10:51:04 +0200 Message-Id: <20220421085112.78858-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring Acked-By: Vinod Koul --- .../bindings/dma/renesas,rzn1-dmamux.yaml | 51 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml new file mode 100644 index 000000000000..d83013b0dd74 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 DMA mux + +maintainers: + - Miquel Raynal + +allOf: + - $ref: "dma-router.yaml#" + +properties: + compatible: + const: renesas,rzn1-dmamux + + reg: + maxItems: 1 + description: DMA mux first register offset within the system control parent. + + '#dma-cells': + const: 6 + description: + The first four cells are dedicated to the master DMA controller. The fifth + cell gives the DMA mux bit index that must be set starting from 0. The + sixth cell gives the binary value that must be written there, ie. 0 or 1. + + dma-masters: + minItems: 1 + maxItems: 2 + + dma-requests: + const: 32 + +required: + - reg + - dma-requests + +additionalProperties: false + +examples: + - | + dma-router@a0 { + compatible = "renesas,rzn1-dmamux"; + reg = <0xa0 4>; + #dma-cells = <6>; + dma-masters = <&dma0 &dma1>; + dma-requests = <32>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index fd768d43e048..120d3ae57a4b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19040,6 +19040,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER M: Viresh Kumar R: Andy Shevchenko S: Maintained +F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml F: drivers/dma/dw/ F: include/dt-bindings/dma/dw-dmac.h From patchwork Thu Apr 21 08:51:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821312 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01DD2C433F5 for ; Thu, 21 Apr 2022 08:51:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348497AbiDUIyO (ORCPT ); Thu, 21 Apr 2022 04:54:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1381575AbiDUIyO (ORCPT ); Thu, 21 Apr 2022 04:54:14 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E1AFDF49; Thu, 21 Apr 2022 01:51:22 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 5660B60011; Thu, 21 Apr 2022 08:51:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531081; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ufacyo2BIZ8ell+Qh9P+IyEHIkAIPJ9lkLf9WuXjjMM=; b=QiYK32xKJtE7Fi9WgjjTof7G4sbg0XMRgdsXY2VQ2O5zU9/SDOxx7Y4pIb8tOyFdyPfot5 ozP4cgS8f/VQA1OAfh9XaDs0t4is1V8x6jhoPGS0zjgAFxYzrmp7qb2vCES7Ink5fF/0p1 mgkBZYbb7GeP/UaXyFgVgqwiHeh29O2dfZvYsaQLHUgUPANWsmN0j23ToMrz/oBxKFVJGi U9jej7tG4x67jCMmGZ30f0ExtGsEaE6A9H7oVi/y7MLk05tS9eV7xCoYO9wuRLj4P+Td5d Cyns6xAufYsyx5/y0nDZPU2d+J/OWNX97a7uLW/bVE5+IzfOPEOPtEUdwlxbgg== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v11 2/9] dt-bindings: clock: r9a06g032-sysctrl: Reference the DMAMUX subnode Date: Thu, 21 Apr 2022 10:51:05 +0200 Message-Id: <20220421085112.78858-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org This system controller contains several registers that have nothing to do with the clock handling, like the DMA mux register. Describe this part of the system controller as a subnode. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Acked-by: Stephen Boyd Reviewed-by: Geert Uytterhoeven --- .../bindings/clock/renesas,r9a06g032-sysctrl.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml index 25dbb0fac065..95bf485c6cec 100644 --- a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml @@ -39,6 +39,17 @@ properties: '#power-domain-cells': const: 0 + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + "^dma-router@[a-f0-9]+$": + type: object + $ref: "../dma/renesas,rzn1-dmamux.yaml#" + required: - compatible - reg From patchwork Thu Apr 21 08:51:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821313 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47D3CC433FE for ; Thu, 21 Apr 2022 08:51:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386970AbiDUIyQ (ORCPT ); Thu, 21 Apr 2022 04:54:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386971AbiDUIyQ (ORCPT ); Thu, 21 Apr 2022 04:54:16 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::223]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5EAA7DF49; Thu, 21 Apr 2022 01:51:26 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 4223F60009; Thu, 21 Apr 2022 08:51:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531085; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=b/2uPiY2TYWmapERUhN8j/bje3sF8nIU5bDWIigV/vE=; b=S2hNj2puAOO1U4pfwhY/Vm4aXbsFjX6UaahKQ04biXU7k0ush5oav2m8xVBNhg1wS7aCJl hJ/IKYHB/JMrSHc4CnxezyjFtfjHSmuRf6x68pXyG0X7lCezGWPB6jTO3MTP4VKWEdKflr luxZg69ltaeqnbJPH4c4kZv2UGWtM7sbbL5694bjzORckz+OgmYsZcuXMmXKMAKa6XN4uQ TDKkxio0rbEQ5DYUL16gCc1OjAlwORAQtI0Vf1DSFyCalwSWkPaba1NNodf99Wtl/Tx66i YGmZCR6mN7z+gipJLopDn5aBKeRMdfahfgHlSr6pjsGepZIUsJVbKalwUZ4j+A== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v11 3/9] dt-bindings: dmaengine: Introduce RZN1 DMA compatible Date: Thu, 21 Apr 2022 10:51:06 +0200 Message-Id: <20220421085112.78858-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Just like for the NAND controller that is also on this SoC, let's provide a SoC generic and a more specific couple of compatibles for the DMA controller. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring Acked-By: Vinod Koul --- .../devicetree/bindings/dma/snps,dma-spear1340.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 6b35089ac017..c13649bf7f19 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -15,7 +15,13 @@ allOf: properties: compatible: - const: snps,dma-spear1340 + oneOf: + - const: snps,dma-spear1340 + - items: + - enum: + - renesas,r9a06g032-dma + - const: renesas,rzn1-dma + "#dma-cells": minimum: 3 From patchwork Thu Apr 21 08:51:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821314 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA2C5C433F5 for ; Thu, 21 Apr 2022 08:51:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386973AbiDUIyT (ORCPT ); Thu, 21 Apr 2022 04:54:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386975AbiDUIyS (ORCPT ); Thu, 21 Apr 2022 04:54:18 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA5AD1EAE8; Thu, 21 Apr 2022 01:51:28 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 2E3DE60015; Thu, 21 Apr 2022 08:51:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531087; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XZQwq9EVWiu0S9glnJx6yd3klQequgPHgMCbo1b5VzU=; b=lSAGsmHnGtDajV3BmAh9SvPhjeoiri2OrIc5U6pdC9EU4gRmGcdzwOQE43Z9zvYi8NC4O1 wGqpO/BAjS79Ch8tX8Bzq/uYLadbynJXN2gtqtH6M+sv078Hhkc1yemj5V7scdThUC7y8V OCgLWG784JtvBUJQv3cOqkKpxaLY4M4RDzqzs333bwNmca7o+IBSjdLnneSd05Q5ocCwHm c2ZRBbXBZSlfz/Ft30JSh1M3Es61xBGAUbhiYrhFBEjDL/t7MG32Rm4liC8T9SHnONDssb TajF1TUnWKISpkaS40rDQtQvnBkyTcR57WMJ6vdoUBHoNKHjhNwAvKH3hjc0hg== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v11 4/9] soc: renesas: rzn1-sysc: Export function to set dmamux Date: Thu, 21 Apr 2022 10:51:07 +0200 Message-Id: <20220421085112.78858-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The dmamux register is located within the system controller. Without syscon, we need an extra helper in order to give write access to this register to a dmamux driver. Signed-off-by: Miquel Raynal Acked-by: Stephen Boyd Reviewed-by: Geert Uytterhoeven --- drivers/clk/renesas/r9a06g032-clocks.c | 35 ++++++++++++++++++- include/linux/soc/renesas/r9a06g032-sysctrl.h | 11 ++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 include/linux/soc/renesas/r9a06g032-sysctrl.h diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index c99942f0e4d4..052d99059981 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -20,9 +20,12 @@ #include #include #include +#include #include #include +#define R9A06G032_SYSCTRL_DMAMUX 0xA0 + struct r9a06g032_gate { u16 gate, reset, ready, midle, scon, mirack, mistat; @@ -315,6 +318,30 @@ struct r9a06g032_priv { void __iomem *reg; }; +static struct r9a06g032_priv *sysctrl_priv; + +/* Exported helper to access the DMAMUX register */ +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) +{ + unsigned long flags; + u32 dmamux; + + if (!sysctrl_priv) + return -EPROBE_DEFER; + + spin_lock_irqsave(&sysctrl_priv->lock, flags); + + dmamux = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + dmamux &= ~mask; + dmamux |= val & mask; + writel(dmamux, sysctrl_priv->reg + R9A06G032_SYSCTRL_DMAMUX); + + spin_unlock_irqrestore(&sysctrl_priv->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_set_dmamux); + /* register/bit pairs are encoded as an uint16_t */ static void clk_rdesc_set(struct r9a06g032_priv *clocks, @@ -963,7 +990,13 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) if (error) return error; - return r9a06g032_add_clk_domain(dev); + error = r9a06g032_add_clk_domain(dev); + if (error) + return error; + + sysctrl_priv = clocks; + + return 0; } static const struct of_device_id r9a06g032_match[] = { diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h new file mode 100644 index 000000000000..066dfb15cbdd --- /dev/null +++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ +#define __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ + +#ifdef CONFIG_CLK_R9A06G032 +int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val); +#else +static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; } +#endif + +#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */ From patchwork Thu Apr 21 08:51:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821315 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A562C433FE for ; Thu, 21 Apr 2022 08:51:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386982AbiDUIyV (ORCPT ); Thu, 21 Apr 2022 04:54:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386977AbiDUIyV (ORCPT ); Thu, 21 Apr 2022 04:54:21 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::223]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 950B3DF49; Thu, 21 Apr 2022 01:51:31 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id A123D60016; Thu, 21 Apr 2022 08:51:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531090; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xXtdpyXt+YjtRwGAXtAk7QcQIpXJNhn4MwmiuZj8dMk=; b=CMJORgNGRsHLEgECdsxt51fFxFVU9dOonj0/UELtLzzwqx6tmjQVnNcwCyOziP86EiCCGu heqg/JRbl/II01304CAyaMLHIDfOzjD6QsqGY3E5SnmwINK4T3qANanVLJEs7BZxL+M0v0 bOPA6SNBxzvMDKGLfJTi0RozG51ElN8er1BzYtikcpsHuedT5tEsE98vyyCdpehWUnecB6 wyolbtl7Utpb9heFqchj/xaYb7XnMuVpW7r7w4QbgFQeDz5GO4OwW6h8HJmImshCRm3/VM Xf9Jz6fro0rG4c7j/MOHwYJhv6s/jfHOZUJGaAOYQpODq0fqEipx4ENsQl260A== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v11 5/9] dmaengine: dw: dmamux: Introduce RZN1 DMA router support Date: Thu, 21 Apr 2022 10:51:08 +0200 Message-Id: <20220421085112.78858-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. We need two additional information from the 'dmas' property: the channel (bit in the dmamux register) that must be accessed and the value of the mux for this channel. Signed-off-by: Miquel Raynal Reviewed-by: Andy Shevchenko Reviewed-by: Ilpo Järvinen --- drivers/dma/dw/Kconfig | 9 ++ drivers/dma/dw/Makefile | 2 + drivers/dma/dw/rzn1-dmamux.c | 155 +++++++++++++++++++++++++++++++++++ 3 files changed, 166 insertions(+) create mode 100644 drivers/dma/dw/rzn1-dmamux.c diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig index db25f9b7778c..a9828ddd6d06 100644 --- a/drivers/dma/dw/Kconfig +++ b/drivers/dma/dw/Kconfig @@ -16,6 +16,15 @@ config DW_DMAC Support the Synopsys DesignWare AHB DMA controller. This can be integrated in chips such as the Intel Cherrytrail. +config RZN1_DMAMUX + tristate "Renesas RZ/N1 DMAMUX driver" + depends on DW_DMAC + depends on ARCH_RZN1 || COMPILE_TEST + help + Support the Renesas RZ/N1 DMAMUX which is located in front of + the Synopsys DesignWare AHB DMA controller located on Renesas + SoCs. + config DW_DMAC_PCI tristate "Synopsys DesignWare AHB DMA PCI driver" depends on PCI diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile index a6f358ad8591..e1796015f213 100644 --- a/drivers/dma/dw/Makefile +++ b/drivers/dma/dw/Makefile @@ -9,3 +9,5 @@ dw_dmac-$(CONFIG_OF) += of.o obj-$(CONFIG_DW_DMAC_PCI) += dw_dmac_pci.o dw_dmac_pci-y := pci.o + +obj-$(CONFIG_RZN1_DMAMUX) += rzn1-dmamux.o diff --git a/drivers/dma/dw/rzn1-dmamux.c b/drivers/dma/dw/rzn1-dmamux.c new file mode 100644 index 000000000000..11d254e450b0 --- /dev/null +++ b/drivers/dma/dw/rzn1-dmamux.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Schneider-Electric + * Author: Miquel Raynal + */ +#include +#include +#include +#include +#include +#include + +#define RNZ1_DMAMUX_NCELLS 6 +#define RZN1_DMAMUX_MAX_LINES 64 +#define RZN1_DMAMUX_LINES_PER_CTLR 16 + +struct rzn1_dmamux_data { + struct dma_router dmarouter; + DECLARE_BITMAP(used_chans, 2 * RZN1_DMAMUX_LINES_PER_CTLR); +}; + +struct rzn1_dmamux_map { + unsigned int req_idx; +}; + +static void rzn1_dmamux_free(struct device *dev, void *route_data) +{ + struct rzn1_dmamux_data *dmamux = dev_get_drvdata(dev); + struct rzn1_dmamux_map *map = route_data; + + dev_dbg(dev, "Unmapping DMAMUX request %u\n", map->req_idx); + + clear_bit(map->req_idx, dmamux->used_chans); + + kfree(map); +} + +static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); + struct rzn1_dmamux_data *dmamux = platform_get_drvdata(pdev); + struct rzn1_dmamux_map *map; + unsigned int dmac_idx, chan, val; + u32 mask; + int ret; + + if (dma_spec->args_count != RNZ1_DMAMUX_NCELLS) + return ERR_PTR(-EINVAL); + + map = kzalloc(sizeof(*map), GFP_KERNEL); + if (!map) + return ERR_PTR(-ENOMEM); + + chan = dma_spec->args[0]; + map->req_idx = dma_spec->args[4]; + val = dma_spec->args[5]; + dma_spec->args_count -= 2; + + if (chan >= RZN1_DMAMUX_LINES_PER_CTLR) { + dev_err(&pdev->dev, "Invalid DMA request line: %u\n", chan); + ret = -EINVAL; + goto free_map; + } + + if (map->req_idx >= RZN1_DMAMUX_MAX_LINES || + (map->req_idx % RZN1_DMAMUX_LINES_PER_CTLR) != chan) { + dev_err(&pdev->dev, "Invalid MUX request line: %u\n", map->req_idx); + ret = -EINVAL; + goto free_map; + } + + dmac_idx = map->req_idx >= RZN1_DMAMUX_LINES_PER_CTLR ? 1 : 0; + dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", dmac_idx); + if (!dma_spec->np) { + dev_err(&pdev->dev, "Can't get DMA master\n"); + ret = -EINVAL; + goto free_map; + } + + dev_dbg(&pdev->dev, "Mapping DMAMUX request %u to DMAC%u request %u\n", + map->req_idx, dmac_idx, chan); + + if (test_and_set_bit(map->req_idx, dmamux->used_chans)) { + ret = -EBUSY; + goto free_map; + } + + mask = BIT(map->req_idx); + ret = r9a06g032_sysctrl_set_dmamux(mask, val ? mask : 0); + if (ret) + goto clear_bitmap; + + return map; + +clear_bitmap: + clear_bit(map->req_idx, dmamux->used_chans); +free_map: + kfree(map); + + return ERR_PTR(ret); +} + +static const struct of_device_id rzn1_dmac_match[] = { + { .compatible = "renesas,rzn1-dma" }, + {} +}; + +static int rzn1_dmamux_probe(struct platform_device *pdev) +{ + struct device_node *mux_node = pdev->dev.of_node; + const struct of_device_id *match; + struct device_node *dmac_node; + struct rzn1_dmamux_data *dmamux; + + dmamux = devm_kzalloc(&pdev->dev, sizeof(*dmamux), GFP_KERNEL); + if (!dmamux) + return -ENOMEM; + + dmac_node = of_parse_phandle(mux_node, "dma-masters", 0); + if (!dmac_node) + return dev_err_probe(&pdev->dev, -ENODEV, "Can't get DMA master node\n"); + + match = of_match_node(rzn1_dmac_match, dmac_node); + of_node_put(dmac_node); + if (!match) + return dev_err_probe(&pdev->dev, -EINVAL, "DMA master is not supported\n"); + + dmamux->dmarouter.dev = &pdev->dev; + dmamux->dmarouter.route_free = rzn1_dmamux_free; + + platform_set_drvdata(pdev, dmamux); + + return of_dma_router_register(mux_node, rzn1_dmamux_route_allocate, + &dmamux->dmarouter); +} + +static const struct of_device_id rzn1_dmamux_match[] = { + { .compatible = "renesas,rzn1-dmamux" }, + {} +}; + +static struct platform_driver rzn1_dmamux_driver = { + .driver = { + .name = "renesas,rzn1-dmamux", + .of_match_table = rzn1_dmamux_match, + }, + .probe = rzn1_dmamux_probe, +}; +module_platform_driver(rzn1_dmamux_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Miquel Raynal X-Patchwork-Id: 12821316 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AE13C433FE for ; Thu, 21 Apr 2022 08:51:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386985AbiDUIyY (ORCPT ); Thu, 21 Apr 2022 04:54:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386977AbiDUIyX (ORCPT ); Thu, 21 Apr 2022 04:54:23 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::223]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2AD5813E9F; Thu, 21 Apr 2022 01:51:34 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 5E01060009; Thu, 21 Apr 2022 08:51:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531092; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zAtIbUPsxkJ2Vkxs0B9jhzXSzY5HA+HvzfhgI4EksRw=; b=bk76sOzg7sw3lp5zB5fTEmST4GU/UM0bWi8ubNU9W3ldgRVlA4WhCTb8/bnkVwhevEH1OC M+BkdO3uAb6TynAO6mZ3DL2mffNh3MEYtJFWMObZZvZB4FBfinzqDKt/tOLD7R5qgXEx9B 00+HW9w08kcEN0z0f2NpgxUVVJfpd21oM1mJcU1RJ2S2AORDhZApQBuQ9AyBlqtmpQjXw6 XjpR/YfbqWJFgFEeVYMyzUq2vUAstZ0f+fv9r6oJXNegYQ3jrZRuzDgmEJnM587vhb4ilK sLpfMzpnY1ChZlJ/UvgPV0cxgZR1VV8bSRkexOfYQr4+iTgdP11UQnm21w2fPg== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v11 6/9] clk: renesas: r9a06g032: Probe possible children Date: Thu, 21 Apr 2022 10:51:09 +0200 Message-Id: <20220421085112.78858-7-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The clock controller device on r9a06g032 takes all the memory range that is described as being a system controller. This range contains many different (unrelated?) registers besides the ones belonging to the clock controller, that can necessitate to be accessed from other peripherals. For instance, the dmamux registers are there. The dmamux "device" will be described as a child node of the clock/system controller node, which means we need the top device driver (the clock controller driver in this case) to populate its children manually. Signed-off-by: Miquel Raynal Acked-by: Stephen Boyd --- drivers/clk/renesas/r9a06g032-clocks.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index 052d99059981..1df56d7ab3e1 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -996,7 +997,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev) sysctrl_priv = clocks; - return 0; + return of_platform_populate(np, NULL, NULL, dev); } static const struct of_device_id r9a06g032_match[] = { From patchwork Thu Apr 21 08:51:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821317 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12930C433F5 for ; Thu, 21 Apr 2022 08:51:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386989AbiDUIy0 (ORCPT ); Thu, 21 Apr 2022 04:54:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386977AbiDUIy0 (ORCPT ); Thu, 21 Apr 2022 04:54:26 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::223]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7F8701DA72; Thu, 21 Apr 2022 01:51:36 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id CE06460007; Thu, 21 Apr 2022 08:51:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531095; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Wvra6RNRuCu2P8jLSDcUUkmJcWIau45cFl07/k1NsZM=; b=X9Ujtf16lHjSNseNkFmDakFQLihk8giRrDco4U0MTL+dJalGgiT7bScvLjT+NLn9TKPnzr sX4dtaIWHuvBkqUxvDuovxqQHtxxD8ND3mmM33tdToY8TBGtQillWaf6l+2MpncV6pMEP/ ixy9L17IqcnI+XUJz0BcQmGhDWWLd5+O988nzl7yIcf3gMn3iZX/JfbiE/dT7vWjeA1Fkm WcLlYEnsPO+WEYLEfJ2y/F/RUKsS+kbMN7Ab4L+GAS7sGgbopH37sHHCftlYo/ZuE+SEdr I+ksr7dgKc0b8YiDqRxYgcfvF1Un7iUfIrU6KjGl2VTTlJl8SwuAedT7xltlsA== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v11 7/9] dmaengine: dw: Add RZN1 compatible Date: Thu, 21 Apr 2022 10:51:10 +0200 Message-Id: <20220421085112.78858-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The Renesas RZN1 DMA IP is very close to the original DW DMA IP, a DMA router has been introduced to handle the wiring options that have been added. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven Acked-by: Andy Shevchenko Acked-By: Vinod Koul --- drivers/dma/dw/platform.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c index 246118955877..47f2292dba98 100644 --- a/drivers/dma/dw/platform.c +++ b/drivers/dma/dw/platform.c @@ -137,6 +137,7 @@ static void dw_shutdown(struct platform_device *pdev) #ifdef CONFIG_OF static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, + { .compatible = "renesas,rzn1-dma", .data = &dw_dma_chip_pdata }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); From patchwork Thu Apr 21 08:51:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821318 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09BC0C433F5 for ; Thu, 21 Apr 2022 08:51:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386977AbiDUIy2 (ORCPT ); Thu, 21 Apr 2022 04:54:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386992AbiDUIy2 (ORCPT ); Thu, 21 Apr 2022 04:54:28 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::223]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E87FA13E9F; Thu, 21 Apr 2022 01:51:38 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 48B9660006; Thu, 21 Apr 2022 08:51:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531097; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ge58NimhaKWCxwe0+hrNu+VcWrBPIvnbMynidvFnOMc=; b=Foj3KRrqBf4gDZJPLj2xwuMveD4oi2J5LC+IvhpPR9IabZZasYOXt/cmVmbgIwrtObszq9 fBD4lSZWoWnFQUcOyV6gNJ4uDovn+azcQfpBaiLKJReUEjmxJr8nh85xaNGcHw9JhPa1zb CmYJxV9JjNyxn3i1i9i0z1+vrfNLtdrhkqsARNzdgB/Z02sfhVJbcbTZK9bPSIuR/wLErK onZrQB8bMgdxF4tnD2ptwdgPxcRBsZtDVdPg1MdCQ0u1aNl8gCQQSs0rdz9F0Fa8COZR6i cm0YvqgC+ISGihN5UdC+fjDK+nO3j71rv5fHPKJaQv4DEIHEtm56IqVgXBWLzQ== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v11 8/9] ARM: dts: r9a06g032: Add the two DMA nodes Date: Thu, 21 Apr 2022 10:51:11 +0200 Message-Id: <20220421085112.78858-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 636a6ab31c58..839580ec21ee 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -200,6 +200,36 @@ nand_controller: nand-controller@40102000 { status = "disabled"; }; + dma0: dma-controller@40104000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40104000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA0>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + + dma1: dma-controller@40105000 { + compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma"; + reg = <0x40105000 0x1000>; + interrupts = ; + clock-names = "hclk"; + clocks = <&sysctrl R9A06G032_HCLK_DMA1>; + dma-channels = <8>; + dma-requests = <16>; + dma-masters = <1>; + #dma-cells = <3>; + block_size = <0xfff>; + data_width = <3>; + status = "disabled"; + }; + gic: interrupt-controller@44101000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; interrupt-controller; From patchwork Thu Apr 21 08:51:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12821319 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 441E6C433EF for ; Thu, 21 Apr 2022 08:51:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386995AbiDUIyb (ORCPT ); Thu, 21 Apr 2022 04:54:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1386992AbiDUIyb (ORCPT ); Thu, 21 Apr 2022 04:54:31 -0400 Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC3F01DA68; Thu, 21 Apr 2022 01:51:41 -0700 (PDT) Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id C26FC60009; Thu, 21 Apr 2022 08:51:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650531100; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gDMgEYZK2TXVp0tig+qscRTbrixY++njrNcYKAKseyE=; b=VvXM4GyXA9oNq6vStm5eW97MjVxU6wHfXIL3BaIteHnrp2ppjgyO0BYLWc88Xb1/zpPXUH F4G5WkoxCw7KXWLefi6Y169fl/TyG4gYB5nfFgDUsfpDMsMtopR7ixIYnv/lVr99q6giOp kE1q3NM+YGXbYIV4uKwGUHhjjd17RmAKhVF4WaZ/NiaMpqPyKGJ27SaYnYnsF+i7remOoe q2nJFY3tpuEfwg3mdqAzit1Fv08s95VMzOAKIuOuDniUb4E3+65o6jpSgw2f/RnsYRVfQ4 bAHOKYVHB6kAJCDeZijdCOkEIT056G8GULj3ImhGmOixcNyz/yO3QRGL/v5vwg== From: Miquel Raynal To: Magnus Damm , Gareth Williams , Phil Edworthy , Geert Uytterhoeven , Vinod Koul Cc: Miquel Raynal , linux-renesas-soc@vger.kernel.org, dmaengine@vger.kernel.org, Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , Thomas Petazzoni , Herve Codina , Clement Leger , Stephen Boyd , Michael Turquette , linux-clk@vger.kernel.org, Viresh Kumar , Andy Shevchenko , Ilpo Jarvinen , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v11 9/9] ARM: dts: r9a06g032: Describe the DMA router Date: Thu, 21 Apr 2022 10:51:12 +0200 Message-Id: <20220421085112.78858-10-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220421085112.78858-1-miquel.raynal@bootlin.com> References: <20220421085112.78858-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org There is a dmamux on this SoC which allows picking two different sources for a single DMA request. Signed-off-by: Miquel Raynal Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 839580ec21ee..c854aa4cfa77 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -91,6 +91,16 @@ sysctrl: system-controller@4000c000 { clocks = <&ext_mclk>, <&ext_rtc_clk>, <&ext_jtag_clk>, <&ext_rgmii_ref>; clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; + #address-cells = <1>; + #size-cells = <1>; + + dmamux: dma-router@a0 { + compatible = "renesas,rzn1-dmamux"; + reg = <0xa0 4>; + #dma-cells = <6>; + dma-requests = <32>; + dma-masters = <&dma0 &dma1>; + }; }; uart0: serial@40060000 {