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Nguyen" Subject: [PATCH v8 1/9] hwmon: smpro: Add Ampere's Altra smpro-hwmon driver Date: Fri, 22 Apr 2022 09:46:45 +0700 Message-Id: <20220422024653.2199489-2-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c97fc791-6a7b-4f1f-bf1d-08da240a6a9f X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EJRZC3wyiR2iNC1lUxkEIVbR90V7pnFUiYdFyGdq9+0lfMYqUb7Z7AV/5Cvc7q02YYPYjIbdd9WHOhY7bPEoVrNtUJl6ya0AJ0CMM4T68nC5cwcNk2f42CDW6VyMEGMh5QeBHw2gY/Oj/eoTJB9vzwjvlHVZLNu2Zn4w1IWBSxNU49XIRdaypYLW4rgpilfoTBFPLbfc/idXdJND3bZc0nR+5NeIgKxZAho82XuZoOlEq2SsHagPrQEffJmbg43xjt6vesRpOfDcMIYjGGuL+UHlUBhluYa5XL31Xd4rcUEUQ6jqiKY8Jza1oHI0zVRg0AdWSnUwkqt64422ChJZThcWptqg8qOqqEiBb54OuXId8P7UkxyTZV5CTHZ7yedRMG2rzxOc3cMMmKhX+hwZn28job4KjgMSBZiLv45PjvNUNWopqNkz1pFLRVJG5/heacp3z1P4xANQbt6rN5M6xs89jSv6+x8pmP02PYDqG79LuNeWc1V+Tx8iTx82FzcqyTPdixCS7zf+MRF+ZcGjI3uYxbFedq8WDBeU2pOpYNBn1VjZONpZRLhxpGOhcTqAU3H1nA2sVd/NwvKyXX5guRL2i2g2ZrImyKr6u+RN9yyuLOLoXByrmb8imQdRjQ+B1fvVoD7f0xGp8bfYxu0vYtrnDOHo0y8ec4IDjjLbsOy6ptOiUZ/hLEilR5IgH9oSzbsmQO8n3R1nfKD4BBFBvecMrvwMI6ok/5s3DzXQb+A= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(6666004)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(30864003)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DU4ZefUANDuU3K43GJMNEu7udQJl9qLidq/CpzWlcQo2564JtO+KL4Yr3lzKYJ+VDMhF7qVEen3tjCJ5zgAZ7105TkmM+kByiaM2LZC319RwRGKlOApnOhaf5VLuwe9b+OhI3qX6X4YxZEwoyRwGh4unKLLM0CsY5Oa1kDkgzdfi9afd6R51MoB9rtEclkg5vLwBUHPq7x0iIZ7thDB2sPe6sN/74OOgrM+XaLv9RGZPn8jjzY/ov9WKoG52+yTu7HZfRSZfWnQzHxPt2ilfFx2gDerHTBMeXt9dSgDg7nIDhal1bLvznrkWVnpvS71aaD08YtxRmTYWmgnBoPhmrIStjbRKHUQ443QDu8pir0Mp1WTPKXBwCotyGHyQGZMx2HmrI0lLSqqqUMANxrT0h1VCG0xHRNJNaj1eoZXl91IM87jHiWFEChiXUd/NxwCUy+nZFk82kwkR5NPZC5StY3saP3NVXj4TUIDyE2Oi0VZyGDYFcXfnC93cvWPCoXU5w3jb9pUe8+4OXCp2TqtcrsOw6q+FGEvGty/ueq99QOOmE6p0KQk0AqRc8xNOdPloKkIcSlPYFKWXE1eDbwtT7Yx4aGysJQisSrBsg4pu63/m4og1RCUDSqjNBKOomJFevjGX6r4zc+OFskG8IQBJVAF3APachkGMMn21bMaSn2WCNpH5e8g0H3SqmcyEaAHz1DJGn69IN1wr3CVzZTw3zZjt9gFLDOiUV9kYWcv1iAEa4N070irPS9SAlmNp+wAgWM6dMRfr5AHPWGU8+grI5fDdhnPdrEOEB70OEdzkDRH9cUqRjpWYn711pvCncVjOzGKXewFNHubefiz+7VcUQazjQ683A+W56dJLWltfrW9sqARpQx9T2rSbTp4EuZHhmQ2x7mAg5Gl39S1CwZVH7Hft7k8cGWVDTmVduVU2REQpmC80Qo5XbG9uscTgGH08K2OtT32T9akLqJiSVXPtsqXNX4z7QGfbkeaqPEsUzkvcO1UMg3horvfktJSPeu2d/S3t+NrpyU5NgpU6cxR3g/w+bGWtyZ0NIS6dNgwCY60m1lc7KkvUDhU10jwjQkeWosQN/4hwqOEVdYtby/PkfqJ4XLwekKPg60/IHMLCC7jWlDciExd28xTu0/uvo8/DVNWqDRi6M8lZRXBjVMh2VfWzOuCH5tdIq0xOLgeG3RqnvMj+Uw7ZGzpCbL6v4GUEcRu2i+wCUzY6d1y7xx3S63z3clPUvw1EBqpX0lVDIf7vhZi1fhXvwPsozyJGcbQwiNMoes0gRi7HxmLGmmaAnl4m652gr62HVSK+oLacMVemumOqYfKSvOLRdjr77U3+pjwVfgg1Xru3mx1mx17HrddEyYXr5pq+6GbgsulKqEWpqHdVA8dJYGVSNJS8fXp7/PeQYQxvXoSR9qWX762uQyHBcDbPQWCj/kgG4OSh3rDYVl+IO3+NO6JfkjxYdhN7BsFL2n/AG7NyLrZu0ThZp55MExc2RUDUStxyESYAKNly7fAG8vQ+HjrnsXealXXcAQVZVmttvZB94vlouFdT/fNsxblMrEC8OgmTo2sG2+I4lsNToITSSE0c04QT3YOnYt6rG7NddAP0bqy6MX2ZREqIjdap+MDmfCWY6fm5zVf3esWEWrn4Md71VbekZZluutxxLnf5Jv/kWhHCq+wT02PuaI9W9n15ohQPr52K6gvzfRCUGDCDR4Y/3HoRem4vDJhai4ssCRBgNL8LAh4VRU9RnW07AdZUJdZ1DWrhM4IPt63ISmSVycE26YXZoRaE X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: c97fc791-6a7b-4f1f-bf1d-08da240a6a9f X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:18.6285 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2UIepxwPMXHmJ9dTyqWjGyUUdWFvLFp3R4zf+r5iTHep3EgPyLeDKAQ5W/YKSz3sHGpZAuE0dyTdwF5GeRFt2k9m7RTIxJM2WepM5NOTyEw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds support for Ampere SMpro hwmon driver. This driver supports accessing various CPU sensors provided by the SMpro co-processor including temperature, power, voltages, and current. Signed-off-by: Quan Nguyen Reviewed-by: Guenter Roeck --- Changes in v8: + Masks reserved bit when read 10-bit power value [Quan] + Insert 'break;' to avoid fall-through [kernel test robot] Dear Guenter, I still keep your Reviewed-by here with these changes, expecting you are still OK with them. Please let me know if otherwise. Thanks. Changes in v7: + Update GPL version [Quan] Changes in v6: + None Changes in v5: + Drop ManufacturerID checking when probe as it was checked during smpro-mfd probing [Quan] + Drop the use of register offset [Quan] + Removed the use of compatible string as it is instantiated by smpro-mfd driver [Quan] Changes in v4: + Returned regmap_read() error code [Guenter] Changes in v3: + Handled negative temperature value [Guenter] + Returned -ENODEV if Manufacturer ID is wrong [Guenter] + Refactored smpro_read_string() and smpro_temp_read() [Guenter] + Removed smpro_write() function [Guenter] + Added minor refactor changes [Quan] Changes in v2: + Removed "virtual" sensors [Guenter] + Reported SOC_TDP as "Socket TDP" using max attributes [Guenter] + Corrected return error code when host is turn off [Guenter] + Reported MEM HOT Threshold for all DIMMs as temp*_crit [Guenter] + Removed license info as SPDX-License-Identifier existed [Guenter] + Added is_visible() support [Guenter] + Used HWMON_CHANNEL_INFO() macro and LABEL attributes [Guenter] + Made is_valid_id() return boolean [Guenter] + Returned -EPROBE_DEFER when smpro reg inaccessible [Guenter] + Removed unnecessary error message when dev register fail [Guenter] + Removed Socket TDP sensor [Quan] + Included sensor type and channel in labels [Quan] + Refactorized code to fix checkpatch.pl --strict complaint [Quan] drivers/hwmon/Kconfig | 8 + drivers/hwmon/Makefile | 1 + drivers/hwmon/smpro-hwmon.c | 465 ++++++++++++++++++++++++++++++++++++ 3 files changed, 474 insertions(+) create mode 100644 drivers/hwmon/smpro-hwmon.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 1f1bb4d858cb..64a46e545a23 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -67,6 +67,14 @@ config SENSORS_ABITUGURU3 This driver can also be built as a module. If so, the module will be called abituguru3. +config SENSORS_SMPRO + tristate "Ampere's Altra SMpro hardware monitoring driver" + depends on MFD_SMPRO + help + If you say yes here you get support for the thermal, voltage, + current and power sensors of Ampere's Altra processor family SoC + with SMpro co-processor. + config SENSORS_AD7314 tristate "Analog Devices AD7314 and compatibles" depends on SPI diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 8a03289e2aa4..00e0b187675b 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -182,6 +182,7 @@ obj-$(CONFIG_SENSORS_SHT4x) += sht4x.o obj-$(CONFIG_SENSORS_SHTC1) += shtc1.o obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o obj-$(CONFIG_SENSORS_SMM665) += smm665.o +obj-$(CONFIG_SENSORS_SMPRO) += smpro-hwmon.o obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o diff --git a/drivers/hwmon/smpro-hwmon.c b/drivers/hwmon/smpro-hwmon.c new file mode 100644 index 000000000000..ccf660f74290 --- /dev/null +++ b/drivers/hwmon/smpro-hwmon.c @@ -0,0 +1,465 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMPro Hardware Monitoring Driver + * + * Copyright (c) 2022, Ampere Computing LLC + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Logical Power Sensor Registers */ +#define SOC_TEMP 0x10 +#define SOC_VRD_TEMP 0x11 +#define DIMM_VRD_TEMP 0x12 +#define CORE_VRD_TEMP 0x13 +#define CH0_DIMM_TEMP 0x14 +#define CH1_DIMM_TEMP 0x15 +#define CH2_DIMM_TEMP 0x16 +#define CH3_DIMM_TEMP 0x17 +#define CH4_DIMM_TEMP 0x18 +#define CH5_DIMM_TEMP 0x19 +#define CH6_DIMM_TEMP 0x1A +#define CH7_DIMM_TEMP 0x1B +#define RCA_VRD_TEMP 0x1C + +#define CORE_VRD_PWR 0x20 +#define SOC_PWR 0x21 +#define DIMM_VRD1_PWR 0x22 +#define DIMM_VRD2_PWR 0x23 +#define CORE_VRD_PWR_MW 0x26 +#define SOC_PWR_MW 0x27 +#define DIMM_VRD1_PWR_MW 0x28 +#define DIMM_VRD2_PWR_MW 0x29 +#define RCA_VRD_PWR 0x2A +#define RCA_VRD_PWR_MW 0x2B + +#define MEM_HOT_THRESHOLD 0x32 +#define SOC_VR_HOT_THRESHOLD 0x33 +#define CORE_VRD_VOLT 0x34 +#define SOC_VRD_VOLT 0x35 +#define DIMM_VRD1_VOLT 0x36 +#define DIMM_VRD2_VOLT 0x37 +#define RCA_VRD_VOLT 0x38 + +#define CORE_VRD_CURR 0x39 +#define SOC_VRD_CURR 0x3A +#define DIMM_VRD1_CURR 0x3B +#define DIMM_VRD2_CURR 0x3C +#define RCA_VRD_CURR 0x3D + +struct smpro_hwmon { + struct regmap *regmap; +}; + +struct smpro_sensor { + const u8 reg; + const u8 reg_ext; + const char *label; +}; + +static const struct smpro_sensor temperature[] = { + { + .reg = SOC_TEMP, + .label = "temp1 SoC" + }, + { + .reg = SOC_VRD_TEMP, + .reg_ext = SOC_VR_HOT_THRESHOLD, + .label = "temp2 SoC VRD" + }, + { + .reg = DIMM_VRD_TEMP, + .label = "temp3 DIMM VRD" + }, + { + .reg = CORE_VRD_TEMP, + .label = "temp4 CORE VRD" + }, + { + .reg = CH0_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp5 CH0 DIMM" + }, + { + .reg = CH1_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp6 CH1 DIMM" + }, + { + .reg = CH2_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp7 CH2 DIMM" + }, + { + .reg = CH3_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp8 CH3 DIMM" + }, + { + .reg = CH4_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp9 CH4 DIMM" + }, + { + .reg = CH5_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp10 CH5 DIMM" + }, + { + .reg = CH6_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp11 CH6 DIMM" + }, + { + .reg = CH7_DIMM_TEMP, + .reg_ext = MEM_HOT_THRESHOLD, + .label = "temp12 CH7 DIMM" + }, + { + .reg = RCA_VRD_TEMP, + .label = "temp13 RCA VRD" + }, +}; + +static const struct smpro_sensor voltage[] = { + { + .reg = CORE_VRD_VOLT, + .label = "vout0 CORE VRD" + }, + { + .reg = SOC_VRD_VOLT, + .label = "vout1 SoC VRD" + }, + { + .reg = DIMM_VRD1_VOLT, + .label = "vout2 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_VOLT, + .label = "vout3 DIMM VRD2" + }, + { + .reg = RCA_VRD_VOLT, + .label = "vout4 RCA VRD" + }, +}; + +static const struct smpro_sensor curr_sensor[] = { + { + .reg = CORE_VRD_CURR, + .label = "iout1 CORE VRD" + }, + { + .reg = SOC_VRD_CURR, + .label = "iout2 SoC VRD" + }, + { + .reg = DIMM_VRD1_CURR, + .label = "iout3 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_CURR, + .label = "iout4 DIMM VRD2" + }, + { + .reg = RCA_VRD_CURR, + .label = "iout5 RCA VRD" + }, +}; + +static const struct smpro_sensor power[] = { + { + .reg = CORE_VRD_PWR, + .reg_ext = CORE_VRD_PWR_MW, + .label = "power1 CORE VRD" + }, + { + .reg = SOC_PWR, + .reg_ext = SOC_PWR_MW, + .label = "power2 SoC" + }, + { + .reg = DIMM_VRD1_PWR, + .reg_ext = DIMM_VRD1_PWR_MW, + .label = "power3 DIMM VRD1" + }, + { + .reg = DIMM_VRD2_PWR, + .reg_ext = DIMM_VRD2_PWR_MW, + .label = "power4 DIMM VRD2" + }, + { + .reg = RCA_VRD_PWR, + .reg_ext = RCA_VRD_PWR_MW, + .label = "power5 RCA VRD" + }, +}; + +static int smpro_read_temp(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_temp_input: + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); + if (ret) + return ret; + break; + case hwmon_temp_crit: + ret = regmap_read(hwmon->regmap, temperature[channel].reg_ext, &value); + if (ret) + return ret; + break; + default: + return -EOPNOTSUPP; + } + + *val = sign_extend32(value, 8) * 1000; + return 0; +} + +static int smpro_read_in(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_in_input: + ret = regmap_read(hwmon->regmap, voltage[channel].reg, &value); + if (ret < 0) + return ret; + /* 15-bit value in 1mV */ + *val = value & 0x7fff; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_curr(struct device *dev, u32 attr, int channel, long *val) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int value; + int ret; + + switch (attr) { + case hwmon_curr_input: + ret = regmap_read(hwmon->regmap, curr_sensor[channel].reg, &value); + if (ret < 0) + return ret; + /* Scale reported by the hardware is 1mA */ + *val = value & 0x7fff; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_power(struct device *dev, u32 attr, int channel, long *val_pwr) +{ + struct smpro_hwmon *hwmon = dev_get_drvdata(dev); + unsigned int val = 0, val_mw = 0; + int ret; + + switch (attr) { + case hwmon_power_input: + ret = regmap_read(hwmon->regmap, power[channel].reg, &val); + if (ret) + return ret; + + ret = regmap_read(hwmon->regmap, power[channel].reg_ext, &val_mw); + if (ret) + return ret; + /* 10-bit value */ + *val_pwr = (val & 0x3ff) * 1000000 + (val_mw & 0x3ff) * 1000; + return 0; + + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_temp: + return smpro_read_temp(dev, attr, channel, val); + case hwmon_in: + return smpro_read_in(dev, attr, channel, val); + case hwmon_power: + return smpro_read_power(dev, attr, channel, val); + case hwmon_curr: + return smpro_read_curr(dev, attr, channel, val); + default: + return -EOPNOTSUPP; + } +} + +static int smpro_read_string(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, const char **str) +{ + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_label: + *str = temperature[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_in: + switch (attr) { + case hwmon_in_label: + *str = voltage[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_curr: + switch (attr) { + case hwmon_curr_label: + *str = curr_sensor[channel].label; + return 0; + default: + break; + } + break; + + case hwmon_power: + switch (attr) { + case hwmon_power_label: + *str = power[channel].label; + return 0; + default: + break; + } + break; + default: + break; + } + + return -EOPNOTSUPP; +} + +static umode_t smpro_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + const struct smpro_hwmon *hwmon = data; + unsigned int value; + int ret; + + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + case hwmon_temp_label: + case hwmon_temp_crit: + ret = regmap_read(hwmon->regmap, temperature[channel].reg, &value); + if (ret || value == 0xFFFF) + return 0; + default: + break; + } + break; + default: + break; + } + + return 0444; +} + +static const struct hwmon_channel_info *smpro_info[] = { + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT, + HWMON_T_INPUT | HWMON_T_LABEL), + HWMON_CHANNEL_INFO(in, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_LABEL), + HWMON_CHANNEL_INFO(power, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL, + HWMON_P_INPUT | HWMON_P_LABEL), + HWMON_CHANNEL_INFO(curr, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL, + HWMON_C_INPUT | HWMON_C_LABEL), + NULL +}; + +static const struct hwmon_ops smpro_hwmon_ops = { + .is_visible = smpro_is_visible, + .read = smpro_read, + .read_string = smpro_read_string, +}; + +static const struct hwmon_chip_info smpro_chip_info = { + .ops = &smpro_hwmon_ops, + .info = smpro_info, +}; + +static int smpro_hwmon_probe(struct platform_device *pdev) +{ + struct smpro_hwmon *hwmon; + struct device *hwmon_dev; + + hwmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_hwmon), GFP_KERNEL); + if (!hwmon) + return -ENOMEM; + + hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!hwmon->regmap) + return -ENODEV; + + hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "smpro_hwmon", + hwmon, &smpro_chip_info, NULL); + + return PTR_ERR_OR_ZERO(hwmon_dev); +} + +static struct platform_driver smpro_hwmon_driver = { + .probe = smpro_hwmon_probe, + .driver = { + .name = "smpro-hwmon", + }, +}; + +module_platform_driver(smpro_hwmon_driver); + +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMPro hwmon driver"); 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Fri, 22 Apr 2022 02:47:23 +0000 From: Quan Nguyen To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" Subject: [PATCH v8 2/9] docs: hwmon: (smpro-hwmon) Add documentation Date: Fri, 22 Apr 2022 09:46:46 +0700 Message-Id: <20220422024653.2199489-3-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e133c1ee-24c7-46f4-bb99-08da240a6d91 X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: eyLufBxJnZtGUC9WRKexujaQb2l+GFM7L8DtUTW3L36IGfextl2jm1ghwJ8EpCzoAmlRaQTliZuP5NiKJBGQZNk/VZGo81QpXiD/g3dX40ISN7To4RsHRZRBWa+4bByf+8godpwrtYiyEjm+coqa7HiHw35prKE3+/C/+2TUSKLFeIhRfOF+pBeSlIDswBEDioC3VOIo83mEbjdWJtVO1cRJYZdhlaMkK3pc24NpBL4lxR0Fwjk6OMVt5GgHkHUeNJZA5d24qHI6JIJZ793oVFuH2jihENfQsa9ASNCRJAOmMegZRawwobufNN9dpW5apMKG1no85SZPFYBhl0uRiNMnHrYmKefIPzwawpcqpIeZBBDF8bA4WstYvKYN8MmJ7OOP4cXo0CDzsJTIHyUDaLMtV/ThH0G5tM2Nz53pqVRokxY2RaCzc+O2fH1rasH/lGJhpL9Nr5sElPI2gYe3i+VI7Ks5SCGN0THh/vRrU4ScUxSDItHbGSLnS0yshkSugkcZh5qlMIhUo231PfsQcE3m3DvcssCSaIjZ1iN2ceALsAwzTZN0sAdWIZsTfDgcwtq1DR2rtp6OcysRwuzHYr0s84y0+Uo+vIR8QlrRr/vjrBg6h/BreJq7VK0PfLwrVzqoduFfuP8qQZLHew/IvvQSFFcFCqNqTRRCUxFU1UNem0u40BsUIV7kQ0+/cxiKZV/GMbeUgPCRnk8ZIEUUvZbZ/DTQ31pz1B2SQV77bTk= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(6666004)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RpYwwoPGCviKzD7RcVEG9xPhToxEUmbU2LG0WeorJO6sgANFa2T0sp9UfhhMVogmg3b1QP40ImrZw0+XAKl0Aaaj2ubHf9+OUA+GQVLTqALZX4JEjXZrODXq3KiBbAJB+KZprbW9rVVWu6Imf7Uvnzw0+WRhs/bBChvbNqBiwtJYSPt7AXjbnyGcEJJ5sx6IG/6c//Yd8Xw4YqH7vcsU3QzAEEDWOjTsACIJoX4xnuZU3Je+KNSn0ufFhuX1RbxVAuni7GBaUTx9OPn3Fb+WrOZvLWRSY3qM0gN3bkxjYf0DavR1QUmKd2eWKD/H1fOZ4ZxmJDAPfNXED/AH9W9UHwV9s4DCbpj2IavDbAom/YRLNwPIgNNQRnHUBrA4/esPd4j6hSOCKaEZT/vrofnAo2A8EQp509e5VJikqC2Hd64U3A2Z2TvoYZjQ2334t4q4MZ3ZimcZFpi0LgyS7WMew/gNTJG8uRpo1z9ZP+QNI5j/xp1ATOfuH+wSG/KSc19kTXp6p7gquMNHfHIhFMaL08MsMAOVD736QxG87MM9COY+BmilWzemnDy7xgaRB+E1iQxjYrw5rEyueIUYg5titssOr94kKPXoMJBDzu/tl3HzeuelFFKg2z7OVCKZco+QuKi9G/CQXEIWChgK42p90kueFuybZNe7GcfbVBl/gY/VyX0U4wgXcUecGJzjSr+6LwBBNE+XQmjrdKhPd/zaFj2cC/YzDSS5w5Y6BcXcR7iLqj7hFFyptUAbZvSQZiLS9UvDlkVJ7FEeHH1X75pxlwRr8D0IIibLyuZsTeflA4NOfeqZFv5jMw9I5ORIouvYWr9vJYi4FKLNH2+WyBfT8pS64fbu0Q7jLe1hE+VNJD88ZliWl5lHJvEwaMIt6y0w1iRaeqCU7i4BmHed4e3DxOGpj3WvrMmHIDVHKEQJO6MscMFu/FGfkG1PQjuIuTkbRBbFHBiwWDFYtfI4xXqZ6ueRybAMkD+Pa+SbDuW8G6YCC5IGb07OxZlHePt94p+xH2E7dS1i6tcG/xnP8NAFZxzg87IYQxsxTheA2kYV9inhAAU2vmV9PDiMuSNJIcIk1I5n4g02pg6ZBDpNsnEfMS2eQI0/LkiCfx4NgVy3VfXqfmFMOqf6QawoCHn5BFaJDN0fU74GFaG5UYTUJHQdlN5SyIFHPk2fqFwq5J3dOIkaSQBEccfg2rDkJxY1A2r9R85Ix3dIggAOocjuNLB8hkRzczcnM1ttc1AgdJFl5qd6aY/IsgkTV+lECXJztJVv/pSaZKnvWzonOaTyPvHFfs5VS+zC74fyeIHqaKqE3/0OGKAkoeKvvgJar0zatQ0HtBxuZr9VW5pElE0fhebn+Nb5BRhQVH7BPlf6IqyZPd2gOvMv/TYeHnUIVRFn2fpXeD1fOgcNyNsgLarR8cPGUrMsMX1Ai2DE0yKP3OharogL8hxccOAM0hF2XMUz7m67TT6Z8Ub1LHjCUdSuInQpAZWFTv1xFqxcByX0KsZ3nk8oEj9L9btdgmlDPzVYQCKqVoZGpJDqWU83fVhCXzwiC1IuPcB/poc3jW2a5IrPQZwE59XboFQCPh7hqiNPEzCWA/R4pQQu7xH/BdiiIq+RETzFscGjPBv209Iw2msGzmsmiKSl61169m+Vgy+RQvb2atO+3iKqcaRLMZfdNWoLFE+RHx43raQ7ghfOINu8QDz95NH0jtVMy7/Y4BgCkpBd0fqchPnpgpT58bHHyDHAC4zLvWPCYXT0re7oP3Vuw5TDhp91rZxWTA7uBIQPr7I/ X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: e133c1ee-24c7-46f4-bb99-08da240a6d91 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:23.5229 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: BLKoplbs24dZ4nW02FaX7MjLcHCz/BpyLhYF9duto/ewcIqxS6Ng2dYfOPAX+kPwUZo1dg8m9noB3cZV/uaPaQu5Fzp1/aai5MY3MjKADZc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add documentation for the Ampere(R)'s Altra(R) SMpro hwmon driver. Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen Reviewed-by: Guenter Roeck --- Changes from v3=>v8: + None Changes in v2: + Removed "virtual" sensors [Guenter] + Fixed typo "mili" to "milli", "nanoWatt" to "microWatt" [Guenter] + Reported SOC_TDP as "Socket TDP" using max attributes [Guenter] + Clarified "highest" meaning in documentation [Guenter] + Reported MEM HOT Threshold for all DIMMs as temp*_crit [Guenter] + Removed Socket TDP sensor [Quan] + Included sensor type and channel in labels [Quan] Documentation/hwmon/index.rst | 1 + Documentation/hwmon/smpro-hwmon.rst | 101 ++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+) create mode 100644 Documentation/hwmon/smpro-hwmon.rst diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 863b76289159..833dd38c93a6 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -184,6 +184,7 @@ Hardware Monitoring Kernel Drivers sis5595 sl28cpld smm665 + smpro-hwmon smsc47b397 smsc47m192 smsc47m1 diff --git a/Documentation/hwmon/smpro-hwmon.rst b/Documentation/hwmon/smpro-hwmon.rst new file mode 100644 index 000000000000..f978b1370e16 --- /dev/null +++ b/Documentation/hwmon/smpro-hwmon.rst @@ -0,0 +1,101 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R)'s Altra(R) SMpro hwmon +============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following sensor types are supported by the driver: + + * temperature + * voltage + * current + * power + +The SMpro interface provides the registers to query the various sensors and +their values which are then exported to userspace by this driver. + +Usage Notes +----------- + +SMpro hwmon driver creates at least two sysfs files for each sensor. + +* File ``_label`` reports the sensor label. +* File ``_input`` returns the sensor value. + +The sysfs files are allocated in the SMpro root fs folder. +There is one root folder for each SMpro instance. + +When the SoC is turned off, the driver will fail to read registers +and return -ENXIO. + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +============ ============= ====== =============================================== +Name Unit Perm Description +temp1_input milli Celsius RO SoC temperature +temp2_input milli Celsius RO Max temperature reported among SoC VRDs +temp2_crit milli Celsius RO SoC VRD HOT Threshold temperature +temp3_input milli Celsius RO Max temperature reported among DIMM VRDs +temp4_input milli Celsius RO Max temperature reported among Core VRDs +temp5_input milli Celsius RO Temperature of DIMM0 on CH0 +temp5_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp6_input milli Celsius RO Temperature of DIMM0 on CH1 +temp6_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp7_input milli Celsius RO Temperature of DIMM0 on CH2 +temp7_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp8_input milli Celsius RO Temperature of DIMM0 on CH3 +temp8_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp9_input milli Celsius RO Temperature of DIMM0 on CH4 +temp9_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp10_input milli Celsius RO Temperature of DIMM0 on CH5 +temp10_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp11_input milli Celsius RO Temperature of DIMM0 on CH6 +temp11_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp12_input milli Celsius RO Temperature of DIMM0 on CH7 +temp12_crit milli Celsius RO MEM HOT Threshold for all DIMMs +temp13_input milli Celsius RO Max temperature reported among RCA VRDs +in0_input milli Volts RO Core voltage +in1_input milli Volts RO SoC voltage +in2_input milli Volts RO DIMM VRD1 voltage +in3_input milli Volts RO DIMM VRD2 voltage +in4_input milli Volts RO RCA VRD voltage +cur1_input milli Amperes RO Core VRD current +cur2_input milli Amperes RO SoC VRD current +cur3_input milli Amperes RO DIMM VRD1 current +cur4_input milli Amperes RO DIMM VRD2 current +cur5_input milli Amperes RO RCA VRD current +power1_input micro Watts RO Core VRD power +power2_input micro Watts RO SoC VRD power +power3_input micro Watts RO DIMM VRD1 power +power4_input micro Watts RO DIMM VRD2 power +power5_input micro Watts RO RCA VRD power +============ ============= ====== =============================================== + +Example:: + + # cat in0_input + 830 + # cat temp1_input + 37000 + # cat curr1_input + 9000 + # cat power5_input + 19500000 From patchwork Fri Apr 22 02:46:47 2022 Content-Type: text/plain; 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Fri, 22 Apr 2022 02:47:28 +0000 From: Quan Nguyen To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" Subject: [PATCH v8 3/9] misc: smpro-errmon: Add Ampere's SMpro error monitor driver Date: Fri, 22 Apr 2022 09:46:47 +0700 Message-Id: <20220422024653.2199489-4-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: aa7d6936-29b1-4680-aae1-08da240a707e X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: T0Jh5DCmZnoygJ8Voi/77b5zTus1yYyVd1ftNc3wQrjUrr81xG8ivG5hbso3bdW+OYDeBFp77fXX+ywm3RMvxdPtYLk0CwkdS9POzPrT4vrw7zNjzgoHknhz/PCxDqLLfBAS4oAHere41SQWpeLGzEdj0bTzpL2ob78IDFffLJQe4IvkyDl8is9dYOp1M1Fh8jY6DW22E1iHR4M7cAIofMDvBwkfGuK2RGp8XfGkdLdBItpBegloQOXsXKEHq1fcRlZCavaLCPDj76bfpUNb2064Q5PFiCnpzUXTOKaeo9NTVVqSaAODOt828lkIdIqNuzae/Q0wxJLhnar32uiXs1REIeWsVX2DWmjU989fFs4GthUTwYz01n1i5rApGsF88YK1AT4AfL9vga5fC6hKWdN9sgSC9URf0jkPs2RCw82WXw1iB2kCyVBTVuD/WteeX4bQwx81/z+qQbjBu/HGaobNU3Or/Kmn9TbuocY3mW+Dza276P0Z3Nmvn8KapF/RadjLP3NtxbAGloPTeB0Vyyp1FehxVmjrwZAWikxxvo66goqPstP1fCnn9+9yU0mQpgjG8Sm6mccPZug0LJv1d/Leeyr6Hq46WnsQdrk5biuQ0b5N+aQifamidaQZ61Y3EWcwIp6ICvaPCRj0a1Jx5ba8o509fXEN3US4B+rKshcllXCnODbRBJe3/2M/ZzjZ3ug8tegWqRKXhVRiF1hT+Se0uYG+RzRWCoSey2/XiBA= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(6666004)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(30864003)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: k8PxbsUvWy7znXyLGRiHvIOWDjgcJrzqBwZTnF92CrTbttV4nAwLhzvUd1my/KNqy1huKPAYPazBN+DhelgpqWHbqVK3b22q/TE4FAEE+YTIslpj8D4m39Z5ydtH6o3vpPQducKuMJK0/xslfieX4bJ26MggqQz1qea6OXdG2ZBujAmKegQMGAxVH1p8B9lP+4N7kXD3KEDBU+mJhfz0MpINDkwyXgt6ci37IHw5t1LQRbCtlbJGNFu3LWj+V/3fRBG2UNxSyKWDJNsWFTKzaYtEsvoKtt+VYindbRKrYIvadsBUH742f0xmXUuWhz8fCGUutQu/72cvEvAXB1PV0jTcq6KgSMicY54DHmJp8uaPhb6AujV2cJDA8LCEIi0qoeZv+YFFhm3im/dibQzUMnNwdraZRFgoXuzDMZW/CgjMFjn6SRkkWfqhgyI4kEDF8OV0/FEkmjpniyYN2tQpxNNUooxoSxjeTZVU2KL/RitziS17BxFz719XEqtcJlt3sBKabg5r0uo9RZbxmoNjFHmTyekmSUlPSzoQuLZlXAo8hImVHetPAOG+3fcRrwMd8kE3V57tjo7BoXkAAtKO2ByjgmZhtCXvGTeTVt5344UlCSOSbhDBbJeAe/Jz9KxKvHLTrpnRG3L9ZjX1f/4DnujVRTD/883wTJuVjZrXnRFEvmzy0VmUS9c8UaLzNHeCrUqCwildL9vKru0llWCqYsaaxC19MwVcKGKZZiWun9evGf2uUrdkSqYHDctrYNpVp8H50gbXpCf1LBaXRSqpqUqgr5Vw1/gs6aVNqiV096MmSvpABRlOKu7vtTBNfZMDTrr6+RgCs90OUmNRV1/DpSVNVgVVzBHJRN/W0ylcpAnyxOK1JEopTQIO4Inv/nuIbCPkpFghlp1y2bbVkVMYsn6qLs6FcKRnenGmh/TWF9caO3GHbI218x3MGO77VwBzdtkFO6ojyeDzg28eCROCXgkEjnYvqFADkyz9CrvwqKUz6Ogo518bEp85SwXqoOKKuiEhGh+z+L41GAPJItKoQhEK5OdKTvCIZ5/D54v3+TIZG5U61FmyOF8AG47Sw/nW6Bgp/w4xbS4rJ18XgqCefgRTVnKGCY/Z700P76nRmMjX7n4+1YGLhQSKhmUjsNTKs/5YjRxuAD7Yzo1GfMiGPnqXyoPTjMtUi6nnQ2TleAcGF3mWcCxu1nDDDyFRag+2oirLLRjjMstUcU3gqWhKxmTYZMM00jp25sctKWOXX4XBb0uGIznO+Fr3J3LJEqOmwl6mplqfxjUIJl7cz2UM1jXHDfrVcmWNTMw65SrV+OVApb8HRfpjz2zmw1XzTAZBAabPS3x4CIORa3oJgYNsiD0zQc6hOcFvgRB4N+d882AmGYSZWubXoEih0IhXKRmjR3Tgt1KVnGFnuVtlzkq07/imdNaDe0ZTUYpmMWU5OabXDfpmJCnXHn2TI+VyyGQ2eFR0kJpl/D9PoJPY6d7MujD3Q8OWCV59kVAkwtHvRTgBiduUWhcZg5as70zJviUnkSTutDXSGGiDT5L41r+mwUcq/t8+pBY2/ze0VQXAjGNU1NmFNsKrA5OPDF1U7x/qIuui0ukf5UWPDkeXTsIHEXS0Q3ZcP2macTu+mDQetizH4SEIQMtxfQRbrvEKtbY5iNRDyMbfb9FAXa48nbv4kzW8Vgm9AsC46+WY2BZyVu6uxiFtOm9bCKBSAHWBaqd/hiuRE3QKwk6k+UHkHGmYC0BpMFYJhOhOHa1D5WbIsRFaGmTgy3OhGTbv0dAz8rh2 X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: aa7d6936-29b1-4680-aae1-08da240a707e X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:28.4624 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zc9+UT3q7k5pVE+l5dlgbQIfEAPRPlI+0dJzWVVhHAmR5HPAE/UQMkeWfXe7dYEpa/P2VHuP/7Qy9Y4VcykRRIN+Sgq5VL+FI2oX8nhE2po= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds Ampere's SMpro error monitor driver for monitoring and reporting RAS-related errors as reported by SMpro co-processor found on Ampere's Altra processor family. Signed-off-by: Quan Nguyen --- Changes in v8: + Update wording for SMPRO_ERRMON on Kconfig file [Quan] + Avoid uninitialized variable use [kernel test robot] + Switch to use sysfs_emit() [Greg] + Make sysfs to return single value [Greg] + Change errors_* sysfs to error_* [Quan] + Add overflow_[core|mem|pcie|other]_[ce|ue] sysfs to report overflow status of each type of HW errors [Quan] + Add some minor refactor [Quan] Changes in v7: + Remove regmap_acquire/release_lock(), read_i2c_block_data() [Quan] + Use regmap_noinc_read() instead of errmon_read_block() [Quan] + Validate number of errors before read [Quan] + Fix wrong return type of *_show() function [kernel test robot] + Adjust patch order to avoid dependence with smpro-mfd [Lee Jones] + Use pointer instead of stack memory [Quan] Changes in v6: + First introduced in v6 [Quan] drivers/misc/Kconfig | 12 + drivers/misc/Makefile | 1 + drivers/misc/smpro-errmon.c | 477 ++++++++++++++++++++++++++++++++++++ 3 files changed, 490 insertions(+) create mode 100644 drivers/misc/smpro-errmon.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 41d2bb0ae23a..9fbe6797c440 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -176,6 +176,18 @@ config SGI_XP this feature will allow for direct communication between SSIs based on a network adapter and DMA messaging. +config SMPRO_ERRMON + tristate "Ampere Computing SMPro error monitor driver" + depends on MFD_SMPRO || COMPILE_TEST + help + Say Y here to get support for the SMpro error monitor function + provided by Ampere Computing's Altra and Altra Max SoCs. Upon + loading, the driver creates sysfs files which can be use to gather + multiple HW error data reported via read and write system calls. + + To compile this driver as a module, say M here. The driver will be + called smpro-errmon. + config CS5535_MFGPT tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support" depends on MFD_CS5535 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 70e800e9127f..483308a6e113 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o obj-$(CONFIG_KGDB_TESTS) += kgdbts.o obj-$(CONFIG_SGI_XP) += sgi-xp/ obj-$(CONFIG_SGI_GRU) += sgi-gru/ +obj-$(CONFIG_SMPRO_ERRMON) += smpro-errmon.o obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_GEHC_ACHC) += gehc-achc.o obj-$(CONFIG_HP_ILO) += hpilo.o diff --git a/drivers/misc/smpro-errmon.c b/drivers/misc/smpro-errmon.c new file mode 100644 index 000000000000..df7d8fc4ff3f --- /dev/null +++ b/drivers/misc/smpro-errmon.c @@ -0,0 +1,477 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMpro Error Monitoring Driver + * + * Copyright (c) 2022, Ampere Computing LLC + * + */ + +#include +#include +#include +#include +#include + +/* GPI RAS Error Registers */ +#define GPI_RAS_ERR 0x7E + +/* Core and L2C Error Registers */ +#define CORE_CE_ERR_CNT 0x80 +#define CORE_CE_ERR_LEN 0x81 +#define CORE_CE_ERR_DATA 0x82 +#define CORE_UE_ERR_CNT 0x83 +#define CORE_UE_ERR_LEN 0x84 +#define CORE_UE_ERR_DATA 0x85 + +/* Memory Error Registers */ +#define MEM_CE_ERR_CNT 0x90 +#define MEM_CE_ERR_LEN 0x91 +#define MEM_CE_ERR_DATA 0x92 +#define MEM_UE_ERR_CNT 0x93 +#define MEM_UE_ERR_LEN 0x94 +#define MEM_UE_ERR_DATA 0x95 + +/* RAS Error/Warning Registers */ +#define ERR_SMPRO_TYPE 0xA0 +#define ERR_PMPRO_TYPE 0xA1 +#define ERR_SMPRO_INFO_LO 0xA2 +#define ERR_SMPRO_INFO_HI 0xA3 +#define ERR_SMPRO_DATA_LO 0xA4 +#define ERR_SMPRO_DATA_HI 0xA5 +#define WARN_SMPRO_INFO_LO 0xAA +#define WARN_SMPRO_INFO_HI 0xAB +#define ERR_PMPRO_INFO_LO 0xA6 +#define ERR_PMPRO_INFO_HI 0xA7 +#define ERR_PMPRO_DATA_LO 0xA8 +#define ERR_PMPRO_DATA_HI 0xA9 +#define WARN_PMPRO_INFO_LO 0xAC +#define WARN_PMPRO_INFO_HI 0xAD + +/* PCIE Error Registers */ +#define PCIE_CE_ERR_CNT 0xC0 +#define PCIE_CE_ERR_LEN 0xC1 +#define PCIE_CE_ERR_DATA 0xC2 +#define PCIE_UE_ERR_CNT 0xC3 +#define PCIE_UE_ERR_LEN 0xC4 +#define PCIE_UE_ERR_DATA 0xC5 + +/* Other Error Registers */ +#define OTHER_CE_ERR_CNT 0xD0 +#define OTHER_CE_ERR_LEN 0xD1 +#define OTHER_CE_ERR_DATA 0xD2 +#define OTHER_UE_ERR_CNT 0xD8 +#define OTHER_UE_ERR_LEN 0xD9 +#define OTHER_UE_ERR_DATA 0xDA + +/* Event Data Registers */ +#define VRD_WARN_FAULT_EVENT_DATA 0x78 +#define VRD_HOT_EVENT_DATA 0x79 +#define DIMM_HOT_EVENT_DATA 0x7A +#define DIMM_2X_REFRESH_EVENT_DATA 0x96 + +#define MAX_READ_BLOCK_LENGTH 48 +#define NUM_I2C_MESSAGES 2 +#define MAX_MSG_LEN 128 + +#define RAS_SMPRO_ERRS 0 +#define RAS_PMPRO_ERRS 1 + +enum RAS_48BYTES_ERR_TYPES { + CORE_CE_ERRS, + CORE_UE_ERRS, + MEM_CE_ERRS, + MEM_UE_ERRS, + PCIE_CE_ERRS, + PCIE_UE_ERRS, + OTHER_CE_ERRS, + OTHER_UE_ERRS, + NUM_48BYTES_ERR_TYPE, +}; + +struct smpro_error_hdr { + u8 err_count; /* Number of the RAS errors */ + u8 err_len; /* Number of data bytes */ + u8 err_data; /* Start of 48-byte data */ + u8 max_err_cnt; /* Max num of errors */ +}; + +/* + * Included Address of registers to get Count, Length of data and Data + * of the 48 bytes error data + */ +static struct smpro_error_hdr smpro_error_table[NUM_48BYTES_ERR_TYPE] = { + {CORE_CE_ERR_CNT, CORE_CE_ERR_LEN, CORE_CE_ERR_DATA, 32}, + {CORE_UE_ERR_CNT, CORE_UE_ERR_LEN, CORE_UE_ERR_DATA, 32}, + {MEM_CE_ERR_CNT, MEM_CE_ERR_LEN, MEM_CE_ERR_DATA, 16}, + {MEM_UE_ERR_CNT, MEM_UE_ERR_LEN, MEM_UE_ERR_DATA, 16}, + {PCIE_CE_ERR_CNT, PCIE_CE_ERR_LEN, PCIE_CE_ERR_DATA, 96}, + {PCIE_UE_ERR_CNT, PCIE_UE_ERR_LEN, PCIE_UE_ERR_DATA, 96}, + {OTHER_CE_ERR_CNT, OTHER_CE_ERR_LEN, OTHER_CE_ERR_DATA, 8}, + {OTHER_UE_ERR_CNT, OTHER_UE_ERR_LEN, OTHER_UE_ERR_DATA, 8}, +}; + +/* + * List of SCP registers which are used to get + * one type of RAS Internal errors. + */ +struct smpro_int_error_hdr { + u8 err_type; + u8 err_info_low; + u8 err_info_high; + u8 err_data_high; + u8 err_data_low; + u8 warn_info_low; + u8 warn_info_high; +}; + +static struct smpro_int_error_hdr list_smpro_int_error_hdr[2] = { + { + ERR_SMPRO_TYPE, + ERR_SMPRO_INFO_LO, ERR_SMPRO_INFO_HI, + ERR_SMPRO_DATA_LO, ERR_SMPRO_DATA_HI, + WARN_SMPRO_INFO_LO, WARN_SMPRO_INFO_HI + }, + { + ERR_PMPRO_TYPE, + ERR_PMPRO_INFO_LO, ERR_PMPRO_INFO_HI, + ERR_PMPRO_DATA_LO, ERR_PMPRO_DATA_HI, + WARN_PMPRO_INFO_LO, WARN_PMPRO_INFO_HI + }, +}; + +struct smpro_errmon { + struct regmap *regmap; +}; + +enum EVENT_TYPES { + VRD_WARN_FAULT_EVENTS, + VRD_HOT_EVENTS, + DIMM_HOT_EVENTS, + NUM_EVENTS_TYPE, +}; + +/* Included Address of event source and data registers */ +static u8 smpro_event_table[NUM_EVENTS_TYPE] = { + VRD_WARN_FAULT_EVENT_DATA, + VRD_HOT_EVENT_DATA, + DIMM_HOT_EVENT_DATA, +}; + +static ssize_t smpro_event_data_read(struct device *dev, + struct device_attribute *da, char *buf, + int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + s32 event_data; + int ret; + + ret = regmap_read(errmon->regmap, smpro_event_table[channel], &event_data); + if (ret) + goto done; + + ret = sysfs_emit(buf, "%02x%04x\n", channel, event_data); + /* Clear event after read */ + if (event_data != 0) + regmap_write(errmon->regmap, smpro_event_table[channel], event_data); +done: + return ret; +} + +static ssize_t smpro_overflow_data_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + struct smpro_error_hdr *err_info; + s32 err_count; + int ret; + + err_info = &smpro_error_table[channel]; + + ret = regmap_read(errmon->regmap, err_info->err_count, &err_count); + if (ret) + return ret; + + /* Bit 8 indicates the overflow status */ + return sysfs_emit(buf, "%d\n", (err_count & BIT(8)) ? 1 : 0); +} + +static ssize_t smpro_error_data_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + unsigned char err_data[MAX_READ_BLOCK_LENGTH]; + struct smpro_error_hdr *err_info; + s32 err_count, err_length; + int count = 0; + int ret; + + err_info = &smpro_error_table[channel]; + + ret = regmap_read(errmon->regmap, err_info->err_count, &err_count); + /* Error count is the low byte */ + err_count &= 0xff; + if (ret || !err_count || err_count > err_info->max_err_cnt) + goto done; + + ret = regmap_read(errmon->regmap, err_info->err_len, &err_length); + if (ret || err_length <= 0) + goto done; + + if (err_length > MAX_READ_BLOCK_LENGTH) + err_length = MAX_READ_BLOCK_LENGTH; + + memset(err_data, 0x00, MAX_READ_BLOCK_LENGTH); + ret = regmap_noinc_read(errmon->regmap, err_info->err_data, err_data, err_length); + if (ret < 0) + goto done; + + /* + * The output of Core/Memory/PCIe/Others UE/CE errors follows below format: + * \ + * + * Where: + * + Error Type: The hardwares cause the errors. (1 byte) + * + SubType: Sub type of error in the specified hardware error. (1 byte) + * + Instance: Combination of the socket, channel, + * slot cause the error. (2 bytes) + * + Error Status: Encode of error status. (4 bytes) + * + Error Address: The address in device causes the errors. (8 bytes) + * + Error Misc 0/1/2/3: Addition info about the errors. (8 bytes for each) + * Reference Altra SOC BMC Interface specification. + */ + count = sysfs_emit(buf, "%02x%02x%04x%08x%016llx%016llx%016llx%016llx%016llx\n", + err_data[0], err_data[1], *(u16 *)&err_data[2], + *(u32 *)&err_data[4], *(u64 *)&err_data[8], + *(u64 *)&err_data[16], *(u64 *)&err_data[24], + *(u64 *)&err_data[32], *(u64 *)&err_data[40]); + + /* go to next error */ + ret = regmap_write(errmon->regmap, err_info->err_count, 0x100); +done: + return ret ? ret : count; +} + +/* + * Output format: + * + * Where: + * + errType: SCP Error Type (3 bits) + * 1: Warning + * 2: Error + * 4: Error with data + * + image: SCP Image Code (8 bits) + * + dir: Direction (1 bit) + * 0: Enter + * 1: Exit + * + location: SCP Module Location Code (8 bits) + * + errorCode: SCP Error Code (16 bits) + * + data : Extensive data (32 bits) + * All bits are 0 when errType is warning or error. + */ +static ssize_t smpro_internal_err_read(struct device *dev, struct device_attribute *da, + char *buf, int channel) +{ + struct smpro_errmon *errmon = dev_get_drvdata(dev); + struct smpro_int_error_hdr *err_info; + unsigned int data_lo = 0, data_hi = 0; + unsigned int ret_hi, ret_lo; + unsigned int err_type; + unsigned int value; + int count = 0; + int ret; + + /* read error status */ + ret = regmap_read(errmon->regmap, GPI_RAS_ERR, &value); + if (ret) + goto done; + + if (!((channel == RAS_SMPRO_ERRS && (value & BIT(0))) || + (channel == RAS_PMPRO_ERRS && (value & BIT(1))))) + goto done; + + err_info = &list_smpro_int_error_hdr[channel]; + ret = regmap_read(errmon->regmap, err_info->err_type, &err_type); + if (ret) + goto done; + + ret = regmap_read(errmon->regmap, err_info->err_info_low, &ret_lo); + if (ret) + goto done; + + ret = regmap_read(errmon->regmap, err_info->err_info_high, &ret_hi); + if (ret) + goto done; + + if (err_type & BIT(2)) { + /* Error with data type */ + ret = regmap_read(errmon->regmap, err_info->err_data_low, &data_lo); + if (ret) + goto done; + + ret = regmap_read(errmon->regmap, err_info->err_data_high, &data_hi); + if (ret) + goto done; + + count = sysfs_emit(buf, "%01x%02x%01x%02x%04x%04x%04x\n", + 4, (ret_hi & 0xf000) >> 12, (ret_hi & 0x0800) >> 11, + ret_hi & 0xff, ret_lo, data_hi, data_lo); + /* clear the read errors */ + ret = regmap_write(errmon->regmap, err_info->err_type, BIT(2)); + + } else if (err_type & BIT(1)) { + /* Error type */ + count = sysfs_emit(buf, "%01x%02x%01x%02x%04x%04x%04x\n", + 2, (ret_hi & 0xf000) >> 12, (ret_hi & 0x0800) >> 11, + ret_hi & 0xff, ret_lo, data_hi, data_lo); + /* clear the read errors */ + ret = regmap_write(errmon->regmap, err_info->err_type, BIT(1)); + + } else if (err_type & BIT(0)) { + /* Warning type */ + count = sysfs_emit(buf, "%01x%02x%01x%02x%04x%04x%04x\n", + 1, (ret_hi & 0xf000) >> 12, (ret_hi & 0x0800) >> 11, + ret_hi & 0xff, ret_lo, data_hi, data_lo); + /* clear the read errors */ + ret = regmap_write(errmon->regmap, err_info->err_type, BIT(0)); + } +done: + return ret ? ret : count; +} + +#define ERROR_OVERFLOW_RO(_error, _index) \ + static ssize_t overflow_##_error##_show(struct device *dev, \ + struct device_attribute *da, \ + char *buf) \ + { \ + return smpro_overflow_data_read(dev, da, buf, _index); \ + } \ + static DEVICE_ATTR_RO(overflow_##_error) + +ERROR_OVERFLOW_RO(core_ce, CORE_CE_ERRS); +ERROR_OVERFLOW_RO(core_ue, CORE_UE_ERRS); +ERROR_OVERFLOW_RO(mem_ce, MEM_CE_ERRS); +ERROR_OVERFLOW_RO(mem_ue, MEM_UE_ERRS); +ERROR_OVERFLOW_RO(pcie_ce, PCIE_CE_ERRS); +ERROR_OVERFLOW_RO(pcie_ue, PCIE_UE_ERRS); +ERROR_OVERFLOW_RO(other_ce, OTHER_CE_ERRS); +ERROR_OVERFLOW_RO(other_ue, OTHER_UE_ERRS); + +#define ERROR_RO(_error, _index) \ + static ssize_t error_##_error##_show(struct device *dev, \ + struct device_attribute *da, \ + char *buf) \ + { \ + return smpro_error_data_read(dev, da, buf, _index); \ + } \ + static DEVICE_ATTR_RO(error_##_error) + +ERROR_RO(core_ce, CORE_CE_ERRS); +ERROR_RO(core_ue, CORE_UE_ERRS); +ERROR_RO(mem_ce, MEM_CE_ERRS); +ERROR_RO(mem_ue, MEM_UE_ERRS); +ERROR_RO(pcie_ce, PCIE_CE_ERRS); +ERROR_RO(pcie_ue, PCIE_UE_ERRS); +ERROR_RO(other_ce, OTHER_CE_ERRS); +ERROR_RO(other_ue, OTHER_UE_ERRS); + +static ssize_t error_smpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_err_read(dev, da, buf, RAS_SMPRO_ERRS); +} +static DEVICE_ATTR_RO(error_smpro); + +static ssize_t error_pmpro_show(struct device *dev, struct device_attribute *da, char *buf) +{ + return smpro_internal_err_read(dev, da, buf, RAS_PMPRO_ERRS); +} +static DEVICE_ATTR_RO(error_pmpro); + +#define EVENT_RO(_event, _index) \ + static ssize_t event_##_event##_show(struct device *dev, \ + struct device_attribute *da, \ + char *buf) \ + { \ + return smpro_event_data_read(dev, da, buf, _index); \ + } \ + static DEVICE_ATTR_RO(event_##_event) + +EVENT_RO(vrd_warn_fault, VRD_WARN_FAULT_EVENTS); +EVENT_RO(vrd_hot, VRD_HOT_EVENTS); +EVENT_RO(dimm_hot, DIMM_HOT_EVENTS); + +static struct attribute *smpro_errmon_attrs[] = { + &dev_attr_overflow_core_ce.attr, + &dev_attr_overflow_core_ue.attr, + &dev_attr_overflow_mem_ce.attr, + &dev_attr_overflow_mem_ue.attr, + &dev_attr_overflow_pcie_ce.attr, + &dev_attr_overflow_pcie_ue.attr, + &dev_attr_overflow_other_ce.attr, + &dev_attr_overflow_other_ue.attr, + &dev_attr_error_core_ce.attr, + &dev_attr_error_core_ue.attr, + &dev_attr_error_mem_ce.attr, + &dev_attr_error_mem_ue.attr, + &dev_attr_error_pcie_ce.attr, + &dev_attr_error_pcie_ue.attr, + &dev_attr_error_other_ce.attr, + &dev_attr_error_other_ue.attr, + &dev_attr_error_smpro.attr, + &dev_attr_error_pmpro.attr, + &dev_attr_event_vrd_warn_fault.attr, + &dev_attr_event_vrd_hot.attr, + &dev_attr_event_dimm_hot.attr, + NULL +}; + +static const struct attribute_group smpro_errmon_attr_group = { + .attrs = smpro_errmon_attrs +}; + +static int smpro_errmon_probe(struct platform_device *pdev) +{ + struct smpro_errmon *errmon; + int ret; + + errmon = devm_kzalloc(&pdev->dev, sizeof(struct smpro_errmon), GFP_KERNEL); + if (!errmon) + return -ENOMEM; + + platform_set_drvdata(pdev, errmon); + + errmon->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!errmon->regmap) + return -ENODEV; + + ret = sysfs_create_group(&pdev->dev.kobj, &smpro_errmon_attr_group); + if (ret) + dev_err(&pdev->dev, "SMPro errmon sysfs registration failed\n"); + + return 0; +} + +static int smpro_errmon_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &smpro_errmon_attr_group); + pr_info("SMPro errmon sysfs entries removed"); + + return 0; +} + +static struct platform_driver smpro_errmon_driver = { + .probe = smpro_errmon_probe, + .remove = smpro_errmon_remove, + .driver = { + .name = "smpro-errmon", + }, +}; + +module_platform_driver(smpro_errmon_driver); + +MODULE_AUTHOR("Tung Nguyen "); +MODULE_AUTHOR("Thinh Pham "); +MODULE_AUTHOR("Hoang Nguyen "); +MODULE_AUTHOR("Thu Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMpro driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Apr 22 02:46:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12822693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15BC6C433F5 for ; Fri, 22 Apr 2022 02:47:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245213AbiDVCum (ORCPT ); Thu, 21 Apr 2022 22:50:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443537AbiDVCu1 (ORCPT ); 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Nguyen" Subject: [PATCH v8 4/9] docs: misc-devices: (smpro-errmon) Add documentation Date: Fri, 22 Apr 2022 09:46:48 +0700 Message-Id: <20220422024653.2199489-5-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5124b977-683a-474b-f847-08da240a736d X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 16l6eNZgJmLhMvv4H8KOvXBlv7W0oF/CFAQ/VfeLfMfRmZLyIhJn0+EGsAnnsx8k2cv9B1X1kuc9ENccIuY/tqOk0X7n7xwGZC0yr/HLuUN7y2fDTSuzFyR7Z9y6LR132lw4NMY8+Xv52HRrdFJqG0QFxnK9KkB5kT25DxJ259A1DhZjNW23JlEoxVnvibZq9D5+E3wHtoAAu99SDk98Pv9Z1UzxOr8Q6sLYUPnpVv2dQ4PxJtamG43ZTx8NlgILwsh+dNwgIiflQ9+oB4UnRNbwDl2nAW5kmlW1tTABbaZDbyAfeZ8OdPyTOnzMI+VZz+k9NfszJWOxsvUFs38zQfytE/Po2Ngk+4R0FnOyi5DVtsvTYxJtP+/MhTr2ycyjGHYgah5uRgzVlUk5wyEfSd5qea17FjE2GuNgg/1No1kdWzJkKR4sDSq6QNHLVCZD7Cz2otMQ5BNlgu88n2qGgjxbOTUg9WbbemyDDGj24woDCHb2MRQdERZ4Lit4meWMGwGyqGlxd7hiF6P+/VZZw+TmZq49yx3CMLrRqyW5QN8OOZaYw9hO86gyLyeuOwuMQEbOHoD0WSGRLo81K/ASIdn7fio+GdZSyRo0ct5yQ7mTrHODDSKPz+wf6oxO61XCxt+ibj5Ks5pKCXVSOFTozEAzKWnx3rnmo8wZuWLypCpOmTxuibv7TAg54SN4svvQRjsC1lDCCugy0/hOBOfIwCQ6/yer2/gqwz5JGArSROw= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(6666004)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2PAqQrq1Kiidba+jibCNgXKHBXvsC7ru/V7Ao77vsjD9lWmOjTYoZyWM0fwyELLexJtXdE7SCy/WzRrxK3i5RBvyISYU491pf2bZ1T77quMR7Vj9RNOHz2mSp6EENPuDDqOv3SYJ4P+lhA+ejUGyVtQpABIXM5OTNyWdY2fRMj18Lh2FoQyHDjoUmMHDX7+O/cliv9uUWaMxHi8hyc9G7uQI1ZGbSjO0owus+K+B6jrJ/o6PU2eCYIATJs4F0FFTL4iCV7yQjxt2KAE1Ovv9BiGG64aHe81OEytemPBzRGz4IMdnfxobE9EwKKRCC7mDcnKZ5Jkz4lmy4wxu9j16WANA+HQmON1uC8C2/CMPBJikfB9J8Q8SGL7XEjG6tr3ojhz2aYaja3Vty5AhWc34Y37j1nBjdYulRgY37uViZ5zd8V8FAbpHtol6+JoDHBgLpnCSHzCgZNYqkseP+VfFMqhNNVNG/UL0W7AIskoyuxbZhe5rM0vWnVXdeB5nURvaRaveJbPsbDwW+2uLwjKBhhkfZHWL4tXQiSJDlfNmi38ndzWbN4hVYpHl13Ek1MRkIwQLGOP8Ucc6LZB6pn4Bcs2FduLwMTLbCIaM3Nf4y0xj0vHnApHdSY4aqOUcRbhtcOIVVTxL4onvAMXMoWHm8c65OR8caGfw29EnxCylhPZJNnn9MZQx2WXxt7LDo3U2lKtsHCaddL9uGoyPDWPdAV/9z9pKG6y8AG0BB2gmYMPrvZLdfFA48980fvjaGc29q3Y9lsVHCA+vc55go17fljT0bQin4VXrNHa62MtNQdAp7Ope0s5KGsWykFro+kq8ZoZxI/iZIuVCDkJN5S+uThVKi+RC3rY+7bM0Layn1bEQ8Uju7gC+PMn73CnGuXCCFj4RzAlxMU+Flg5f5Bbj9NafpmNvIy5t4Mp4iYpdmbYu+LKj5obBKDWRes/eh3lCtLrxXIAcdGnUtcXsrKmb5zWKX48bhXc4sYaMzqLzpYznTDMvX2WrxCOpuEB5/0spHXtw0rYVbu65+G3H1bYS5cjOK1AG/122Sctv6O9bkUvBcrq8PtwBXy76orCgoHW8yAU4YD5GeZrEDswO6osLjAXLBptxv1wEdBa0r1bSK0TZrgii6z+jzq9ynT8iwZXijNhqylaUAO7Okfy5feX9h/Tb6U4ISchVFjyyKmGPKN+rIhUKRY6HFtZK6Ivo+Q6JOXiH9WEwvn8VtpmDWBRUV5TGnGpGK/psrprjA80WipYV71TOUHAsgJd/91eHgPkIrAUZSKJIdzCY87ju8uTpN6jKwygxqMEd/5ABi2ayXU5r5H5fVIhcooHNyeUvHXildkggndJ97+OontlSQBhjp961gZHVQwritkpHcEphmxJe0eRoDQ37mpGVpDcBFL7VGiuVR8PTM1tn+bswvuT6b5QrwMQcbVBnV/2vrhvVsNBQjQRGyOfwNQ8VCcqrEo9K/FIpdr7cYeSpRoROZRDqDEMRJjxjOkQkTFrZsnBilnIFC5rm3cguFyvphBBfil9fO6C7xGm8Ai/xwbQcydzi/T/FLgnjYgyls0Sh74D6YSjacFeWJgYtBlaF/Cyo57m2p+FzdmF7ydzTYPfBbUjFKsMrhLpkR3+q3nuGfkkEHA1rSZcll4B41Q1OIh76yn3QjJYTOt3vYIGg54LvoBW8bP4Fxie1ayUX0BkMyDktrviXF5tAYYi8eU9cKvi9N9yXJ3vvdzvgub8qBkxj9jmJesBgKoG1KCRu1adE95qMdBPtNOL67eZ9wAqhrGOaefMa X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5124b977-683a-474b-f847-08da240a736d X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:33.4018 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: OVwBB5bK4Fl4LmJaKO9slCc1awabSjBla0+d58ZXhbxBOdRuFn8Pwu+V9ICvMImxJ0MowK2KWCfcS2JpKlbykexhOLO0um7yjnclTxfir+Y= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds documentation for Ampere(R)'s Altra(R) SMpro errmon driver. Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen Signed-off-by: Bagas Sanjaya --- Changes in v8: + Update to reflect single value per sysfs [Quan] Changes in v7: + None Changes in v6: + First introduced in v6 [Quan] Documentation/misc-devices/index.rst | 1 + Documentation/misc-devices/smpro-errmon.rst | 198 ++++++++++++++++++++ 2 files changed, 199 insertions(+) create mode 100644 Documentation/misc-devices/smpro-errmon.rst diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 30ac58f81901..7a6a6263cbab 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -26,6 +26,7 @@ fit into other categories. lis3lv02d max6875 pci-endpoint-test + smpro-errmon spear-pcie-gadget uacce xilinx_sdfec diff --git a/Documentation/misc-devices/smpro-errmon.rst b/Documentation/misc-devices/smpro-errmon.rst new file mode 100644 index 000000000000..53599904da70 --- /dev/null +++ b/Documentation/misc-devices/smpro-errmon.rst @@ -0,0 +1,198 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R)'s Altra(R) SMpro errmon +=============================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Preference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- + +This driver supports hardware monitoring for Ampere(R) Altra(R) SoC's based on the +SMpro co-processor (SMpro). +The following SoC alert/event types are supported by the errmon driver: + +* Core CE/UE errors +* Memory CE/UE errors +* PCIe CE/UE errors +* Other CE/UE errors +* Internal SMpro/PMpro errors +* VRD hot +* VRD warn/fault +* DIMM Hot + +The SMpro interface provides the registers to query the status of the SoC alerts/events +and their data and export to userspace by this driver. + +Usage Notes +----------- + +SMpro errmon driver creates the sysfs files for each host alert/event type. +Example: ``error_core_ce`` to get Core CE error type. + +To get a host alert/event type, the user will read the corresponding sysfs file. + +* If the alert/event is absented, the sysfs file returns empty. +* If the alerts/events are presented, one each read to the sysfs, the oldest alert/event will be reported until all the errors are read out.. + +The format of the error lines is defended on the alert/event type. + +1) Type 1 for Core/Memory/PCIe/Other CE/UE alert types:: + + + + Where: + * Error Type: The hardwares cause the errors in format of two hex characters. + * SubType: Sub type of error in the specified hardware error in format of two hex characters. + * Instance: Combination of the socket, channel, slot cause the error in format of four hex characters. + * Error Status: Encode of error status in format of eight hex characters. + * Error Address: The address in device causes the errors in format of sixteen hex characters. + * Error Misc 0/1/2/3: Addition info about the errors. Each field is in format of sixteen hex characters. + + Example: + # cat error_other_ce + 0a020000000030e400000000000000800000020000000000000000000000000000000000000000000000000000000000 + + The size of the alert buffer for this error type is 8 alerts. + When the buffer is overflowed, the read to overflow_other_ce will return 1, otherwise it returns 0. + + Example: + # cat overflow_other_ce + 1 + +Below table defines the value of Error types, Sub Types, Sub component and instance: + + ============ ========== ========= =============== ================ + Error Group Error Type Sub type Sub component Instance + CPM 0 0 Snoop-Logic CPM # + CPM 0 2 Armv8 Core 1 CPM # + MCU 1 1 ERR1 MCU # | SLOT << 11 + MCU 1 2 ERR2 MCU # | SLOT << 11 + MCU 1 3 ERR3 MCU # + MCU 1 4 ERR4 MCU # + MCU 1 5 ERR5 MCU # + MCU 1 6 ERR6 MCU # + MCU 1 7 Link Error MCU # + Mesh 2 0 Cross Point X | (Y << 5) | NS <<11 + Mesh 2 1 Home Node(IO) X | (Y << 5) | NS <<11 + Mesh 2 2 Home Node(Mem) X | (Y << 5) | NS <<11 | device<<12 + Mesh 2 4 CCIX Node X | (Y << 5) | NS <<11 + 2P Link 3 0 N/A Altra 2P Link # + GIC 5 0 ERR0 0 + GIC 5 1 ERR1 0 + GIC 5 2 ERR2 0 + GIC 5 3 ERR3 0 + GIC 5 4 ERR4 0 + GIC 5 5 ERR5 0 + GIC 5 6 ERR6 0 + GIC 5 7 ERR7 0 + GIC 5 8 ERR8 0 + GIC 5 9 ERR9 0 + GIC 5 10 ERR10 0 + GIC 5 11 ERR11 0 + GIC 5 12 ERR12 0 + GIC 5 13-21 ERR13 RC# + 1 + SMMU 6 TCU 100 RC # + SMMU 6 TBU0 0 RC # + SMMU 6 TBU1 1 RC # + SMMU 6 TBU2 2 RC # + SMMU 6 TBU3 3 RC # + SMMU 6 TBU4 4 RC # + SMMU 6 TBU5 5 RC # + SMMU 6 TBU6 6 RC # + SMMU 6 TBU7 7 RC # + SMMU 6 TBU8 8 RC # + SMMU 6 TBU9 9 RC # + PCIe AER 7 Root 0 RC # + PCIe AER 7 Device 1 RC # + PCIe RC 8 RCA HB 0 RC # + PCIe RC 8 RCB HB 1 RC # + PCIe RC 8 RASDP 8 RC # + OCM 9 ERR0 0 0 + OCM 9 ERR1 1 0 + OCM 9 ERR2 2 0 + SMpro 10 ERR0 0 0 + SMpro 10 ERR1 1 0 + SMpro 10 MPA_ERR 2 0 + PMpro 11 ERR0 0 0 + PMpro 11 ERR1 1 0 + PMpro 11 MPA_ERR 2 0 + ============= ========== ========= =============== ================ + + +2) Type 2 for the Internal SMpro/PMpro alert types:: + + + + Where: + * Error Type: SMpro/PMpro Error types in format of two hex characters. + + 1: Warning + + 2: Error + + 4: Error with data + * Error SubType: SMpro/PMpro Image Code in format of two hex characters. + * Direction: Direction in format of two hex characters. + + 0: Enter + + 1: Exit + * Error Location: SMpro/PMpro Module Location code in format of two hex characters. + * Error Code: SMpro/PMpro Error code in format of four hex characters. + * Error Data: Extensive datae in format of eight hex characters. + All bits are 0 when Error Type is warning or error. + + Example: + # cat errors_smpro + 01040108003500000000 + +3) Type 3 for the VRD hot, VRD /warn/fault, DIMM Hot event:: + + + + Where: + * Event channel: + 00: VRD Warning Fault + 01: VRD Hot + 02: DIMM hot + * Event Data: Extensive data if have in format of four hex characters. + + Example: + #cat event_vrd_hot + 010000 + +Sysfs entries +------------- + +The following sysfs files are supported: + +* Ampere(R) Altra(R): + +Alert Types: + + ================= =============== =========================================================== ======= + Alert Type Sysfs name Description Format + Core CE Errors errors_core_ce Triggered by CPU when Core has an CE error 1 + Core UE Errors errors_core_ue Triggered by CPU when Core has an UE error 1 + Memory CE Errors errors_mem_ce Triggered by CPU when Memory has an CE error 1 + Memory UE Errors errors_mem_ue Triggered by CPU when Memory has an UE error 1 + PCIe CE Errors errors_pcie_ce Triggered by CPU when any PCIe controller has any CE error 1 + PCIe UE Errors errors_pcie_ue Triggered by CPU when any PCIe controller has any UE error 1 + Other CE Errors errors_other_ce Triggered by CPU when any Others CE error 1 + Other UE Errors errors_other_ue Triggered by CPU when any Others UE error 1 + SMpro Errors errors_smpro Triggered by CPU when system have SMpro error 2 + PMpro Errors errors_pmpro Triggered by CPU when system have PMpro error 2 + ================= =============== =========================================================== ======= + +Event Type: + + ============================ ========================== =========== ======================== + Event Type Sysfs name Event Type Sub Type + VRD HOT event_vrd_hot 0 0: SoC, 1: Core, 2: DIMM + VR Warn/Fault event_vrd_warn_fault 1 0: SoC, 1: Core, 2: DIMM + DIMM Hot event_dimm_hot 2 NA (Default 0) + ============================ ========================== =========== ======================== From patchwork Fri Apr 22 02:46:49 2022 Content-Type: text/plain; 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Fri, 22 Apr 2022 02:47:38 +0000 From: Quan Nguyen To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" Subject: [PATCH v8 5/9] misc: smpro-misc: Add Ampere's Altra SMpro misc driver Date: Fri, 22 Apr 2022 09:46:49 +0700 Message-Id: <20220422024653.2199489-6-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 21e7844d-07d0-4634-ba23-08da240a765f X-MS-TrafficTypeDiagnostic: PH0PR01MB6293:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 92i4RmQI5eVycWNYUujN4ep+ONtkkAvqwxv42R5e8QNX7sSgfDwOB+XFxPFebN6Qw/PoRx/Mzy1Xs7o7IxYGghvKZ330bvXotNoUTFYzielYhDcJlNRqMG1DgZZXFIWSUuxHzpkYzEbz1D3XTaP5eoRAR/Cfjo7HmQMZk6t2nkf5tlthLTZE8qX0rcWuR5u+70/EK6iIqX3If1t+P233A2CF+RpsQGHf8yLsM0knUP9A45PL51ZR6HSuoqJnhnfDEfbRQgEXbqIqhzWgQU6oJeI5BYR9fJUNxk5ljk0wP2xTkaSRHynh1lSkKvzh6v7oqdM7O8RFrpjsX2rmdnYcYhU7yOqCuhY9VmHnp8trTbUO1vB2qs7lvJ4qlpV3SGnW43HV5e+2kCNNKtdeKAJ5EqhvlGdHqtdL0O8RxrpiLFn2TYTu8cdDYcdwpRHQqju9+2z/Mi/lAPKoC4G+xbr7hu9e+PG7Y0eWVtX1UmBgPsc9rj3QP1e/vd0duA1QX7iof6xErN3Hx6KmaniepupD5o+fg2gO62pgBlNQKxVhBISkQyjWTFZXTA6iREPKMf/VvKCNR+TU98Qqx+A4fWa8Sp1T5z36BTUzVsnnm1kqWHd6HdFwa4+3M3Ki1Y0zaP+/s/7wTcJt5HKzwZWWGwvZ1++cx/gcgPQhBWAhXwDzuLxYk9P5qjA/7TogWWfz4sZMppeM2nMXzWSJJwZVVasDa04w9ZktozgX+vwtgllm+i4= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(186003)(66476007)(66556008)(7416002)(66946007)(2616005)(1076003)(107886003)(6512007)(26005)(8676002)(83380400001)(52116002)(6506007)(38350700002)(4326008)(921005)(54906003)(110136005)(38100700002)(86362001)(2906002)(6666004)(8936002)(316002)(5660300002)(508600001)(6486002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nEynoEkmneOzZ30wjLrKh6eMmd4hXoVYWcWiA32zKqyfWgevVqwvXgxVkINDxUGVRMQJorRsuOn7zW+SK14PcuXCldysrAhfyrbH+WN83rwXSTBAM3MWZb9eQv8aTHqIRs3Sz9UZiZFRtxo2eHANDgYoUBbXvazFnTj4f/EYSntJfMaeYL+TtbTUJfRxRoxuqyE+SKGNsHKNKDjM6VdQblcsYjJK/a8+jnc/sbRCjN8JVBLepTLFsJLcsuodZQaOmR0g7tckKo+JfNCa1V5UPL6jQmqkEFcLGIg5PjePcxLx8Inh21Vy66xo2eoCCELXuL1cDxovOEltnytYg4pHnEFAiQ2hg8exYVVZ/ZGgpykC9s0yFLaz2KUYVLVqzQwG/7h5SMWdBilAJOK1AqGz2NAEeacubt5GjNh9W0GhotyqRYu8mll9d7MvvR28HiGar+yHuZ2gvyBQxAkXm8QTtalcsrxhZ5aGtbhphC9QT6rAHdstyjlUe7vmw2V8LW1kD9TBK3wZTmHw0j9LrQ+BuBxmYp2dbKQPbujHICoqDeXHuNNHTQBA9LWWvhn0L0IhVSbT/9k5oNEn9vhmwfIE2r0M/Rl+/qiAFzV/FpedWdrFvLNC2fqyPxcEbAd48sSpdjf265mj5rDZ4CGSVsDhvHTXYlGOqPVgHvb8BFX9nBQgawsyAcqeqTOa7CtRdKwEm6oBaFy87zrt/z6vA5mwrMzFryeb9ClVPj8F9xBhsFGWOF4Idl3rfrmAFhzhQBlptlzbF8eM8F+OxHuZL362rQbxKRg1Z/DHMC0QCKC6vrmncCoRddkihwHg80aldgVzxhEtw6qjVzYeOkBL6HRxDiHfNI2FNV9gXOi6WtaroMS0Pp0a5sqVlQhFkYAuza9ZlnSK11g8yKPSLZIbWrNTX1iv63YmruQl+vc6N9anK6PH62NVvHYuyfTMn7/ZW51Vbr1wJz+8Gw5Q9WybdGtuzbcl2jIb28XbxgultberY2lLJPudlVv+ivR6tgjQRCG/EUKKsN0tlAe5S2iXKlaYFpvHD2b3vqCxKFtg7sSButOK/XjBtehRnhwHZTgy6jpzIdBURZ1/+y535hL820GtWgI8sPjK2ka9MVQG0MG9N7HdtCIC+PtcfaA69iz+CCcCHIw0c7znmtzLZGmXaEApLucB8TxxErFMrd6N2BaWXTR9Io9atfht6z0RpT9Mm2SGhhcqaT08v2uiu5vvfaCUFTwqo7iff0MZy6X62mVnIVTByL1rZyMazr5ipHZL1wxOoY2hdoQJCHYGe3Uymuvils86vVTpAyq6wGPOvbyM7/GUg2W5Q91w4x6N6jcq30PeI0MomDhtXLbDm3Ym1O/JxqsmAAMao3DY9dGH3Lz9wa1DEHuaFKsaregGSPoi0Xkwes+yHZ26GuLxAe+iqeU5wpXIaLAntscybUdZeiIuSTCOU+0om4lej99kc+tL9mGSvoaJMwuaFILeIo/c4dMnXeTLGyGkho9FJC+xGc0xVIXF2ldLSTtsTx5PCebbojiMf2uSHpKokXlaYT9nZZ1WtbEOU1MgevSKZWPeIZZm1hF3j38a+JLCb/EDOWLGnJUJn5r4MkUCp15pLCTsPjlymQ3TFbPm2aqnb85pEmHgsIKYW1592IYO/vh5zvKOayBs8qflWTpFfVT+VfSYQ+scXJBP3dPkVxqE1UsJsgmnNHM1N2hO5Pug558H0RsQM3guPo4GjQ1k1RBtTxIwlC7AfBpoEXZ5n5IQrJrd5F8Ne4pTxEdChaHK4kdyCkZdD0TO X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 21e7844d-07d0-4634-ba23-08da240a765f X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:38.3416 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: nykhc5I5j/Juy8AeQRrFiXmc1Aicm8/+OeTBiYvTC5ccOem19Nx38TBy62k7JytSqosA+DJGpsq9CwhCubZ+4KDU/+fPFKcTgqmxwRhOnT4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR01MB6293 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org This commit adds driver support for accessing various information reported by Ampere's SMpro co-processor such as Boot Progress and other miscellaneous data. Signed-off-by: Quan Nguyen --- Changes in v8: + Update wording for SMPRO_MISC in Kconfig file [Quan] + Switch to use sysfs_emit() [Quan] Changes in v7: + Fix wrong return type of *_show/store() functions [kernel robot test] + Adjust patch order to remove dependence with smpro-mfd [Lee Jones] Changes in v6: + First introduced in v6 [Quan] drivers/misc/Kconfig | 10 +++ drivers/misc/Makefile | 1 + drivers/misc/smpro-misc.c | 161 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 172 insertions(+) create mode 100644 drivers/misc/smpro-misc.c diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 9fbe6797c440..368fbe73853e 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -188,6 +188,16 @@ config SMPRO_ERRMON To compile this driver as a module, say M here. The driver will be called smpro-errmon. +config SMPRO_MISC + tristate "Ampere Computing SMPro miscellaneous driver" + depends on MFD_SMPRO || COMPILE_TEST + help + Say Y here to get support for the SMpro error miscellalenous function + provided by Ampere Computing's Altra and Altra Max SoCs. + + To compile this driver as a module, say M here. The driver will be + called smpro-misc. + config CS5535_MFGPT tristate "CS5535/CS5536 Geode Multi-Function General Purpose Timer (MFGPT) support" depends on MFD_CS5535 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 483308a6e113..e61e462924d0 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_KGDB_TESTS) += kgdbts.o obj-$(CONFIG_SGI_XP) += sgi-xp/ obj-$(CONFIG_SGI_GRU) += sgi-gru/ obj-$(CONFIG_SMPRO_ERRMON) += smpro-errmon.o +obj-$(CONFIG_SMPRO_MISC) += smpro-misc.o obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o obj-$(CONFIG_GEHC_ACHC) += gehc-achc.o obj-$(CONFIG_HP_ILO) += hpilo.o diff --git a/drivers/misc/smpro-misc.c b/drivers/misc/smpro-misc.c new file mode 100644 index 000000000000..4b98098ace8f --- /dev/null +++ b/drivers/misc/smpro-misc.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Ampere Computing SoC's SMpro Misc Driver + * + * Copyright (c) 2022, Ampere Computing LLC + */ +#include +#include +#include +#include + +/* Boot Stage/Progress Registers */ +#define BOOTSTAGE_SELECT 0xB0 +#define BOOTSTAGE_STATUS_LO 0xB1 +#define BOOTSTAGE_CUR_STAGE 0xB2 +#define BOOTSTAGE_STATUS_HI 0xB3 + +/* SOC State Registers */ +#define SOC_POWER_LIMIT 0xE5 + +struct smpro_misc { + struct regmap *regmap; +}; + +static ssize_t boot_progress_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + u32 boot_progress; + u8 current_stage; + u8 boot_status; + u8 boot_stage; + u32 select; + u32 reg_lo; + u32 reg; + int ret; + + /* Read current boot stage */ + ret = regmap_read(misc->regmap, BOOTSTAGE_CUR_STAGE, ®); + if (ret) + return ret; + + current_stage = reg & 0xff; + + /* Read the boot progress */ + ret = regmap_read(misc->regmap, BOOTSTAGE_SELECT, &select); + if (ret) + return ret; + + boot_stage = (select >> 8) & 0xff; + boot_status = select & 0xff; + + if (boot_stage > current_stage) + return -EINVAL; + + ret = regmap_read(misc->regmap, BOOTSTAGE_STATUS_LO, ®_lo); + if (!ret) + ret = regmap_read(misc->regmap, BOOTSTAGE_STATUS_HI, ®); + if (ret) + return ret; + + boot_progress = swab16(reg) << 16 | swab16(reg_lo); + + /* Tell firmware to provide next boot stage next time */ + if (boot_stage < current_stage) { + ret = regmap_write(misc->regmap, BOOTSTAGE_SELECT, ((select & 0xff00) | 0x1)); + if (ret) + return ret; + } + + return sysfs_emit(buf, "%02x%02x%08x\n", boot_stage, boot_status, boot_progress); +} + +static DEVICE_ATTR_RO(boot_progress); + +static ssize_t soc_power_limit_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + unsigned int value; + int ret; + + ret = regmap_read(misc->regmap, SOC_POWER_LIMIT, &value); + if (ret) + return ret; + + return sysfs_emit(buf, "%d\n", value); +} + +static ssize_t soc_power_limit_store(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct smpro_misc *misc = dev_get_drvdata(dev); + unsigned long val; + s32 ret; + + ret = kstrtoul(buf, 0, &val); + if (ret) + return ret; + + ret = regmap_write(misc->regmap, SOC_POWER_LIMIT, (unsigned int)val); + if (ret) + return -EPROTO; + + return count; +} + +static DEVICE_ATTR_RW(soc_power_limit); + +static struct attribute *smpro_misc_attrs[] = { + &dev_attr_boot_progress.attr, + &dev_attr_soc_power_limit.attr, + NULL +}; + +static const struct attribute_group smpro_misc_attr_group = { + .attrs = smpro_misc_attrs +}; + +static int smpro_misc_probe(struct platform_device *pdev) +{ + struct smpro_misc *misc; + int ret; + + misc = devm_kzalloc(&pdev->dev, sizeof(struct smpro_misc), GFP_KERNEL); + if (!misc) + return -ENOMEM; + + platform_set_drvdata(pdev, misc); + + misc->regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!misc->regmap) + return -ENODEV; + + ret = sysfs_create_group(&pdev->dev.kobj, &smpro_misc_attr_group); + if (ret) + dev_err(&pdev->dev, "SMPro misc sysfs registration failed\n"); + + return 0; +} + +static int smpro_misc_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &smpro_misc_attr_group); + pr_info("SMPro misc sysfs entries removed"); + + return 0; +} + +static struct platform_driver smpro_misc_driver = { + .probe = smpro_misc_probe, + .remove = smpro_misc_remove, + .driver = { + .name = "smpro-misc", + }, +}; + +module_platform_driver(smpro_misc_driver); + +MODULE_AUTHOR("Tung Nguyen "); +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("Ampere Altra SMpro Misc driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Apr 22 02:46:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12822696 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85907C433FE for ; Fri, 22 Apr 2022 02:47:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443568AbiDVCup (ORCPT ); Thu, 21 Apr 2022 22:50:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443552AbiDVCul (ORCPT ); Thu, 21 Apr 2022 22:50:41 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2101.outbound.protection.outlook.com [40.107.236.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2AF6D4CD64; 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Fri, 22 Apr 2022 02:47:43 +0000 From: Quan Nguyen To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" Subject: [PATCH v8 6/9] docs: misc-devices: (smpro-misc) Add documentation Date: Fri, 22 Apr 2022 09:46:50 +0700 Message-Id: <20220422024653.2199489-7-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1f7d60c1-e2d9-4c13-1fcf-08da240a7952 X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Wh53JkTzVj5mHo8D71GHLARgrA8bG9jmsucyLP1Qv4f4xG1vsxPncEy6qNlv570stZQ+rNA8OeHVddvjHwY1FEku22SIzxiXIGl696o+Sny0ZU/bqRf4ua6/6T9PilXwsEAvCa0iEDUb7gYnqjGXFJWoycxXjePYVhXIJ6tF1buPLU1JH460CFUy5JUz0sYhmDGgBpxuyg/ZqjTmd98Q5f9xkNK68Z2NM4ti00b5mM7La7HKReJ9dqRDeqhKhUSwhhkW5U/xFIzTedUJqsGVv9Z3Klgsr8XP7ZlNIvrrPTs6wF7bmY7um3MFigv7Sb7yLG9jgD8JlcSoswkLAf4NeiEKBeWb3SuATR1+184FUISVkTT8DYX5OF89k/v5Alqd/wkjEcfCAaOu2JfxfjHnSSu8Qc9OubfQfwapV+1tzEnc2MdwfULFF1ySYbaOgKk/wdy/1rHSeCoKfkVVsJ7WXKLG9xbbA3ixmDB/U7mhb3mV9ro7k9szNZzfrqs0WIsLQJeKKm0SjQZsZRUdyn4vKAYc+jAdO21U8lIWCskggcvUkhLt4wUc0UIAoC7k7L0JKq8akb6sLbZqkGZ4ePdwXHEgwGnOu8EJ8001rZNNDM50YJGruYhonSEwjvd8pj7xkseckQDTBJTv+5AALvlpqRHZ+gBLTqDP3jg/49jtIsX0RDuz8OVRYN5FAg+yeQQjzo96vXAAYa5l30FwoNBVdw4pV4bJdcvt5WZAetVQVkU= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(6666004)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: n+R54wh9khlwXMTGjv+x/bGXFZ9/DVEPGB8vq6nBxoEFcTTonkOYp1CDP8SEV17ulD9gpEAP2iY5FM7zOl/2CWHsyh+TvUYn3kXKG3LT5sJxc7x8vyscjAw5avVUIumiF1rbfl2v4YFmGeXSKk5KljWJK8HHA6zjZBTOGUt5KQXhH7LGH8HCFSJiRVempGfexmpWPrZhHGYuCoKo9QbqoBgMAkr2pUAdNlkj8WymGzgoETqsa5P2/9TUCGRiPWDqmyFitUObwq5iKTggMMWfut26w61e9+IDl7JwynK5d/eUo2uEanvz84iO/BzkAz5iUp01lMfx/sFkDDLx73e4XKc/kUuOJXGeMUsFSD7EyMmlOjtsp+gUz13L31vNO1nxq8r34uwGjYSTtMFWdLBtX7evqCPxhmF8cv4yaHfV45aDDcJVjcnz1PdxKI6Ve9Y2McYKbThfWnTyPxjobRV+tI9KaYmUfmCs1fUPuisURU60/L5yvzKZAaDZDfbLmuYvGaOWenfPLPim2oVAOLUpzCAlyEbreEaaygeOaDJpZl9gwUdRbj30egxPLlAWfvZlZNNdyefK/AFC5vOa8WMN2IgCHKI+Lwa7iMoqtRzxoCb6FKr3cJJ+qEsSUI/ibDYmx3CsXq//iMuXXYogU5PTKr3Jwl4ZHfRgjPjYp6pH3rFqK9GNvMpYHLUp9USqK+P/VtLbFmKCwExSmkYgT/sr5Ky5CkIaQfR6wxv5/z27EtujgD2OHSlADMmKldgXVWT9SpcCns6LTKyjZo63rTjJuEdF55emey/QHuVOtePfD7xIw1qC2Urmqh46UWfvoG897NqaNGKh4mbU6iZckYRpjgJdXT3M9LL78HF2k+UeWRRJr0ASnx3KPJg19aIEcKGeoHrVu0KvOCzC4ngsNnZgqsyOTRJjZnTTUYHLc15usRkUJmEon4vdoCvU3AnNvghx5r3ThvMRXAEFDZ9PLQ9dwA1GwweCFaVGffTGKVLRLVF3FWgYHGAegMmYo4W/2WmKWYOyz7N7XlrUrM4uo+e/t1C2vzocfBwX4pIRFdSx2MrtvsPH4zOjtj+MFBI5hLQx7TR0OiHqt7fcYwh/6LUuwV7rwl9qdVwUpzB71z4GejREFEvcdfDcIh13BrCCDRFH1VNWHdzbqVnxgHpynq4Feg3P2BQLVSmBxd+dq7/XpL0OPzIRrn2uXuJSglDJ7nNCtbzodSW8SEdTE/kPJMwv48oGHIKwEo7AmSbpkVnNbhorYk3jYVCn04Pga0JsJY2J3fJP6vg5ryb/tx7JgxK2TcF/vf+9XiqXZRMic5ZoNg5Y9pYkQNyiPj7JlqewX4eXKLMvKuNAJdHljs8F5f3lCXyxHcCirw5bsCHM+D0xlbwH30jrBXSzCby24iFhqV/iyzPy3zC2NbdyuG0CyPlr7qDeNKZO8LW7yeLCG+eBVYARwzhKppn75u1e4/jdlYCLf8nhx9hT+iZ8NCE4qtbK50PvlplWP7l8VvMiBQH2jdgS59Glb12oA1WxlWvuo9FA8XP9q5aPbb0x5WOkF7SKtgxcP63PWF824DDc+bqlBleaUgxEBo5y3exxRPtJKL4jgWAyOS8hXFb6qA6MDoaKKsaZt6ssAn9KI1qDR+QarVUy9DR7Daor77Rm5TczwVS0nxHxE246J5rj5gfGRTMaNK6orWN4HpU+E2DCt+9CTHH8Aa1Mf6Rj29jNxyavb8g6SN7d53qgjiYuIfcdWTfM1w6aD6euj3f+oEXoy++oH10zqgHM9mWRyw8QH4MrQOL9 X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1f7d60c1-e2d9-4c13-1fcf-08da240a7952 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:43.2544 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: GPP7Dyuj4k3q0F5r2Dp9WWB/eHOrApmLslsQRCRMBuOUmrT08P6AjFXtrDAzIRtGHOAgyzwEWfqV8UAlh5SLlUlLFuKIO764uDyjeKh/Ncc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds documentation for the Ampere(R)'s Altra(R) SMpro misc driver. Signed-off-by: Thu Nguyen Signed-off-by: Quan Nguyen --- Changes in v8: + Update to reflect single value per sysfs [Quan] Changes in v7: + None Changes in v6: + First introduced in v6 [Quan] Documentation/misc-devices/index.rst | 1 + Documentation/misc-devices/smpro-misc.rst | 82 +++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 Documentation/misc-devices/smpro-misc.rst diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst index 7a6a6263cbab..284568eca747 100644 --- a/Documentation/misc-devices/index.rst +++ b/Documentation/misc-devices/index.rst @@ -27,6 +27,7 @@ fit into other categories. max6875 pci-endpoint-test smpro-errmon + smpro-misc spear-pcie-gadget uacce xilinx_sdfec diff --git a/Documentation/misc-devices/smpro-misc.rst b/Documentation/misc-devices/smpro-misc.rst new file mode 100644 index 000000000000..7d4123991c5d --- /dev/null +++ b/Documentation/misc-devices/smpro-misc.rst @@ -0,0 +1,82 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Kernel driver Ampere(R) Altra(R) SMpro miscellaneous +==================================================== + +Supported chips: + + * Ampere(R) Altra(R) + + Prefix: 'smpro' + + Reference: Altra SoC BMC Interface Specification + +Author: Thu Nguyen + +Description +----------- + +This driver support the monitoring and configuration of various miscellaneous +data provided by Ampere(R) Altra(R) SMpro processor. +At this time, these include: + + * Reading Boot Progress information + * Configuring SoC Power Limit + +Sysfs entries +------------- + +1) Boot progress + +SMpro misc driver creates the sysfs files ``boot_progress``. +The format of ``boot_progress`` file is as below:: + + + +Where: + +* Boot stage:: + + 0: SMpro firmware booting. + 1: PMpro firmware booting. + 2: ATF BL1 firmware booting. + 3: DDR initialization. + 4: DDR training report status. + 5: ATF BL2 firmware booting. + 6: ATF BL31 firmware booting. + 7: ATF BL32 firmware booting. + 8: UEFI firmware booting. + 9: OS booting. + +* Boot status:: + + 0: Not started. + 1: Started. + 2: Complete without error. + 3: Failure. + +* boot progress: 32 bits boot progress code + +The sysfs ``boot_progress`` only reports the boot state when the host is booting. +If the host is already booted, it returns latest state. + +Example:: + + #cat boot_progress + 0102808454A8 + +2) SoC Power Limit + +SMpro misc driver creates the sysfs file ``soc_power_limit`` to get/set the SoC Power Limit. + +Reading this sysfs return the current setting of SoC Power Limit (W) in decimal string. +Writing the desired value in decimal string to set the SoC Power Limit in Watt (W). +The range of SoC Power Limit is 90-500(W) and will be ignored if out of range. + +Example:: + + #cat soc_power_limit + 90 + #echo 95 > soc_power_limit + #cat soc_power_limit + 95 From patchwork Fri Apr 22 02:46:51 2022 Content-Type: text/plain; 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Fri, 22 Apr 2022 02:47:48 +0000 From: Quan Nguyen To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" Subject: [PATCH v8 7/9] dt-bindings: mfd: Add bindings for Ampere Altra SMPro MFD driver Date: Fri, 22 Apr 2022 09:46:51 +0700 Message-Id: <20220422024653.2199489-8-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3a997268-a628-4bf1-62d3-08da240a7c40 X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qhdxbGXKvz8enatkCqTsJJ46uoKdOGOb5IhnFVd0dpTztdT/oUlWITufVSNMrgtIZJq5+mlVjrxK0+WOXdrggdTHKO6jz5bR59L112Tmat2U9BxvGxUUUWIG5fh4aWXm7vSx9PszvTt9EVMLDkpKNzuV7FO+urb47+/nNP7+QndrowDX0ar9zgSxllkeI/ih0OXPp65aImKS9945heutfHykjhlI6qC0Ehtbsh8xrv3tUwhdbPioi5whZ4gpO08CqjWq6++9mjBRAo/R8h0mKlGEi3wu1UbA92Gtly/Wgvc8Aw9SSgGGSqCGFaJSbK2SWue2rMScF8jN044a/lbHvh/xHmHQCkJCvstyrrYFWHlWGsRyRdTzKDVmnleMrQLF4LFqOSxb9DafrZ0r2ZA3VJxeZLAXIfRSZNhmvh9kNrS7lXbh63HgyQABTuY0UrdMCqCaTuBoMKHDip+EWUUzOXpi9ji9YZlSjCgqX2iC2KeoU0o0wRAAPZH40ML+ocI0lkVjEkjtUJNUrY12TwKsDNxjXVCGAHH4mD1I8L7d5NI5HP/X41YIK20k1V13O0HTtKLNDumawkqca2ngsHiSlGORPfj7Pfa1LfKsK9KGyJzNLQb/47tD9AJlJ6PtKHM7dWCGBUi09C+ojQCib0ZJfxFj/3DU2a5MGbxh7Hk9a1xd/kFA2+r8+/DsxauSFBZOFVPH49ToFvmloRfMF8Ny1K/W4AKAKgT1/qKBWOgP6qaNmUUhUeLmK2nFq2N69Zykq3v0DduE46c4OfB60PqI0Z5QaX1FIB6FKMkWG0HoP9yzF825gKitzCEVNqr9NGJmgS6HkkDUJPFRG2MQG326qPHHTg7azsqjbOF/PSaZ4s4= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(966005)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(6666004)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: kdmMundZx8Gk6YZoliL+I8SpKLvhiZQKV1F4nU27O0jqBMoM+OnKHwWsDwDBvXfJaAKHSj1MPVZFnoMIotK81O/Wf1LFH9nJCj0p2dS6R+X8Ih+IwzLdkImN/2ZHSKTU2iQN07RBOzLOkG8y6qobI3ciEf/HCBRf2weRhZ+ymL9aUAn0fteXiQ2RIa2adbEp45qXgUOr8lkYkV6EsoFPIw1bt6GALotI3kxkL7lGu6uauYIEhUYtFlHppOyVSB2WX+1OOTS9XYCI+NSlbfBpqIKMj3x4ZHuUH62DCmOW9sOwkkaUiDyLXq5qBqnygMIqUUxH8dOwpUTG3TeiHoBgzXaDC+FNTKAMjOx/6DmMgV/D6SP+2wp0ldQPdSIwph0sXDKe0DdaWhBbP52qO1vb4M+uS591jOk6QXE6X20T7/IQc2Ty9WYuOZdLqnNZAQDem6/NBH+9ccwuUXbtds43UXOBOmWJ8ndv8PGNzB3v9Ks9UsM1N2rVHbfUeU0pB+WJjyO57SowgptJNCCmOKR9SZ370BJc9fGo7hrY3x7ySkHs8wx1NdzZc+FCKhltBSGzV8/qBYKB/9ENOiu4CqOQArC2PZBNHtYIm46zZAAZLXTCFu+Ix7c0iP1mosMibuF7UwE6/YYZhCqT0IgEKpFidV8OZ7OpdIAMH0owUMjwvbebQUD7eFy+Iqg16uaisOA1cZCTIkygv8Cb9uv96GADHDifniTyud4wn62YFYo4bBFgGpLt4LDJ3H85bTnTYNRkkzr69K1sPgSH7+InEHL1cMNdbP0McW7McdljuxOo/TvnONxRUgh2G4z5fy153z8c8OLofYD7ehCOBmpxXxLoZUM/vVcc9qvkqOjKllj6r9Lhly1TpC7jrm6BXrFWxk16RHf6yGutmw1MKmmKIzoeJFkFJO/37FgfjeEtGi9E+MpiEVSDdK1SUsT02NE8SR8q2uqOpMfu4i3ZwuNYKFFh72ks7NklT6vlWVpVwEVARA4XKkEY4+9N6sdoP91bvzd/ACDmkywdeUKnk+fqmlftlTI5vumqqyViBNdgax/+fQ8V5Iukp4c5+IwrTQ950zDncWGccq/JKSK23k0S6NcIKa3FYO4muCJAUE4ddmPbChu7KfZDuKxMtCYTTiBgLEao//u6Or1dgtqLQIw4qaN99R/HiQKOjHqvcSHKHqeiymCXnF2g15Vh3H1o5QWjWKtXoyXRrDrx6l/sLdGSSP2pmswRDTrWdablGfQj9H5OO3KhIzJJ0M7vjtWpTWrGah6VBlhrXg7iUqvrUF7TOY4eUjC3BUR+9048a/H8yoAGqzTBvwv2FgsKUnBzxz9AtLPd+8klrwsNz5iagqNyOQZZMbWfC1TSN/yUEMWvu+pv9xU0dKQ2rKtOqrJqkaM5bACrfpb9QNugZcLK8tG463Drz3fiBpO62dJerrzcigcZyRCuv8quQB/q72lDb9IudTag0vmitDZxpC4mDX3XXU8zkBfpkrBtl5W4CWtGflbkCDqI3Jv+bPNtdbSYo/EM4Qxs+SYFtwauzV2I6Z/qtc+Ouct74uPy3N/UoJEqqnc46jxMq2uL6T3uPakOh/LGMGFmQUudlQwDJnW11qfYOKfrcGWJ88mLDUjxuXe7m3HmfRp5rCr6OLFJeEt9hsyLDeaVwejYf7UV+zgauRohJgG7lWh+wUlf70+gIrzMuoXZRnPwCuILq4Hys+Z8UavwXwlbHH7esHY2YsGQ/5PuOjKUA55up33vCGQLwcXgIMXBJ1pHf6YV95j3Mt7/4jQiT+vl X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3a997268-a628-4bf1-62d3-08da240a7c40 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:48.2806 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5JNI76UqxHi8SRCt0Q0hANUn1nl4XT0QXJonogw8CAmmOW2TtYqj7Bejw3Htl1vCJVb4hKb1ZkHmYAjcUCg9pFcu5ipfEY0o2yUQ01bpk+k= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds device tree bindings for SMPro MFD driver found on the Mt.Jade hardware reference platform with Ampere's Altra Processor family. The SMpro co-processor on Ampere Altra processor family is to monitor and report various data included hwmon-related info, RAS errors, and other miscellaneous information. Signed-off-by: Quan Nguyen Reviewed-by: Rob Herring --- Changes in v8: + Removed unused #*_cells [Krzysztof] Changes in v7: + None Changes in v6: + None .../devicetree/bindings/mfd/ampere,smpro.yaml | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/ampere,smpro.yaml diff --git a/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml new file mode 100644 index 000000000000..c442c3cdffed --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ampere,smpro.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ampere Altra SMPro firmware driver + +maintainers: + - Quan Nguyen + +description: | + Ampere Altra SMPro firmware may contain different blocks like hardware + monitoring, error monitoring and other miscellaneous features. + +properties: + compatible: + enum: + - ampere,smpro + + reg: + description: + I2C device address. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + smpro@4f { + compatible = "ampere,smpro"; + reg = <0x4f>; + }; + }; From patchwork Fri Apr 22 02:46:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12822697 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 180B4C4332F for ; Fri, 22 Apr 2022 02:47:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443558AbiDVCur (ORCPT ); Thu, 21 Apr 2022 22:50:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443571AbiDVCuq (ORCPT ); Thu, 21 Apr 2022 22:50:46 -0400 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2095.outbound.protection.outlook.com [40.107.220.95]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16E5A4C7B7; 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Fri, 22 Apr 2022 02:47:53 +0000 From: Quan Nguyen To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Jean Delvare , Guenter Roeck , Jonathan Corbet , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Quan Nguyen , Thu Nguyen , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, OpenBMC Maillist Cc: Open Source Submission , Phong Vo , "Thang Q . Nguyen" Subject: [PATCH v8 8/9] mfd: smpro-mfd: Adds Ampere's Altra SMpro MFD driver Date: Fri, 22 Apr 2022 09:46:52 +0700 Message-Id: <20220422024653.2199489-9-quan@os.amperecomputing.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422024653.2199489-1-quan@os.amperecomputing.com> References: <20220422024653.2199489-1-quan@os.amperecomputing.com> X-ClientProxiedBy: SG2P153CA0023.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::10) To SJ0PR01MB7282.prod.exchangelabs.com (2603:10b6:a03:3f2::24) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ebc4b520-bfbc-46e8-e751-08da240a7f42 X-MS-TrafficTypeDiagnostic: SN6PR01MB4653:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: atkPWbsP70OLKlO8Wx+27osjFpHNnmgcbhaWtLSdQ4quSXhC7pMoGOkeDdFPqEEKQyerYwTsQbA4B0Z4KceXqSpqSCFjPyqsgcwVRt/oGZHa1wy6pVpqmsN9RWSA/3KvqPNhmfgX6rFD+LE+F4Xopqn8IHKuzjcAEbZEgJu1SLrdNTXvHssp38iT5YVl6RoW3Iv7Z8RpqFvVBtPbRFQYYdtQrVZKv24u1Mq09YHU1dA4JsoC1/Lt8YsfMrFjBWOzxHp6405RLzQze21SkrC5qSQG13lrmZNlbk3cwIKMFUlqhEa81ReWStPtaVdtJHINUV3OMyG2tUobzGs2l/1TJEC617LlKvINipKz47Uk/qe0eVf8A3T9l3/c/oYkprp8UQgGou6OdH8rCKf7KUtZHSD2IYJdMqF+tOi4R4u9mJJmioZHGhtrC2ZkC/h62o+rkApVlycX8DvrKrzpbbmXscvnyeFhCtE9YH9iqO+2nIKTqf7+deWeQr61Gsh4e1Ncv5gSxadymA2zghvxwGyDJkMLklDyMrs3PytExKwbxYH0FEU7OT0eUbTe/S1tXGewES0RtGl+sB4maYusD58VjVKzTx43nKrlpA7ZTZPYlItpDH95iGJUVk+YGNrGvqLjs8TUuIr8G3dRkyfZRfDOxKBatH0mC4cOpru9RQwrlQwkyB01oCoPsBRuwfE8+u6ethjnK6tsJejagvGKtHom0UXRXbKNgIwGdsgyTGDQAj0= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SJ0PR01MB7282.prod.exchangelabs.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(6486002)(6506007)(6512007)(508600001)(54906003)(8936002)(7416002)(66946007)(66476007)(107886003)(8676002)(316002)(110136005)(2616005)(1076003)(66556008)(52116002)(186003)(26005)(86362001)(2906002)(5660300002)(921005)(83380400001)(4326008)(38350700002)(38100700002);DIR:OUT;SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YBpn9NkGAAouNRFNaU33in19DEwxBlZoT8ucPsXZNmsdtwd6RojCaaRXaAY+ODmxY4Q4zBypvE1T6Q3d/d8vCJF75HoUwF6R22ichr2rnXQWGIl+1c8xRsW/6igdZ4uf+cRsIsvoRBOnUN0ptK5DJnSNkjOXSt43OqpdMIRO2gvr/T3znz/cp8xI4gXoo+0CiHbwLrmJ0Z/Eo5WKeaG4amUpu9c+IkF4ePZVbN7X1mCEnDwwvzr9V2RLD3UgYIgMhVWTG722lcrin8UZw76n8CycAAfhkKXROed8oTi9rHCwcg29tfoN1F1m5xWQhTCdLzlTRn0yF/pXixYIzBDelN8Qre7H2zTkGGdOM/+IHQavcW3KEA622lda1mwpueMOpniwbS6AV4+y+Gsga9NLcKDHhU0icb2lSFZtbLyLbjEhbyEwvc1F5mIcman0Gi/ICBzXtXhc1rstGpd1R9e7kGuehfxtyFrTkEipLB5ZhnJJ8be2sITqzI9cjsfptypC8lqcIdS+i+7tHb+oo38GNIc5MPF95rTct67gL+5UDiWKDRLOZ3mOBrQRmCm6pQR5uit7fvbFiltfWbIQQN3L/6udGt9wQbBts3Y8lATZEbsyHZzJF0n7yBm4YCdCfQ2OV8ZVc+u8HhrEz69afJVW0t9mEOQ4ri5mrwsOooRg6HrBdJ0uvAiRfPvNGaG6AlR+h5fRXsPatCk4w5HRNi8V7Z8BmBJcW32IrHqldLqCJ0ppIUX1oVzDS0z7EfDDkDwWfuJc3SJFubNK/4qGQ3p18UoFJTVbXAR2yIVkZ6NOCz/o7Lij3cl1nLEJvPyiwR5eF6bsxeaZn+Tayuvdtl2oRwsIDIo8aYFSp/JrJqRQ2QNzvPpGKeZOgD3GCSjVSL9HPLi9Fpsm1Nts0lrcQpsPS8unlviL4MKtuJUTZeNVFhtF8kLEZb9wMXS+3dhaFy/c6FfZ00XCeK49vW4K3A8AYHSROQI9JdVpGUSRbW9g2xXiaFjFHHqLr76OJW34qM/QOvcDQ/uV9JV9mX4i31EZGOhx4l7DIeqsAYhAGjylUF7Axy/TATj4Le7O6VV54U+L2FfFQsc+h1OXJyou4+j7r98fKrxPzfbgjZXXWrTkEEiHCQQTySJMNFVU0sca9OKGmSMY7uH/UhkYoiLWgDX0T73CdVxOiQwMggmJYO+Hu8Ra+4LpiqnRYC9FqA7ZKfS7sugK7qeaVXyVZ0aw8mAnp23yOitlz8uxMRNK/J9Sl80bH5Q0CucdzcJDtFLEVuCgvNvTX12tPzaTJm3xge8+pRw5d+jNcElbqwRvHOwxtyyfyLBrMK6U4unUdMEiM0SjdJUn5OWFZoT+Jy95vltByR/yce1D/1Qf0m2EXjTAxTmOv1hAENjBxo2zj/k6KZeB3qMSRGmE9QuhgfGACL+52suCGdnr13MoBvbfYmKbNyGksPc/fpaujz8WMjpj4+hlwxkm/XPN5oFCAS+CiKKeVopa+5Mw97bnGao36yZYfqntYSE/sFGn1BOMQa+d+rmZxqesqAnDf3MZu0X0qrPhmTIDit91j3GbRHhpn0e/M8iV7r6McHWcQ86Iv8l5gw5tY8O8pGae8tFraZMvsweN6QOsJ+jpoQCLwYx0FVSAE8au0o1p9S36IjpEZkxB18UuTEGmxfkmT6BE5C6i/eESBZBnEr2Hh2RR4Ay+AG949JuM+hrTuhvJQv0I4EYEN+VxFdxtjfKK7NHGddtYUGlEhp767fcsyWU7sXCfIcQjqY5g814vug9IWQgDdZ2xWSzl X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: ebc4b520-bfbc-46e8-e751-08da240a7f42 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:53.3147 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: pROL/w+CLf/ePWcHK9bpCQaBhs6kS2Z5ZJXdV4T9DO3uXWcxIW25RYO5HihsAbZqXnwdZ94GvXYL9AqxCG9FE04ussmAjdQLQkJKvETm+z8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Adds Multi-function devices driver for SMpro co-processor found on the Mt.Jade hardware reference platform with Ampere's Altra processor family. Signed-off-by: Quan Nguyen Reported-by: kernel test robot --- Changes in v8: + None Changes in v7: + Smpro-mfd now significant changes in compare with simple-mfd-i2c driver, remove the copyright note about simple-mfd-i2c [Quan] + Install bus->read/write() to handle multiple types of bus access. [Quan] + Update license to MODULE_LICENSE("GPL") [Quan] + Add others minor refactor the code [Quan] Changes in v6: + Update license part to reflect that this driver is clone from simple-mfd-i2c driver [Quan] Changes in v5: + Dropped the use of simple-mfd-i2c driver [Quan] + Introduced drivers/mfd/smpro-mfd.c driver to instantiate sub-devices. This is to avoid DT nodes without resource issue [Quan] + Revised commit message [Quan] Changes in v4: + Add "depends on I2C" to fix build issue found by kernel test robot [Guenter] Changes in v3: + None Changes in v2: + Used 'struct of_device_id's .data attribute [Lee Jones] drivers/mfd/Kconfig | 12 ++++ drivers/mfd/Makefile | 1 + drivers/mfd/smpro-mfd.c | 134 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 147 insertions(+) create mode 100644 drivers/mfd/smpro-mfd.c diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 3b59456f5545..383d0e6cfb91 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -77,6 +77,18 @@ config MFD_AS3711 help Support for the AS3711 PMIC from AMS +config MFD_SMPRO + tristate "Ampere Computing MFD SMpro core driver" + depends on I2C + select MFD_CORE + select REGMAP_I2C + help + Say yes here to enable SMpro driver support for Ampere's Altra + processor family. + + Ampere's Altra SMpro exposes an I2C regmap interface that can + be accessed by child devices. + config MFD_AS3722 tristate "ams AS3722 Power Management IC" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 858cacf659d6..36f8981cc4fd 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -266,6 +266,7 @@ obj-$(CONFIG_MFD_QCOM_PM8008) += qcom-pm8008.o obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o obj-$(CONFIG_MFD_SIMPLE_MFD_I2C) += simple-mfd-i2c.o +obj-$(CONFIG_MFD_SMPRO) += smpro-mfd.o obj-$(CONFIG_MFD_INTEL_M10_BMC) += intel-m10-bmc.o obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o diff --git a/drivers/mfd/smpro-mfd.c b/drivers/mfd/smpro-mfd.c new file mode 100644 index 000000000000..485c4f89ebd9 --- /dev/null +++ b/drivers/mfd/smpro-mfd.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ampere Altra Family SMPro MFD - I2C + * + * Copyright (c) 2022, Ampere Computing LLC + * Author: Quan Nguyen + */ + +#include +#include +#include +#include +#include +#include + +/* Identification Registers */ +#define MANUFACTURER_ID_REG 0x02 +#define AMPERE_MANUFACTURER_ID 0xCD3A + +static int smpro_mfd_write(void *context, const void *data, size_t count) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + int ret; + + ret = i2c_master_send(i2c, data, count); + if (ret == count) + return 0; + else if (ret < 0) + return ret; + else + return -EIO; +} + +static int smpro_mfd_read(void *context, const void *reg, size_t reg_size, + void *val, size_t val_size) +{ + struct device *dev = context; + struct i2c_client *i2c = to_i2c_client(dev); + struct i2c_msg xfer[2]; + unsigned char buf[2]; + int ret; + + xfer[0].addr = i2c->addr; + xfer[0].flags = 0; + + buf[0] = *(u8 *)reg; + buf[1] = val_size; + xfer[0].len = 2; + xfer[0].buf = buf; + + xfer[1].addr = i2c->addr; + xfer[1].flags = I2C_M_RD; + xfer[1].len = val_size; + xfer[1].buf = val; + + ret = i2c_transfer(i2c->adapter, xfer, 2); + if (ret == 2) + return 0; + else if (ret < 0) + return ret; + else + return -EIO; +} + +static const struct regmap_bus smpro_regmap_bus = { + .read = smpro_mfd_read, + .write = smpro_mfd_write, + .val_format_endian_default = REGMAP_ENDIAN_BIG, +}; + +static bool smpro_mfd_readable_noinc_reg(struct device *dev, unsigned int reg) +{ + return (reg == 0x82 || reg == 0x85 || reg == 0x92 || reg == 0x95 || + reg == 0xC2 || reg == 0xC5 || reg == 0xD2 || reg == 0xDA); +} + +static const struct regmap_config smpro_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .readable_noinc_reg = smpro_mfd_readable_noinc_reg, +}; + +static const struct mfd_cell smpro_devs[] = { + MFD_CELL_NAME("smpro-hwmon"), + MFD_CELL_NAME("smpro-errmon"), + MFD_CELL_NAME("smpro-misc"), +}; + +static int smpro_mfd_probe(struct i2c_client *i2c) +{ + const struct regmap_config *config; + struct regmap *regmap; + unsigned int val; + int ret; + + config = device_get_match_data(&i2c->dev); + if (!config) + config = &smpro_regmap_config; + + regmap = devm_regmap_init(&i2c->dev, &smpro_regmap_bus, &i2c->dev, config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + /* Check for valid ID */ + ret = regmap_read(regmap, MANUFACTURER_ID_REG, &val); + if (ret) + return ret; + + if (val != AMPERE_MANUFACTURER_ID) + return -ENODEV; + + return devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, + smpro_devs, ARRAY_SIZE(smpro_devs), NULL, 0, NULL); +} + +static const struct of_device_id smpro_mfd_of_match[] = { + { .compatible = "ampere,smpro", .data = &smpro_regmap_config }, + {} +}; +MODULE_DEVICE_TABLE(of, smpro_mfd_of_match); + +static struct i2c_driver smpro_mfd_driver = { + .probe_new = smpro_mfd_probe, + .driver = { + .name = "smpro-mfd-i2c", + .of_match_table = smpro_mfd_of_match, + }, +}; +module_i2c_driver(smpro_mfd_driver); + +MODULE_AUTHOR("Quan Nguyen "); +MODULE_DESCRIPTION("SMPRO MFD - I2C driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Apr 22 02:46:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quan Nguyen X-Patchwork-Id: 12822698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42E8BC433FE for ; Fri, 22 Apr 2022 02:48:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443611AbiDVCvE (ORCPT ); Thu, 21 Apr 2022 22:51:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1443586AbiDVCuz (ORCPT ); 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X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0858b4ab-b3e5-40ba-54d9-08da240a8245 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR01MB7282.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2022 02:47:58.3326 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6Dmkw7r0STh8G6q5IXY2gdeV17IccBj8GRGLWTKSuMt1kk09mNSgl5y6LplQ+GRzCxgwDWMCI8nWgqOkq9JfHQ8QoXuCE7vn09pffEnTpH8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR01MB4653 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add documentation for the Ampere(R)'s Altra(R) SMpro sysfs interfaces Signed-off-by: Quan Nguyen --- Changes in v8: + Sysfs to return single value in hex format [Greg] + Fix KernelVersion info [Greg] + Change errors_* to error_* [Quan] + Added overflow_[core|mem|pcie|other]_[ce|ue] [Quan] Changes in v7: + First introduce in v7 [Greg] .../sysfs-bus-platform-devices-ampere-smpro | 157 ++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro diff --git a/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro b/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro new file mode 100644 index 000000000000..41edab6c3e28 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro @@ -0,0 +1,157 @@ +What: /sys/bus/platform/devices/smpro-errmon.*/error_[core|mem|pcie|other]_[ce|ue] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the 48-byte Ampere (Vendor-Specific) Error Record, see [1], + printed in hex format as below: + + AABBCCCCDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD\ + DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD + Where: + AA : Error Type + BB : Subtype + CCCC : Instance + DDD...DDD: 44-byte value similar to the Arm RAS standard error record + + See [1] below for the format details. + + The detail of each sysfs entries is as below: + +-------------+---------------------------------------------------------+ + | Error | Sysfs entry | + +-------------+---------------------------------------------------------+ + | Core's CE | /sys/bus/platform/devices/smpro-errmon.*/error_core_ce | + | Core's UE | /sys/bus/platform/devices/smpro-errmon.*/error_core_ue | + | Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ce | + | Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ue | + | PCIe's CE | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ce | + | PCIe's UE | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ue | + | Other's CE | /sys/bus/platform/devices/smpro-errmon.*/error_other_ce| + | Other's UE | /sys/bus/platform/devices/smpro-errmon.*/error_other_ue| + +-------------+---------------------------------------------------------+ + UE: Uncorrect-able Error + CE: Correct-able Error + + [1] Section 3.3 Ampere (Vendor-Specific) Error Record Formats, + Altra Family RAS Supplement. + + +What: /sys/bus/platform/devices/smpro-errmon.*/overflow_[core|mem|pcie|other]_[ce|ue] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Return the overflow status of each type HW error reported: + 0 : No overflow + 1 : There is an overflow and the oldest HW errors are dropped + + The detail of each sysfs entries is as below: + +-------------+-----------------------------------------------------------+ + | Overflow | Sysfs entry | + +-------------+-----------------------------------------------------------+ + | Core's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ce | + | Core's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ue | + | Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ce | + | Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ue | + | PCIe's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ce | + | PCIe's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ue | + | Other's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ce| + | Other's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ue| + +-------------+-----------------------------------------------------------+ + UE: Uncorrect-able Error + CE: Correct-able Error + +What: /sys/bus/platform/devices/smpro-errmon.*/error_[smpro|pmpro] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the internal firmware error record printed as hex format + as below: + + ABBCDDEEEEFFFFFFFF + Where: + A : Firmware Error Type + 1: Warning + 2: Error + 4: Error with data + BB : Firmware Image Code (8-bit value) + C : Direction: + 0: Enter + 1: Exit + DD : Location, firmware module location code (8-bit value) + EEEE : Error Code, firmware Error Code (16-bit value) + FFFFFFFF: Extensive data (32-bit value) + + Example: + root@mtjade:~# cat /sys/bus/platform/devices/smpro-errmon.1.auto/error_smpro + 109008000a00000000 + + The detail of each sysfs entries is as below: + +-------------+-------------------------------------------------------+ + | Error | Sysfs entry | + +-------------+-------------------------------------------------------+ + | SMpro error | /sys/bus/platform/devices/smpro-errmon.*/error_smpro | + | PMpro error | /sys/bus/platform/devices/smpro-errmon.*/error_pmpro | + +-------------+-------------------------------------------------------+ + See more details in section 5.10 RAS Internal Error Register Definitions, + Altra Family Soc BMC Interface Specification. + + +What: /sys/bus/platform/devices/smpro-errmon.*/event_[vrd_warn_fault|vrd_hot|dimm_hot] +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the detail information in case of VRD/DIMM warning/hot events + in hex format as below: + + AABBBB + Where: + AA : The event channel + 00: VRD Warning Fault + 01: VRD Hot + 02: DIMM host + BBBB: The event detail information data + + See more details in section 5.7 GPI Status Registers, + Altra Family Soc BMC Interface Specification. + + +What: /sys/bus/platform/devices/smpro-misc.*/boot_progress +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RO) Contains the boot stages information in hex as format below: + + AABBCCCCCCCC + Where: + AA : The boot stages + 00: SMpro firmware booting + 01: PMpro firmware booting + 02: ATF BL1 firmware booting + 03: DDR initialization + 04: DDR training report status + 05: ATF BL2 firmware booting + 06: ATF BL31 firmware booting + 07: ATF BL32 firmware booting + 08: UEFI firmware booting + 09: OS booting + BB : Boot status + 00: Not started + 01: Started + 02: Completed without error + 03: Failed. + CCCCCCCC: Boot status information defined for each boot stages + + See more details in section 5.11 Boot Stage Register Definitions, + and section 6. Processor Boot Progress Codes, Altra Family Soc BMC + Interface Specification. + + +What: /sys/bus/platform/devices/smpro-misc*/soc_power_limit +KernelVersion: 5.18 +Contact: quan@os.amperecomputing.com +Description: + (RW) Contains the desired SoC power limit in Watt. + Writes to this sysfs set the desired SoC power limit (W). + Reads from this register return the current SoC power limit (W). + The value ranges: + Minimum: 120 W + Maximum: Socket TDP power