From patchwork Fri Apr 22 12:08:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66662C43217 for ; Fri, 22 Apr 2022 12:09:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447319AbiDVML4 (ORCPT ); Fri, 22 Apr 2022 08:11:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447310AbiDVMLz (ORCPT ); Fri, 22 Apr 2022 08:11:55 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F8E956431; Fri, 22 Apr 2022 05:09:01 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 227FD240010; Fri, 22 Apr 2022 12:08:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629338; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Pmv2fRcR52A5+9c/lLM+zKkbiFwkoGkYA+wRNOQLibM=; b=MFKweBrvIKrvIRdZddkrmJklYpBV/ZW1IsBUE0D7V1NbSrX5Iu0cEiH323p6t8JNtvlrey bAboyoksZfG/UfF5b2pdEIIdwvJ/C1tyQd4LGsYpit8z/EYuae1JqwspCDjDSWD5b6t1ta Leq10/FYDwIUaBtkSnt58F0TaVFXfEFevylUdcyjjFt7g3Hl4r04Xi7+NhkSuqjEqvxGsw eHdl3w52JthKHgq3n1zzT2seaAqsJm+GREAR2D7qv3STQQJfWbnazHoCEueeP1F+BRvY59 d/xXF6ywg3OvV9+I9izLD1iKNnCQpJ/mIXXyPnvkaA9jFrN49uWHlWRARwencQ== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 1/8] dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema Date: Fri, 22 Apr 2022 14:08:43 +0200 Message-Id: <20220422120850.769480-2-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Convert Renesas PCI bridge bindings documentation to json-schema. Signed-off-by: Herve Codina Reviewed-by: Rob Herring Reviewed-by: Geert Uytterhoeven --- .../devicetree/bindings/pci/pci-rcar-gen2.txt | 84 ---------- .../bindings/pci/renesas,pci-rcar-gen2.yaml | 156 ++++++++++++++++++ 2 files changed, 156 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt create mode 100644 Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt deleted file mode 100644 index aeba38f0a387..000000000000 --- a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt +++ /dev/null @@ -1,84 +0,0 @@ -Renesas AHB to PCI bridge -------------------------- - -This is the bridge used internally to connect the USB controllers to the -AHB. There is one bridge instance per USB port connected to the internal -OHCI and EHCI controllers. - -Required properties: -- compatible: "renesas,pci-r8a7742" for the R8A7742 SoC; - "renesas,pci-r8a7743" for the R8A7743 SoC; - "renesas,pci-r8a7744" for the R8A7744 SoC; - "renesas,pci-r8a7745" for the R8A7745 SoC; - "renesas,pci-r8a7790" for the R8A7790 SoC; - "renesas,pci-r8a7791" for the R8A7791 SoC; - "renesas,pci-r8a7793" for the R8A7793 SoC; - "renesas,pci-r8a7794" for the R8A7794 SoC; - "renesas,pci-rcar-gen2" for a generic R-Car Gen2 or - RZ/G1 compatible device. - - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first - followed by the generic version. - -- reg: A list of physical regions to access the device: the first is - the operational registers for the OHCI/EHCI controllers and the - second is for the bridge configuration and control registers. -- interrupts: interrupt for the device. -- clocks: The reference to the device clock. -- bus-range: The PCI bus number range; as this is a single bus, the range - should be specified as the same value twice. -- #address-cells: must be 3. -- #size-cells: must be 2. -- #interrupt-cells: must be 1. -- interrupt-map: standard property used to define the mapping of the PCI - interrupts to the GIC interrupts. -- interrupt-map-mask: standard property that helps to define the interrupt - mapping. - -Optional properties: -- dma-ranges: a single range for the inbound memory region. If not supplied, - defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the - allowed combinations of address and size. - -Example SoC configuration: - - pci0: pci@ee090000 { - compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; - clocks = <&mstp7_clks R8A7790_CLK_EHCI>; - reg = <0x0 0xee090000 0x0 0xc00>, - <0x0 0xee080000 0x0 0x1100>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - - bus-range = <0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x800 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x1000 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - }; - -Example board setup: - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml new file mode 100644 index 000000000000..494eb975c146 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml @@ -0,0 +1,156 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas AHB to PCI bridge + +maintainers: + - Marek Vasut + - Yoshihiro Shimoda + +description: | + This is the bridge used internally to connect the USB controllers to the + AHB. There is one bridge instance per USB port connected to the internal + OHCI and EHCI controllers. + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,pci-r8a7742 # RZ/G1H + - renesas,pci-r8a7743 # RZ/G1M + - renesas,pci-r8a7744 # RZ/G1N + - renesas,pci-r8a7745 # RZ/G1E + - renesas,pci-r8a7790 # R-Car H2 + - renesas,pci-r8a7791 # R-Car M2-W + - renesas,pci-r8a7793 # R-Car M2-N + - renesas,pci-r8a7794 # R-Car E2 + - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1 + + reg: + items: + - description: Operational registers for the OHCI/EHCI controllers. + - description: Bridge configuration and control registers. + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Device clock + + clock-names: + items: + - const: pclk + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + bus-range: + description: | + The PCI bus number range; as this is a single bus, the range + should be specified as the same value twice. + + dma-ranges: + description: | + A single range for the inbound memory region. If not supplied, + defaults to 1GiB at 0x40000000. Note there are hardware restrictions on + the allowed combinations of address and size. + maxItems: 1 + +patternProperties: + 'usb@[0-1],0': + type: object + + description: + This a USB controller PCI device + + properties: + reg: + description: + Identify the correct bus, device and function number in the + form . + + items: + minItems: 5 + maxItems: 5 + + phys: + description: + Reference to the USB phy + maxItems: 1 + + phy-names: + maxItems: 1 + + required: + - reg + - phys + - phy-names + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-map + - interrupt-map-mask + - clocks + - resets + - power-domains + - bus-range + - "#address-cells" + - "#size-cells" + - "#interrupt-cells" + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + pci@ee090000 { + compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; + device_type = "pci"; + reg = <0xee090000 0xc00>, + <0xee080000 0x1100>; + clocks = <&cpg CPG_MOD 703>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 703>; + interrupts = ; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0xee080000 0xee080000 0 0x00010000>; + dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x40000000>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + + usb@1,0 { + reg = <0x800 0 0 0 0>; + phys = <&usb0 0>; + phy-names = "usb"; + }; + + usb@2,0 { + reg = <0x1000 0 0 0 0>; + phys = <&usb0 0>; + phy-names = "usb"; + }; + }; From patchwork Fri Apr 22 12:08:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823361 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4DC0C43219 for ; Fri, 22 Apr 2022 12:09:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447333AbiDVMMB (ORCPT ); Fri, 22 Apr 2022 08:12:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447328AbiDVML7 (ORCPT ); Fri, 22 Apr 2022 08:11:59 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D84AF5643E; Fri, 22 Apr 2022 05:09:05 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id C60DB240006; Fri, 22 Apr 2022 12:08:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629341; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ya/1j72S7VzDx1yZNiE4V0jz32RXuF9hi7EUmtTZxoo=; b=KRn0cW7Vp2zvXeBTFz09gRN7V4SUj1whS1/sWTZRpB9WWrYVFr+M9j6Ync0YuVK67A0cK9 vzYgTMOQSzHjzOfXxYIk1CpfMvhE6pQiiuQulVFA/odYHWFLwKsovfWxmVcl/sENXcQMe2 weq+Rm+ACi6Y5rg06Nr7Kp+Z5JW4eWkY3Wkj/ixF3ui/Gs7FxFToeu3k+vzkmC9j8jdmj6 dRc9U/mvh0E+OwlpoQKUU9W5XyUf8X2j0HGYFuyb7UFqUwPXCit2FeEukdFF3bmRUN7Y3K hiSpPYv2+idIwrD5K6BbociCC8UhjIhz2rtT/dH3bt3Z3+B3NQi2HFtWMU2Gpg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 2/8] dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for r9a06g032 Date: Fri, 22 Apr 2022 14:08:44 +0200 Message-Id: <20220422120850.769480-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add internal PCI bridge support for the r9a06g032 SOC. The Renesas RZ/N1D (R9A06G032) internal PCI bridge is compatible with the one present in the R-Car Gen2 family. Compared to the R-Car Gen2 family, it needs three clocks instead of one. Signed-off-by: Herve Codina Reviewed-by: Rob Herring --- .../bindings/pci/renesas,pci-rcar-gen2.yaml | 43 ++++++++++++++++--- 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml index 494eb975c146..c29c46533e1b 100644 --- a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml +++ b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml @@ -32,6 +32,10 @@ properties: - renesas,pci-r8a7793 # R-Car M2-N - renesas,pci-r8a7794 # R-Car E2 - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1 + - items: + - enum: + - renesas,pci-r9a06g032 # RZ/N1D + - const: renesas,pci-rzn1 # RZ/N1 reg: items: @@ -41,13 +45,9 @@ properties: interrupts: maxItems: 1 - clocks: - items: - - description: Device clock + clocks: true - clock-names: - items: - - const: pclk + clock-names: true resets: maxItems: 1 @@ -113,6 +113,37 @@ required: - "#size-cells" - "#interrupt-cells" +if: + properties: + compatible: + contains: + enum: + - renesas,pci-rzn1 + +then: + properties: + clocks: + items: + - description: Internal bus clock (AHB) for HOST + - description: Internal bus clock (AHB) Power Management + - description: PCI clock for USB subsystem + clock-names: + items: + - const: hclk_usbh + - const: hclk_usbpm + - const: clk_pci_usb + required: + - clock-names + +else: + properties: + clocks: + items: + - description: Device clock + clock-names: + items: + - const: pclk + unevaluatedProperties: false examples: From patchwork Fri Apr 22 12:08:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823360 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06319C433FE for ; Fri, 22 Apr 2022 12:09:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447329AbiDVMMA (ORCPT ); Fri, 22 Apr 2022 08:12:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447326AbiDVML7 (ORCPT ); Fri, 22 Apr 2022 08:11:59 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B75865643D; Fri, 22 Apr 2022 05:09:05 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 29077240014; Fri, 22 Apr 2022 12:09:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629344; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5f4gitdZV7v8TIbtsjM1+5Zo5E5OdOGvoQrJNk5lar8=; b=ez9PhxpzoYb9gMqjbv3JYJJfrChDnmtW0uP8grJLae6B/QGPcRdfCs94Pzq+MahmC32mr2 se/MqiDq5h53CZGTFJ2g58J+nwZarK4ZCI08Bo3ec8hqRQ+Dg7lzKpuf/4Hz8JxBIE2pjl X3NIzUtH5TXCQWE6JabgfvXLyTKutbSsojJvkTD7eL1uCbNInkqfIo5hjznZPVSp0P3JPa HyanqPxqbixPfQNcgfGi3PaWPFDEkTnIS1za1wvmdPW2PsJ+bPo7wtbPmH6Ql6qLrsapRK jBOnfIP7JS/QGPVwJFbHM2EO9lUp1lcBe5shGW/jNfFDWP2wtmiFBJG6xfF59A== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 3/8] PCI: rcar-gen2: Add RZ/N1 SOCs support Date: Fri, 22 Apr 2022 14:08:45 +0200 Message-Id: <20220422120850.769480-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Renesas RZ/N1 SOCs family support to the Renesas R-Car gen2 PCI bridge driver. The Renesas RZ/N1 SOCs internal PCI bridge is comptible with the one available in the R-Car Gen2 family. Tested with the RZ/N1D (R9A06G032) SOC. Signed-off-by: Herve Codina --- drivers/pci/controller/pci-rcar-gen2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/pci-rcar-gen2.c b/drivers/pci/controller/pci-rcar-gen2.c index 35804ea394fd..839695791757 100644 --- a/drivers/pci/controller/pci-rcar-gen2.c +++ b/drivers/pci/controller/pci-rcar-gen2.c @@ -328,6 +328,7 @@ static const struct of_device_id rcar_pci_of_match[] = { { .compatible = "renesas,pci-r8a7791", }, { .compatible = "renesas,pci-r8a7794", }, { .compatible = "renesas,pci-rcar-gen2", }, + { .compatible = "renesas,pci-rzn1", }, { }, }; From patchwork Fri Apr 22 12:08:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823363 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 397A0C433F5 for ; Fri, 22 Apr 2022 12:09:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447389AbiDVMMV (ORCPT ); Fri, 22 Apr 2022 08:12:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447358AbiDVMMM (ORCPT ); Fri, 22 Apr 2022 08:12:12 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0BCB95674E; Fri, 22 Apr 2022 05:09:12 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id B2EB0240015; Fri, 22 Apr 2022 12:09:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629348; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+JCl/WOp3nIX69HO4grk06/2o7m8C+sekXdS2QhS91s=; b=bfVfx53VzN8+R2bv6WVm1Q2Ady2/V/QkJ6sMWnCvQcaDoX13LCHE9PnCDwA3/nm22jpqkM v9M3KXxPxP0Lj48UCtf6iHn5QfjAN6qoPPFJrDdou6beWcITHPg5FJbXHEoebIjbiPs3Ke yJlI5SU6GldG3rIhmH7F0iWIbxvZ39z3ooFiDEBF7zB7hls22zUfoWoL/6lHVUzpr701uD yLijxkEoua28Nf9EopJFT9//VUCIUpel2QKJlWymz1e/Narm0ENPFXyYQZPWvXiBxlYYJO Q3AwHn4y0mY1m+IeoM1lv0pwmyPyiE7WDR7Gp1h73wHvTcEsxcgf6ypgY4/C5Q== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 4/8] soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs Date: Fri, 22 Apr 2022 14:08:46 +0200 Message-Id: <20220422120850.769480-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org PM and PM_GENERIC_DOMAINS configs are required for RZ/N1 SOCs. Without these configs, the clocks used by the PCI bridge are not enabled and so accessing the devices leads to a kernel crash: [ 0.832958] Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848 Select PM and PM_GENERIC_DOMAINS for ARCH_RZN1 Signed-off-by: Herve Codina Reviewed-by: Geert Uytterhoeven --- drivers/soc/renesas/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index fdc99a05a7e0..15fff5632167 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -47,6 +47,8 @@ config ARCH_RZG2L config ARCH_RZN1 bool + select PM + select PM_GENERIC_DOMAINS select ARM_AMBA if ARM && ARCH_RENESAS From patchwork Fri Apr 22 12:08:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823362 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4A5DC433F5 for ; Fri, 22 Apr 2022 12:09:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447378AbiDVMMU (ORCPT ); Fri, 22 Apr 2022 08:12:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447361AbiDVMMM (ORCPT ); Fri, 22 Apr 2022 08:12:12 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6DEC5674C; Fri, 22 Apr 2022 05:09:12 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id B1F8F240005; Fri, 22 Apr 2022 12:09:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629351; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9l0fpzW+GOBekslO/DSF/fbtC1vCLVpdy5BP8RZmKOg=; b=nHT/rNHy1RHPVZZacg5BfoAHTPqmn2AZxFR/4mCRGxCRqEUTqP1iE/IY88wHWZczY9n2Pc 349p+1tkzFwdnWorA4a3X83QHV5C0kDQ+Xi7nSSbS0JB4F+hjbIeCmkNzCoLu2EnqXUVZG Wt+ABQA5afuAdFacRz0MzZjaU3PIw6kmbsR6ehHFNWpVYSySuIT41GHIrOl5+tn3r9Mz1w drUBhnZOT4z3ZhVkW9KZbH2/Nv88NineP4OD/N2NZMb0maB3zvG5z8KM9jN/kca7yDR6Hx fHx8QXRGryf/xDJnBHzf4o+VsCBKEHzs3vb00c7O7nbiudfZpOIPaF5AZB48nQ== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 5/8] ARM: dts: r9a06g032: Add missing '#power-domain-cells' Date: Fri, 22 Apr 2022 14:08:47 +0200 Message-Id: <20220422120850.769480-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Without '#power-domain-cells' property, power-domains cannot be used. This property is noted required in the device-tree binding. Add '#power-domain-cells' as needed. Signed-off-by: Herve Codina Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 636a6ab31c58..20286433d3c6 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -87,6 +87,7 @@ sysctrl: system-controller@4000c000 { reg = <0x4000c000 0x1000>; status = "okay"; #clock-cells = <1>; + #power-domain-cells = <0>; clocks = <&ext_mclk>, <&ext_rtc_clk>, <&ext_jtag_clk>, <&ext_rgmii_ref>; From patchwork Fri Apr 22 12:08:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823364 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58419C43219 for ; Fri, 22 Apr 2022 12:09:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447403AbiDVMMW (ORCPT ); Fri, 22 Apr 2022 08:12:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447365AbiDVMMM (ORCPT ); Fri, 22 Apr 2022 08:12:12 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 188BA56758; Fri, 22 Apr 2022 05:09:14 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 3FBE824000E; Fri, 22 Apr 2022 12:09:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629353; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QuYQWFbufH5yU6S93NHtWSTqJzRsUE1RxETOR78kCLE=; b=nwDgj1UcMv+++I3CF/L2kzjJK2U+3Nj+/TZlNH8MVAdYSHceiae0SfH6XIh62vFHd3V9w8 0B4mQmFFiPzpjrQC+O1YSY/piHu4xOAaUS38B7/NgNsYJYlxrEqcIYwUIX3rNSsMvGEJxU 4BNBCFG5TNOM5cFmBjortKWC1bzh7RNCraYLV9omEJWoyXrJ4PixyxNafOHWZsBFhbiwGy 81BJjNV2bWNrylOJ4usBmmO+cs/6uIxSO6atqeQk6fqq7llaxtoi1/GwazyyU++6xqDDUj ig5St6N4+N5awkl9p8Lud5rlvCrtLkppQ4qFfC+SGtBl/Nt6peQeiQYibCW8hg== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 6/8] ARM: dts: r9a06g032: Add internal PCI bridge node Date: Fri, 22 Apr 2022 14:08:48 +0200 Message-Id: <20220422120850.769480-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the device node for the r9a06g032 internal PCI bridge device. Signed-off-by: Herve Codina Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 20286433d3c6..33581f0c55c4 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -212,6 +212,35 @@ gic: interrupt-controller@44101000 { interrupts = ; }; + + pci_usb: pci@40030000 { + compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1"; + device_type = "pci"; + clocks = <&sysctrl R9A06G032_HCLK_USBH>, + <&sysctrl R9A06G032_HCLK_USBPM>, + <&sysctrl R9A06G032_CLK_PCI_USB>; + clock-names = "hclk_usbh", "hclk_usbpm", "clk_pci_usb"; + power-domains = <&sysctrl>; + reg = <0x40030000 0xc00>, + <0x40020000 0x1100>; + interrupts = ; + status = "disabled"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>; + /* Should map all possible DDR as inbound ranges, but + * the IP only supports a 256MB, 512MB, or 1GB window. + * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit) + */ + dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + }; }; timer { From patchwork Fri Apr 22 12:08:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823365 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E20DBC4321E for ; Fri, 22 Apr 2022 12:09:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447409AbiDVMM0 (ORCPT ); Fri, 22 Apr 2022 08:12:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35258 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447352AbiDVMMT (ORCPT ); Fri, 22 Apr 2022 08:12:19 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3D0556748; Fri, 22 Apr 2022 05:09:17 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 917A324000D; Fri, 22 Apr 2022 12:09:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629356; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XbK44txh6IJgMhR0iqajJG2j4qqD92+Fo56+QPX8QcE=; b=KECf+/7Wd1/QIsrDcWeboFzTAPhA3ftm+NTasE4Z5fSj6+sINRsYvSrGWR6RixDs8/XM70 3IaF5z9Oufi02jpY30BefsYFEfIBgCuUoL2gp80ome4RqOAM71HSc6YC4m+uT5t8gtHReH 2hEPq4n/zzQSUQXvKglbpa0RDf4N/DN9o0ND4h1eCw0Bm4hKTcqyNtJTchjG0WP3mJOPAK c8A2dpMQzklTBaGb2ULx/WqaN8BEHHBrDe6aJLpBXuF64LoyUsdAgD/EMiOI+QCjbgdAPT OlmD0eRyytrjYmf4cy9KGUWe9TsVuDCxMAS3KaFAsuf6fPJ+imNJGBkksEc7+w== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 7/8] ARM: dts: r9a06g032: Add USB PHY DT support Date: Fri, 22 Apr 2022 14:08:49 +0200 Message-Id: <20220422120850.769480-8-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Define the r9a06g032 generic part of the USB PHY device node. Signed-off-by: Herve Codina Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 33581f0c55c4..58af07eb75c9 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -59,6 +59,12 @@ ext_rtc_clk: extrtcclk { clock-frequency = <0>; }; + usbphy: usbphy { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + status = "disabled"; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; From patchwork Fri Apr 22 12:08:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12823366 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4986C433EF for ; Fri, 22 Apr 2022 12:10:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1447422AbiDVMM2 (ORCPT ); Fri, 22 Apr 2022 08:12:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1447376AbiDVMMU (ORCPT ); Fri, 22 Apr 2022 08:12:20 -0400 Received: from relay10.mail.gandi.net (relay10.mail.gandi.net [IPv6:2001:4b98:dc4:8::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C6D156764; Fri, 22 Apr 2022 05:09:19 -0700 (PDT) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 26BAA240008; Fri, 22 Apr 2022 12:09:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1650629358; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eAmUY6poiqDINT9jc4YZdKTXBn0uAtKS+NvA7rwB+54=; b=Z0EW5dCQBO22vHZW458iiLO0S0MdG8ZN4GIV0lExa601vVH9/ukxpHAh3umnFRV1l6KGk9 x/PxtEGspIXKgKcS5hC/tyGXAGr37IblUqTRu8Pjvgc9D1Es30PZ5kE8N3P4Hs/W5FvnjP or83R5yOpRzNlJ/mSBSA23jACwtVYdQE2ZNrqAuUsmdPloHB2Jn9/VZg5cf0Ozk3dwTHIa iAf1ZV0bY/EHU3XlS+oT9aABtXo/2AS4PwTrX7LytkErOPAgj5RyIhsSiDeJ8x35HmkagU 6Uchj8i62D3uzAumFl61Q7HAEtGkRS6uPl9AjsJSyuxFhn8SBf7aJ/NfNFOLUA== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sergey Shtylyov , Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH v3 8/8] ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY Date: Fri, 22 Apr 2022 14:08:50 +0200 Message-Id: <20220422120850.769480-9-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220422120850.769480-1-herve.codina@bootlin.com> References: <20220422120850.769480-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Describe the PCI USB devices that are behind the PCI bridge, adding necessary links to the USB PHY device. Signed-off-by: Herve Codina Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/r9a06g032.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 58af07eb75c9..8dc50c09ac65 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -246,6 +246,18 @@ pci_usb: pci@40030000 { interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + + usb@1,0 { + reg = <0x800 0 0 0 0>; + phys = <&usbphy>; + phy-names = "usb"; + }; + + usb@2,0 { + reg = <0x1000 0 0 0 0>; + phys = <&usbphy>; + phy-names = "usb"; + }; }; };