From patchwork Sat Apr 23 13:14:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Rossi X-Patchwork-Id: 12824514 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0E3DC433EF for ; Sat, 23 Apr 2022 13:15:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235461AbiDWNR4 (ORCPT ); Sat, 23 Apr 2022 09:17:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235682AbiDWNRj (ORCPT ); Sat, 23 Apr 2022 09:17:39 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CEF51DD225 for ; Sat, 23 Apr 2022 06:14:41 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id u7so1411895plg.13 for ; Sat, 23 Apr 2022 06:14:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nathanrossi.com; s=google; h=date:message-id:from:to:cc:subject:content-transfer-encoding :mime-version; bh=tZUrl8zLKA5D27ChnNocJe50cIVDD1SSEejUzU+DrrI=; b=i8TV0Ww6bdfK6ykIROfAsZnjEnJS3ZqNeUmA+qBRONVVVWSA6HP7wmhLSMJ/1ajzS2 1o/dWYH5BLqrzbKnSTDQqcrQCb5aeZybM4qBk3u2gZY8g1LlaHKf0YZiWtSH+lfjbLuU dE6kSOCKlwFPt7rMjY1dKGKkMnqPq4cy3zBkWrQXJQNiQ1cJ3fASGNc87w97yg7wN2hJ VFdh4FsAiuXCwepwqOzSv3BwVpgTL33i5n1qahZpnvEcrfiS9QWYPGuI/hPFHJlVljJc QjGgo4FUYb8oRQQvhcY+OtCjLsH3iRfmoUz258vD/GURt1qy3KVAv5K2lxgwc4YoBdwr JVEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:message-id:from:to:cc:subject :content-transfer-encoding:mime-version; bh=tZUrl8zLKA5D27ChnNocJe50cIVDD1SSEejUzU+DrrI=; b=bpDtGtBH33L71hBs1452j8S/DWw8/jo345LUQhxP8yQzuQfts5aROjtwg6DPFJqYmX NU3aCRdTp/addo0+Dr+bsWEHGYHCRNN/vGiJn0if8P77CNzuR0yJzE9/55CaGOXi5ESO QgosxK+kcmDSWtpaWgHqEi6wquziOK2c5jDlUIHlcI036EopkLjF7TOppWDhBbgfp8W8 095ah05jjrdWMkQmWOj/ADoxm1SHp2j6h6P3WRYnimV7yZ3yvYOU3nzMg0BKRfpb38dX PgQIKVMhflgpXbH1JFpJGXwTdUtJbb5jbAIm4qJLskMEGFBtIvJ6LyRqcszFrvLOu6ao DolQ== X-Gm-Message-State: AOAM5334V07BSqvxTuYKfgJFYLiOo+XDzWaqIFneSAs5wxXu6jSsXcUm sWE29BZR/zF4jc029yQwP4BSkw== X-Google-Smtp-Source: ABdhPJzvdhfEGUXSzxlB9k8D2vR5vqIHv5iTi//MSitWGnSl/f7S28O/LHFKUDRMmL7GEWmFRCicZw== X-Received: by 2002:a17:902:e94f:b0:14f:1636:c8a8 with SMTP id b15-20020a170902e94f00b0014f1636c8a8mr9338301pll.130.1650719680802; Sat, 23 Apr 2022 06:14:40 -0700 (PDT) Received: from [127.0.1.1] (117-20-68-98.751444.bne.nbn.aussiebb.net. [117.20.68.98]) by smtp.gmail.com with UTF8SMTPSA id w7-20020a63a747000000b003991d7d3728sm5103337pgo.74.2022.04.23.06.14.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Apr 2022 06:14:40 -0700 (PDT) Date: Sat, 23 Apr 2022 13:14:27 +0000 Message-Id: <20220423131427.237160-1-nathan@nathanrossi.com> From: Nathan Rossi To: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nathan Rossi , Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski Subject: [PATCH 1/2] dt-bindings: net: dsa: marvell: Add single-chip-address property MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Some Marvell DSA devices can be accessed in a single chip addressing mode. This is currently configured by setting the address of the switch to 0. However switches in this configuration do not respond to address 0, only responding to higher addresses (fixed addressed based on the switch model) for the individual ports/etc. This is a feature to allow for other phys to exist on the same mdio bus. This change defines a 'single-chip-address' property in order to explicitly define that the chip is accessed in this mode. This allows for a switch to have an address defined other than 0, so that address 0 can be used for another mdio device. Signed-off-by: Nathan Rossi --- Documentation/devicetree/bindings/net/dsa/marvell.txt | 2 ++ 1 file changed, 2 insertions(+) --- 2.35.2 diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt index 2363b41241..5c7304274c 100644 --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt +++ b/Documentation/devicetree/bindings/net/dsa/marvell.txt @@ -46,6 +46,8 @@ Optional properties: - mdio? : Container of PHYs and devices on the external MDIO bus. The node must contains a compatible string of "marvell,mv88e6xxx-mdio-external" +- single-chip-address : Device is configured to use single chip addressing + mode. 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[117.20.68.98]) by smtp.gmail.com with UTF8SMTPSA id j10-20020a17090a734a00b001bf31f7520csm941202pjs.1.2022.04.23.06.14.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Apr 2022 06:14:46 -0700 (PDT) Date: Sat, 23 Apr 2022 13:14:27 +0000 Message-Id: <20220423131427.237160-2-nathan@nathanrossi.com> In-Reply-To: <20220423131427.237160-1-nathan@nathanrossi.com> References: <20220423131427.237160-1-nathan@nathanrossi.com> From: Nathan Rossi To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nathan Rossi , Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Paolo Abeni Subject: [PATCH 2/2] net: dsa: mv88e6xxx: Handle single-chip-address OF property MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Handle the parsing and use of single chip addressing when the switch has the single-chip-address property defined. This allows for specifying the switch as using single chip addressing even when mdio address 0 is used by another device on the bus. This is a feature of some switches (e.g. the MV88E6341/MV88E6141) where the switch shares the bus only responding to the higher 16 addresses. Signed-off-by: Nathan Rossi Acked-by: Marek Behún --- drivers/net/dsa/mv88e6xxx/smi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) --- 2.35.2 diff --git a/drivers/net/dsa/mv88e6xxx/smi.c b/drivers/net/dsa/mv88e6xxx/smi.c index a990271b74..1eb31c1563 100644 --- a/drivers/net/dsa/mv88e6xxx/smi.c +++ b/drivers/net/dsa/mv88e6xxx/smi.c @@ -171,9 +171,12 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = { int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int sw_addr) { + struct device_node *np = chip->dev->of_node; + if (chip->info->dual_chip) chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops; - else if (sw_addr == 0) + else if (sw_addr == 0 || + (np && of_property_read_bool(np, "single-chip-address"))) chip->smi_ops = &mv88e6xxx_smi_direct_ops; else if (chip->info->multi_chip) chip->smi_ops = &mv88e6xxx_smi_indirect_ops;