From patchwork Mon Apr 25 16:24:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12825934 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2D16C433EF for ; Mon, 25 Apr 2022 16:23:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DDE4110E5C6; Mon, 25 Apr 2022 16:23:39 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 07AAF10E594; Mon, 25 Apr 2022 16:23:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650903816; x=1682439816; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=C9KppufqNBcoOEqlw1a11aEo0DAHKPArEfFcrfmgFlI=; b=IWDutMxKyxY/EhS4mIc9/UXrDXpMQV3WIiotLPZ2dugc17QUTS6HgrXf uUT+96HsEXtlmj5rAqbnVZE9wnGem+cfq6yRjMZbBdWFSldgsNuSMBSny 3Sa4j3r47KAu8e1nusXggp3snKcWKAFJcx423DLMijDGZp07/DxCeIOH8 2OwbB173fvmgpono+l3/Dgdr64H6BDnwlol9Nx/aExyeJOle+f77JhwhU 3sOGx9EVvbHpFmsw4frJmhan6j2/bl4c6m71FaHy3MqBXYkFiyMUyth1y vvovQdOlt0rkE+IH8gn0HvIMZACbF+lNX1Fcb3IamUIpDOUPtxvXiD+KC A==; X-IronPort-AV: E=McAfee;i="6400,9594,10328"; a="290434352" X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="290434352" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:35 -0700 X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="677290965" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:33 -0700 From: Ramalingam C To: intel-gfx , dri-devel Subject: [PATCH v2 1/4] drm/i915/gt: GEM_BUG_ON unexpected NULL at scatterlist walking Date: Mon, 25 Apr 2022 21:54:27 +0530 Message-Id: <20220425162430.28844-2-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220425162430.28844-1-ramalingam.c@intel.com> References: <20220425162430.28844-1-ramalingam.c@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" While locating the start of ccs scatterlist in smem scatterlist, that has to be the size of lmem obj size + corresponding ccs data size. Report bug if scatterlist terminate before that length. Signed-off-by: Ramalingam C Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_migrate.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index 9d552f30b627..29d761da02c4 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -687,6 +687,12 @@ static void get_ccs_sg_sgt(struct sgt_dma *it, u32 bytes_to_cpy) bytes_to_cpy -= len; it->sg = __sg_next(it->sg); + + /* + * scatterlist supposed to be the size of + * bytes_to_cpy + GET_CCS_BYTES(bytes_to_copy). + */ + GEM_BUG_ON(!it->sg); it->dma = sg_dma_address(it->sg); it->max = it->dma + sg_dma_len(it->sg); } while (bytes_to_cpy); From patchwork Mon Apr 25 16:24:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12825936 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64E95C433FE for ; Mon, 25 Apr 2022 16:23:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EDBB210E7A5; Mon, 25 Apr 2022 16:23:41 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 220CA10E564; Mon, 25 Apr 2022 16:23:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650903818; x=1682439818; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MOFaZMKF45fliVv/42ysCZ7rsVWhfjeqfv0vo0/q2pg=; b=dp0IcjIE2S6t6owemLZQSIIV1dQ6fF+O4TayG90vQzBhr4ZPUglOaQ53 uBd/um8ktSHhAh1Jhs/T1GHsGZukBpXr4X9dFHdVXWduWNxW3VgX3mscG jIkb0aJUq/Lx71PPDjvp0+NWjBmMB2QN5XgPk8Oj7zH1gp1lqqkd4LHOu Xfv6aaCZQPwvA3FbstsIuGjsjFwpZjDGD19pZWzjWvNZMkk4D245pGaJq wIMZ3bOdm+c7ibqAqo56w5Q6sc7GZhHScFHnig5fvkkFfoq3AWaG2j5Oz tIChQ7K4g7hacBcqAHwcKGMmN5fap6SlOJ3QffR0k/CXoULJnr2tX5rsf g==; X-IronPort-AV: E=McAfee;i="6400,9594,10328"; a="290434364" X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="290434364" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:37 -0700 X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="677290971" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:35 -0700 From: Ramalingam C To: intel-gfx , dri-devel Subject: [PATCH v2 2/4] drm/i915/gt: optimize the ccs_sz calculation per chunk Date: Mon, 25 Apr 2022 21:54:28 +0530 Message-Id: <20220425162430.28844-3-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220425162430.28844-1-ramalingam.c@intel.com> References: <20220425162430.28844-1-ramalingam.c@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Calculate the ccs_sz that needs to be emitted based on the src and dst pages emitted per chunk. And handle the return value of emit_pte for the ccs pages. Signed-off-by: Ramalingam C Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_migrate.c | 36 +++++++++---------------- 1 file changed, 12 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index 29d761da02c4..463a6a14b5f9 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -647,17 +647,9 @@ static int scatter_list_length(struct scatterlist *sg) static void calculate_chunk_sz(struct drm_i915_private *i915, bool src_is_lmem, - int *src_sz, int *ccs_sz, u32 bytes_to_cpy, - u32 ccs_bytes_to_cpy) + int *src_sz, u32 bytes_to_cpy, u32 ccs_bytes_to_cpy) { if (ccs_bytes_to_cpy) { - /* - * We can only copy the ccs data corresponding to - * the CHUNK_SZ of lmem which is - * GET_CCS_BYTES(i915, CHUNK_SZ)) - */ - *ccs_sz = min_t(int, ccs_bytes_to_cpy, GET_CCS_BYTES(i915, CHUNK_SZ)); - if (!src_is_lmem) /* * When CHUNK_SZ is passed all the pages upto CHUNK_SZ @@ -713,10 +705,10 @@ intel_context_migrate_copy(struct intel_context *ce, struct drm_i915_private *i915 = ce->engine->i915; u32 ccs_bytes_to_cpy = 0, bytes_to_cpy; enum i915_cache_level ccs_cache_level; - int src_sz, dst_sz, ccs_sz; u32 src_offset, dst_offset; u8 src_access, dst_access; struct i915_request *rq; + int src_sz, dst_sz; bool ccs_is_src; int err; @@ -770,7 +762,7 @@ intel_context_migrate_copy(struct intel_context *ce, } do { - int len; + int len, ccs_sz; rq = i915_request_create(ce); if (IS_ERR(rq)) { @@ -797,7 +789,7 @@ intel_context_migrate_copy(struct intel_context *ce, if (err) goto out_rq; - calculate_chunk_sz(i915, src_is_lmem, &src_sz, &ccs_sz, + calculate_chunk_sz(i915, src_is_lmem, &src_sz, bytes_to_cpy, ccs_bytes_to_cpy); len = emit_pte(rq, &it_src, src_cache_level, src_is_lmem, @@ -835,33 +827,29 @@ intel_context_migrate_copy(struct intel_context *ce, if (err) goto out_rq; + ccs_sz = GET_CCS_BYTES(i915, len); err = emit_pte(rq, &it_ccs, ccs_cache_level, false, ccs_is_src ? src_offset : dst_offset, ccs_sz); + if (err < 0) + goto out_rq; + if (err < ccs_sz) { + err = -EINVAL; + goto out_rq; + } err = rq->engine->emit_flush(rq, EMIT_INVALIDATE); if (err) goto out_rq; - /* - * Using max of src_sz and dst_sz, as we need to - * pass the lmem size corresponding to the ccs - * blocks we need to handle. - */ - ccs_sz = max_t(int, ccs_is_src ? ccs_sz : src_sz, - ccs_is_src ? dst_sz : ccs_sz); - err = emit_copy_ccs(rq, dst_offset, dst_access, - src_offset, src_access, ccs_sz); + src_offset, src_access, len); if (err) goto out_rq; err = rq->engine->emit_flush(rq, EMIT_INVALIDATE); if (err) goto out_rq; - - /* Converting back to ccs bytes */ - ccs_sz = GET_CCS_BYTES(rq->engine->i915, ccs_sz); ccs_bytes_to_cpy -= ccs_sz; } From patchwork Mon Apr 25 16:24:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12825935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6B60EC433EF for ; Mon, 25 Apr 2022 16:23:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3259010E594; Mon, 25 Apr 2022 16:23:41 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7CF7010E721; Mon, 25 Apr 2022 16:23:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650903820; x=1682439820; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WiqaG448040fxl0OCpeirVMM2lL4ffMEzbrGmaahHU8=; b=BFSEYTdImH3SjkoNQLEC35Rig9iHCtcWJFYd0YB+USAm2HP2bDaghM7L fWZPB+xGr7IigRlxgHy8fwvKB7Lu99e4yX808o5xYMWX4ktMpNLPO9h8Y 8K8w4ZH7wrsukbRwOPbMRICHIxughrRBbw7E7vFPxID6QyLSJN/BY35X2 JRrItCNRDXqMoRBMwzRUwKfcJTsp8H8CyKWT8yX0gisRkKO3zzQQixKwu qdXR2xKauwgztPHxFME8yIlyVbonON0YExZkjXtsuqv4jan1ZWuRiczto 8Uk8vvUMARCtEXRhAz+x3YPMh7KSylyxioO1vUB1JhQDy4pbADkvJ2s/l Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10328"; a="290434373" X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="290434373" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:40 -0700 X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="677290979" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:38 -0700 From: Ramalingam C To: intel-gfx , dri-devel Subject: [PATCH v2 3/4] drm/i915/gt: Document the eviction of the Flat-CCS objects Date: Mon, 25 Apr 2022 21:54:29 +0530 Message-Id: <20220425162430.28844-4-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220425162430.28844-1-ramalingam.c@intel.com> References: <20220425162430.28844-1-ramalingam.c@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld , Thomas Hellstrom Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Capture the eviction details for Flat-CCS capable, lmem objects. v2: Fix the Flat-ccs capbility of lmem obj with smem residency possibility [Thomas] Signed-off-by: Ramalingam C cc: Thomas Hellstrom cc: Matthew Auld Reviewed-by: Matthew Auld --- drivers/gpu/drm/i915/gt/intel_migrate.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c index 463a6a14b5f9..930e0fd9795f 100644 --- a/drivers/gpu/drm/i915/gt/intel_migrate.c +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c @@ -485,16 +485,21 @@ static bool wa_1209644611_applies(int ver, u32 size) * And CCS data can be copied in and out of CCS region through * XY_CTRL_SURF_COPY_BLT. CPU can't access the CCS data directly. * - * When we exhaust the lmem, if the object's placements support smem, then we can - * directly decompress the compressed lmem object into smem and start using it - * from smem itself. + * I915 supports Flat-CCS on lmem only objects. When an objects has the smem in + * its preference list, on memory pressure, i915 needs to migarte the lmem + * content into smem. If the lmem object is Flat-CCS compressed by userspace, + * then i915 needs to decompress it. But I915 lack the required information + * for such decompression. Hence I915 supports Flat-CCS only on lmem only objects. * - * But when we need to swapout the compressed lmem object into a smem region - * though objects' placement doesn't support smem, then we copy the lmem content - * as it is into smem region along with ccs data (using XY_CTRL_SURF_COPY_BLT). - * When the object is referred, lmem content will be swaped in along with - * restoration of the CCS data (using XY_CTRL_SURF_COPY_BLT) at corresponding - * location. + * when we exhaust the lmem, Flat-CCS capable objects' lmem backing memory can + * be temporarily evicted to smem, along with the auxiliary CCS state, where + * it can be potentially swapped-out at a later point, if required. + * If userspace later touches the evicted pages, then we always move + * the backing memory back to lmem, which includes restoring the saved CCS state, + * and potentially performing any required swap-in. + * + * For the migration of the lmem objects with smem in placement list, such as + * {lmem, smem}, objects are treated as non Flat-CCS capable objects. */ static inline u32 *i915_flush_dw(u32 *cmd, u32 flags) From patchwork Mon Apr 25 16:24:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 12825937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A214C433EF for ; Mon, 25 Apr 2022 16:23:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0730510E870; Mon, 25 Apr 2022 16:23:46 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id F035510E7E4; Mon, 25 Apr 2022 16:23:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650903823; x=1682439823; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Hvgf+M/7SbHFav0/RuR27C0dZYU4H+m1q9kHGxJE5gs=; b=Oetqp7/s27JKtPsG+rwVMhugUieIev+uW7ypH0qJKot56QhPbhuskfKf RBpppzA8lsl3S3tRiPxSO/hnoq8f1F4Bw4tf+Q5kbuGNFrBL33ReYnpGD PtLtmCFIJOkVHzwhspHCe9hAp1b6Gd8MZx2xS1tHTmi3ZLclxpAi5tyMl QXiQfpa7ZvqJd4J9Xft4wi5O2EExA7fuVuCmZkPSvGJKovQz5CzEw9BBj M7kOs45jyQrCPCGbrq1ZedS8MyySkMwYF+L6Cp/YEPwjU/gp5U2zbyFmw LwUj4xOFkH5hvqNEpIHl5fnwzUcZqamPyEMg4ORMRdbyDekiJ89U7hDk3 A==; X-IronPort-AV: E=McAfee;i="6400,9594,10328"; a="290434383" X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="290434383" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:42 -0700 X-IronPort-AV: E=Sophos;i="5.90,288,1643702400"; d="scan'208";a="677290995" Received: from ramaling-i9x.iind.intel.com ([10.203.144.108]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 09:23:40 -0700 From: Ramalingam C To: intel-gfx , dri-devel Subject: [PATCH v2 4/4] uapi/drm/i915: Document memory residency and Flat-CCS capability of obj Date: Mon, 25 Apr 2022 21:54:30 +0530 Message-Id: <20220425162430.28844-5-ramalingam.c@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220425162430.28844-1-ramalingam.c@intel.com> References: <20220425162430.28844-1-ramalingam.c@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hellstrom Thomas , Matthew Auld , Thomas Hellstrom Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Capture the impact of memory region preference list of an object, on their memory residency and Flat-CCS capability of the objects. v2: Fix the Flat-CCS capability of an obj with {lmem, smem} preference list [Thomas] Signed-off-by: Ramalingam C cc: Matthew Auld cc: Thomas Hellstrom Reviewed-by: Matthew Auld --- include/uapi/drm/i915_drm.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 35ca528803fd..ad191ed6547c 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -3393,6 +3393,24 @@ struct drm_i915_gem_create_ext { * At which point we get the object handle in &drm_i915_gem_create_ext.handle, * along with the final object size in &drm_i915_gem_create_ext.size, which * should account for any rounding up, if required. + * + * Objects with multiple memory regions in the preference list will be backed + * by one of the memory regions mentioned in the preference list. Though I915 + * tries to honour the order of the memory regions in the preference list, + * based on the memory pressure of the regions, objects' backing region + * will be selected. + * + * Userspace has no means of knowing the backing region for such objects. + * + * On Flat-CCS capable HW, compression is supported for the objects residing + * in I915_MEMORY_CLASS_DEVICE. When such objects (compressed) has other + * memory class in preference list and migrated (by I915, due to memory + * constrain) to the non I915_MEMORY_CLASS_DEVICE region, then I915 needs to + * decompress the content. But I915 dont have the required information to + * decompress the userspace compressed objects. + * + * So I915 supports Flat-CCS, only on the objects which can reside only on + * I915_MEMORY_CLASS_DEVICE regions. */ struct drm_i915_gem_create_ext_memory_regions { /** @base: Extension link. See struct i915_user_extension. */