From patchwork Thu Apr 28 12:29:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 12830620 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0BE02C433F5 for ; Thu, 28 Apr 2022 12:30:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=rmCx9PCP/TNANDOa/CDKgcKdPerl1+MG+MIhD1eZs3o=; b=EfaLS+88wKwijg 21C0ZCjOEbiVj3mtyPMwiArIWhlXGz7sD6WRmVJ1mgYT3NbnbWDKrk7ejWOIgbSW1qm1Ke+KE1GaW UmClui2LZEndQhFUuRcLb3tnML/K6NmHHyZAhajTqM4mAA/+SFvmrsmg9K60gKaCUvq4Z3Gyhp+bD GURUm09h+yrDW7xGouQRZYveUyMa3vG9MLAO383kqSqTuE3c8EtajQEr+p8Eo4zzIS5bHQ4LyoCEb KpI9N/Vm9EpnskM9erFKcKv8D/e3LmAeG0TU4IubscdivMJ5l0ZQbsrg2L0ChrcJ+om4zJkEyHLsC FS1iUQKvC7qkB5y+9tFw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nk3Gw-006osJ-BU; Thu, 28 Apr 2022 12:29:26 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nk3Gr-006oqC-Pd for linux-arm-kernel@lists.infradead.org; Thu, 28 Apr 2022 12:29:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8A691474; Thu, 28 Apr 2022 05:29:20 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F341C3F73B; Thu, 28 Apr 2022 05:29:19 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Cristian Marussi Subject: [PATCH] firmware: arm_scmi: Set clock latency to U32_MAX if it is not supported Date: Thu, 28 Apr 2022 13:29:13 +0100 Message-Id: <20220428122913.1654821-1-sudeep.holla@arm.com> X-Mailer: git-send-email 2.36.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220428_052921_925404_E68DB6D0 X-CRM114-Status: GOOD ( 11.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As per the spec, the clock_enable_delay is the worst case latency incurred by the platform to enable the clock. The value of 0 indicates that the platform doesn't support the same and must be considered as maximum latency for practical purposes. Currently the value of 0 is assigned as is and is propogated to the clock framework which can assume that the clock can support atomic enable operation. Fixes: 18f295b758b2 ("firmware: arm_scmi: Add support for clock_enable_latency") Signed-off-by: Sudeep Holla --- drivers/firmware/arm_scmi/clock.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/clock.c index 7a031afff389..2460979eabd2 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -6,6 +6,7 @@ */ #include +#include #include #include "protocols.h" @@ -128,12 +129,13 @@ static int scmi_clock_attributes_get(const struct scmi_protocol_handle *ph, ret = ph->xops->do_xfer(ph, t); if (!ret) { + u32 latency; attributes = le32_to_cpu(attr->attributes); strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE); /* Is optional field clock_enable_latency provided ? */ if (t->rx.len == sizeof(*attr)) - clk->enable_latency = - le32_to_cpu(attr->clock_enable_latency); + latency = le32_to_cpu(attr->clock_enable_latency); + clk->enable_latency = latency ? : U32_MAX; } ph->xops->xfer_put(ph, t);