From patchwork Fri Apr 29 13:42:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 12832039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5C56DC433F5 for ; Fri, 29 Apr 2022 13:42:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A47510E7EA; Fri, 29 Apr 2022 13:42:36 +0000 (UTC) Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF09410E7C5 for ; Fri, 29 Apr 2022 13:42:34 +0000 (UTC) Received: by mail-wr1-x434.google.com with SMTP id e2so10856232wrh.7 for ; Fri, 29 Apr 2022 06:42:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aTd+/pECV6NSOIhEuI8NCd8sCwReiGIC8r7J1qqOlXM=; b=n3WcCO6f2Q7HGbHdmbhk0D6t4Do4Vbp6Ci3AKwixvdNUjNZeQaL+3ZOdn98aTHO5v3 HW9kjHvw7SCQerJj7DKG10gkN3Bq5W/HLIzufmo0tyfioJilH80Nb8s6/dO7m4XNaBt/ 9tFDUV9uvvUiyr/dWVPZfhgq0Voj7ILZ97Ce7XdbzSJncSNGtZ9gISOcxyhGRh7zi3P4 pNpV0CndHgovCmS9rJznN1u2D0tjB6BHpzgKt24pWfclw+qTax41CnuxtyIrL3LIfHMj +O1VNZg82oPTpaRM3Pdt7YCM0vs4Rci2tgwGZpCt1reUseyjZ+C+do8uB1rmnkWIiiBR zH5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=aTd+/pECV6NSOIhEuI8NCd8sCwReiGIC8r7J1qqOlXM=; b=lFQjN5QSADn35imYAi0CncWA4Ow6GIUqNzqlvx854FtYf5D2jW+UWZ90UJxVmLdaD0 /a8482WiIzHVNuC6LjqnSpOr78FfdARPFwanbRvsqhw6XVMvrNuGhWGD3BGya/IQ9zLe Vn3GYrioEN7DK1PswHkwkh5KGTFPkeQP8xAlLlEZxdMy/Ftj6lGU0KnsJVJrw8vdmZbh PwLa7pWQ/IrTyzU9G79a8TnmOPhG60gi/vC7Dhb276xfEkh+Amg6DtMaHZFQTA9TIpjf 0Hr2fKY2A+BfqQau81WLNqnBRCSjVdDqkrsvQ23Vn552CBd6EwY8oWQ9+yl4ctC+cCQT x2RA== X-Gm-Message-State: AOAM533/z3fhyqsXGMKb6aR/uDG5uJaytKAnLLF3DYHhz3WQswKsCX6X jzv0KHWJsC0dKcgdYt9FbAeXtVJoYcI= X-Google-Smtp-Source: ABdhPJxXXNnNlmCYwzHUUieTX3zr2jdIKipdBAt5eBKJJGHmNGhXEQIB7+SQz3oQcgSF8kah1hjRug== X-Received: by 2002:a5d:6792:0:b0:20a:d352:10de with SMTP id v18-20020a5d6792000000b0020ad35210demr25751218wru.326.1651239753249; Fri, 29 Apr 2022 06:42:33 -0700 (PDT) Received: from able.fritz.box (p57b0b9e1.dip0.t-ipconnect.de. [87.176.185.225]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm7301227wmq.2.2022.04.29.06.42.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Apr 2022 06:42:32 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: daniel.vetter@ffwll.ch, dri-devel@lists.freedesktop.org Subject: [PATCH 1/4] drm: handle kernel fences in drm_gem_plane_helper_prepare_fb v2 Date: Fri, 29 Apr 2022 15:42:27 +0200 Message-Id: <20220429134230.24334-1-christian.koenig@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Christian_K=C3=B6nig?= , Thomas Zimmermann Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" drm_gem_plane_helper_prepare_fb() was using drm_atomic_set_fence_for_plane() which ignores all implicit fences when an explicit fence is already set. That's rather unfortunate when the fb still has a kernel fence we need to wait for to avoid presenting garbage on the screen. So instead update the fence in the plane state directly. While at it also take care of all potential GEM objects and not just the first one. Also remove the now unused drm_atomic_set_fence_for_plane() function, new drivers should probably use the atomic helpers directly. v2: improve kerneldoc, use local variable and num_planes, WARN_ON_ONCE on missing planes. Signed-off-by: Christian König Reviewed-by: Daniel Vetter (v1) Acked-by: Thomas Zimmermann --- drivers/gpu/drm/drm_atomic_uapi.c | 47 ++-------------- drivers/gpu/drm/drm_gem_atomic_helper.c | 73 +++++++++++++++++++------ include/drm/drm_atomic_uapi.h | 2 - include/drm/drm_plane.h | 4 +- 4 files changed, 62 insertions(+), 64 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index c6394ba13b24..434f3d4cb8a2 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -254,43 +254,6 @@ drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state, } EXPORT_SYMBOL(drm_atomic_set_fb_for_plane); -/** - * drm_atomic_set_fence_for_plane - set fence for plane - * @plane_state: atomic state object for the plane - * @fence: dma_fence to use for the plane - * - * Helper to setup the plane_state fence in case it is not set yet. - * By using this drivers doesn't need to worry if the user choose - * implicit or explicit fencing. - * - * This function will not set the fence to the state if it was set - * via explicit fencing interfaces on the atomic ioctl. In that case it will - * drop the reference to the fence as we are not storing it anywhere. - * Otherwise, if &drm_plane_state.fence is not set this function we just set it - * with the received implicit fence. In both cases this function consumes a - * reference for @fence. - * - * This way explicit fencing can be used to overrule implicit fencing, which is - * important to make explicit fencing use-cases work: One example is using one - * buffer for 2 screens with different refresh rates. Implicit fencing will - * clamp rendering to the refresh rate of the slower screen, whereas explicit - * fence allows 2 independent render and display loops on a single buffer. If a - * driver allows obeys both implicit and explicit fences for plane updates, then - * it will break all the benefits of explicit fencing. - */ -void -drm_atomic_set_fence_for_plane(struct drm_plane_state *plane_state, - struct dma_fence *fence) -{ - if (plane_state->fence) { - dma_fence_put(fence); - return; - } - - plane_state->fence = fence; -} -EXPORT_SYMBOL(drm_atomic_set_fence_for_plane); - /** * drm_atomic_set_crtc_for_connector - set CRTC for connector * @conn_state: atomic state object for the connector @@ -1077,10 +1040,10 @@ int drm_atomic_set_property(struct drm_atomic_state *state, * * As a contrast, with implicit fencing the kernel keeps track of any * ongoing rendering, and automatically ensures that the atomic update waits - * for any pending rendering to complete. For shared buffers represented with - * a &struct dma_buf this is tracked in &struct dma_resv. - * Implicit syncing is how Linux traditionally worked (e.g. DRI2/3 on X.org), - * whereas explicit fencing is what Android wants. + * for any pending rendering to complete. This is usually tracked in &struct + * dma_resv which can also contain mandatory kernel fences. Implicit syncing + * is how Linux traditionally worked (e.g. DRI2/3 on X.org), whereas explicit + * fencing is what Android wants. * * "IN_FENCE_FD”: * Use this property to pass a fence that DRM should wait on before @@ -1095,7 +1058,7 @@ int drm_atomic_set_property(struct drm_atomic_state *state, * * On the driver side the fence is stored on the @fence parameter of * &struct drm_plane_state. Drivers which also support implicit fencing - * should set the implicit fence using drm_atomic_set_fence_for_plane(), + * should extract the implicit fence using drm_gem_plane_helper_prepare_fb(), * to make sure there's consistent behaviour between drivers in precedence * of implicit vs. explicit fencing. * diff --git a/drivers/gpu/drm/drm_gem_atomic_helper.c b/drivers/gpu/drm/drm_gem_atomic_helper.c index a6d89aed0bda..a5026f617739 100644 --- a/drivers/gpu/drm/drm_gem_atomic_helper.c +++ b/drivers/gpu/drm/drm_gem_atomic_helper.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include +#include #include #include @@ -137,29 +138,67 @@ * * This function is the default implementation for GEM drivers of * &drm_plane_helper_funcs.prepare_fb if no callback is provided. - * - * See drm_atomic_set_fence_for_plane() for a discussion of implicit and - * explicit fencing in atomic modeset updates. */ -int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) +int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, + struct drm_plane_state *state) { - struct drm_gem_object *obj; - struct dma_fence *fence; + struct dma_fence *fence = dma_fence_get(state->fence); + enum dma_resv_usage usage; + size_t i; int ret; if (!state->fb) return 0; - obj = drm_gem_fb_get_obj(state->fb, 0); - ret = dma_resv_get_singleton(obj->resv, DMA_RESV_USAGE_WRITE, &fence); - if (ret) - return ret; - - /* TODO: drm_atomic_set_fence_for_plane() should be changed to be able - * to handle more fences in general for multiple BOs per fb. + /* + * Only add the kernel fences here if there is already a fence set via + * explicit fencing interfaces on the atomic ioctl. + * + * This way explicit fencing can be used to overrule implicit fencing, + * which is important to make explicit fencing use-cases work: One + * example is using one buffer for 2 screens with different refresh + * rates. Implicit fencing will clamp rendering to the refresh rate of + * the slower screen, whereas explicit fence allows 2 independent + * render and display loops on a single buffer. If a driver allows + * obeys both implicit and explicit fences for plane updates, then it + * will break all the benefits of explicit fencing. */ - drm_atomic_set_fence_for_plane(state, fence); + usage = fence ? DMA_RESV_USAGE_KERNEL : DMA_RESV_USAGE_WRITE; + + for (i = 0; i < state->fb->format->num_planes; ++i) { + struct drm_gem_object *obj = drm_gem_fb_get_obj(state->fb, i); + struct dma_fence *new; + + if (WARN_ON_ONCE(!obj)) + continue; + + ret = dma_resv_get_singleton(obj->resv, usage, &new); + if (ret) + goto error; + + if (new && fence) { + struct dma_fence_chain *chain = dma_fence_chain_alloc(); + + if (!chain) { + ret = -ENOMEM; + goto error; + } + + dma_fence_chain_init(chain, fence, new, 1); + fence = &chain->base; + + } else if (new) { + fence = new; + } + } + + dma_fence_put(state->fence); + state->fence = fence; return 0; + +error: + dma_fence_put(fence); + return ret; } EXPORT_SYMBOL_GPL(drm_gem_plane_helper_prepare_fb); @@ -168,13 +207,13 @@ EXPORT_SYMBOL_GPL(drm_gem_plane_helper_prepare_fb); * @pipe: Simple display pipe * @plane_state: Plane state * - * This function uses drm_gem_plane_helper_prepare_fb() to extract the exclusive fence - * from &drm_gem_object.resv and attaches it to plane state for the atomic + * This function uses drm_gem_plane_helper_prepare_fb() to extract the fences + * from &drm_gem_object.resv and attaches them to the plane state for the atomic * helper to wait on. This is necessary to correctly implement implicit * synchronization for any buffers shared as a struct &dma_buf. Drivers can use * this as their &drm_simple_display_pipe_funcs.prepare_fb callback. * - * See drm_atomic_set_fence_for_plane() for a discussion of implicit and + * See drm_gem_plane_helper_prepare_fb() for a discussion of implicit and * explicit fencing in atomic modeset updates. */ int drm_gem_simple_display_pipe_prepare_fb(struct drm_simple_display_pipe *pipe, diff --git a/include/drm/drm_atomic_uapi.h b/include/drm/drm_atomic_uapi.h index 8cec52ad1277..4c6d39d7bdb2 100644 --- a/include/drm/drm_atomic_uapi.h +++ b/include/drm/drm_atomic_uapi.h @@ -49,8 +49,6 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state, struct drm_crtc *crtc); void drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state, struct drm_framebuffer *fb); -void drm_atomic_set_fence_for_plane(struct drm_plane_state *plane_state, - struct dma_fence *fence); int __must_check drm_atomic_set_crtc_for_connector(struct drm_connector_state *conn_state, struct drm_crtc *crtc); diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 2628c7cde2da..89ea54652e87 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -74,9 +74,7 @@ struct drm_plane_state { * * Optional fence to wait for before scanning out @fb. The core atomic * code will set this when userspace is using explicit fencing. Do not - * write this field directly for a driver's implicit fence, use - * drm_atomic_set_fence_for_plane() to ensure that an explicit fence is - * preserved. + * write this field directly for a driver's implicit fence. * * Drivers should store any implicit fence in this from their * &drm_plane_helper_funcs.prepare_fb callback. See drm_gem_plane_helper_prepare_fb() From patchwork Fri Apr 29 13:42:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 12832040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B401C433FE for ; Fri, 29 Apr 2022 13:42:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BCAE310E887; Fri, 29 Apr 2022 13:42:39 +0000 (UTC) Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5302D10E7C5 for ; Fri, 29 Apr 2022 13:42:36 +0000 (UTC) Received: by mail-wr1-x431.google.com with SMTP id t6so10868906wra.4 for ; Fri, 29 Apr 2022 06:42:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=paocEfPgSqu67n8KLHsQSQJ/DJyKOx4pTU1l0q+u0sU=; b=N4XnacrlIJOl6lbyMFacQ/g97VTDThQBnICB4g/Fmk/a+pS7Hmsk5RtzyOVO2kwReF Xckyvar8y4RjkB/KelgpQWHjALa/9a3dAZJ6u66ll3udfdqlzfj9D9tOer18XZZiWGlL XKCk9Xh7as7dsLBT4tEXefknzo8GHlPOeHvpPE5AXqsHZOpEdvEQw2JF3RyacmitZ/x1 nbdPzKfu8pfwew9P871Qzxm0r2an5/gF+jOqqqKSSvbxMcOLzr7RWamSj9xJTP+q4LGG IQYEYYpxZgBOrKldP+21gi9i2x9dOFqwKwR0woYp7ZLQVzve1NpCD7lNBq8fN40xtTIA E4SA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=paocEfPgSqu67n8KLHsQSQJ/DJyKOx4pTU1l0q+u0sU=; b=pCbHFPInQHZaxXk2ucAld8arx8oNhFycr9tw7RNDxibihPiw9QFnJiHyt/y7CUNCID /vomrQ746oZKEhYQX6+5yll5kgv3duDJIHCPk0iW2bxbCCkQoFVnTaWvCW1BNCu+vmOR yPpmAThIkjnHQgs0ufLMKsajW36eaa/G7hvEs0frPXN56enSroKMBE7zGLgHXGaH+7aG G2rFclHsm1WS4QaX1qtaYQiq38t+IlaiCilTh73gD3cEVHZVUTIpSHolxSOxsteMQpXu VEKgysTLsf1kDW8Kp+hxpjVuxZlXQVu2y78z1rbot6t55lyc6CeTuTDHNjxL3Wr8MvLf 6h+A== X-Gm-Message-State: AOAM531WmAppYw2oNsz61Cy+G1XgARpKrdj310CaixRJ2dlPLQVBtTQX vL7X1ZOoCb+Cv8nxLEDXC2U= X-Google-Smtp-Source: ABdhPJyHI041pR2Dq3wOBlJ9sXcyhHQY2T4xGD0ZA9ykU0mBZ/t1N0FApdXaJUACIB4uzTN5SoQb4w== X-Received: by 2002:a5d:678b:0:b0:20a:db0b:7395 with SMTP id v11-20020a5d678b000000b0020adb0b7395mr21449321wru.668.1651239754784; Fri, 29 Apr 2022 06:42:34 -0700 (PDT) Received: from able.fritz.box (p57b0b9e1.dip0.t-ipconnect.de. [87.176.185.225]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm7301227wmq.2.2022.04.29.06.42.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Apr 2022 06:42:33 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: daniel.vetter@ffwll.ch, dri-devel@lists.freedesktop.org Subject: [PATCH 2/4] drm/amdgpu: switch DM to atomic fence helpers Date: Fri, 29 Apr 2022 15:42:28 +0200 Message-Id: <20220429134230.24334-2-christian.koenig@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220429134230.24334-1-christian.koenig@amd.com> References: <20220429134230.24334-1-christian.koenig@amd.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jude Shih , Qingqing Zhuo , Rodrigo Siqueira , Roman Li , Nicholas Kazlauskas , Wayne Lin , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This gives us the standard atomic implicit and explicit fencing rules. Signed-off-by: Christian König Cc: Harry Wentland Cc: Nicholas Kazlauskas Cc: Roman Li Cc: Qingqing Zhuo Cc: Jude Shih Cc: Wayne Lin Cc: Rodrigo Siqueira Reviewed-by: Daniel Vetter --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 ++++++++----------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 2ade82cfb1ac..c5b2417adcc6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -83,6 +83,7 @@ #include #include #include +#include #if defined(CONFIG_DRM_AMD_DC_DCN) #include "ivsrcid/dcn/irqsrcs_dcn_1_0.h" @@ -7627,6 +7628,10 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, goto error_unpin; } + r = drm_gem_plane_helper_prepare_fb(plane, new_state); + if (unlikely(r != 0)) + goto error_unpin; + amdgpu_bo_unreserve(rbo); afb->address = amdgpu_bo_gpu_offset(rbo); @@ -9160,7 +9165,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, struct dm_crtc_state *dm_old_crtc_state = to_dm_crtc_state(drm_atomic_get_old_crtc_state(state, pcrtc)); int planes_count = 0, vpos, hpos; - long r; unsigned long flags; struct amdgpu_bo *abo; uint32_t target_vblank, last_flip_vblank; @@ -9173,6 +9177,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, struct dc_flip_addrs flip_addrs[MAX_SURFACES]; struct dc_stream_update stream_update; } *bundle; + int r; bundle = kzalloc(sizeof(*bundle), GFP_KERNEL); @@ -9181,6 +9186,10 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, goto cleanup; } + r = drm_atomic_helper_wait_for_fences(dev, state, false); + if (unlikely(r)) + DRM_ERROR("Waiting for fences timed out!"); + /* * Disable the cursor first if we're disabling all the planes. * It'll remain on the screen after the planes are re-enabled @@ -9235,18 +9244,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, } abo = gem_to_amdgpu_bo(fb->obj[0]); - - /* - * Wait for all fences on this FB. Do limited wait to avoid - * deadlock during GPU reset when this fence will not signal - * but we hold reservation lock for the BO. - */ - r = dma_resv_wait_timeout(abo->tbo.base.resv, - DMA_RESV_USAGE_WRITE, false, - msecs_to_jiffies(5000)); - if (unlikely(r <= 0)) - DRM_ERROR("Waiting for fences timed out!"); - fill_dc_plane_info_and_addr( dm->adev, new_plane_state, afb->tiling_flags, From patchwork Fri Apr 29 13:42:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 12832041 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CBF3C433EF for ; Fri, 29 Apr 2022 13:42:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE51110EC3B; Fri, 29 Apr 2022 13:42:40 +0000 (UTC) Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by gabe.freedesktop.org (Postfix) with ESMTPS id 362B210E887 for ; Fri, 29 Apr 2022 13:42:37 +0000 (UTC) Received: by mail-wr1-x431.google.com with SMTP id k2so10859239wrd.5 for ; Fri, 29 Apr 2022 06:42:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+0RT6wkMwjHddK5IvHEpRi9BBKSKu9G1PdCalYT+pBI=; b=BldXf8IcqKrXADPsoQqlGMMFC3sG+u2Xv8G8//5oRRFCHoHSOXEaeZIazhRO5q5BUC amuXGaPGXmlznHhoLBCssZNqfhPyK0ry8iG6BrtaQFuaLmbEZ/MgywF/pAVrOSUHX/UQ Wqy6dfNLosCWZnenxIScVppt6btO/HW8UcPZRNSrVJ7Hi+0JJD76WAFNfuXx5Hmk54yH 2InJbm6+Wp/bGeJQcLspO8g4u6Vj4vBH2038Y8bt5VbRS3XGNvvqjeVhjxzpXdljrnZC j3wsIM889sBOYbxSoj/EnVZDznQ4GxyKzfkh0ug3pnbRl7tfYaSkV5jGOgAfAbc5NKrt hz1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+0RT6wkMwjHddK5IvHEpRi9BBKSKu9G1PdCalYT+pBI=; b=lzlN9rkn8I6qNNBeTpYrtAz507fCEeQnLvrmQS8RQP9Gwp9f9QbQ7nAarppeSnLrkD qabluiiXsrdxvZ14XzYfgIK7THW4Pp2rExtjNg+xx1ZbiiHzMFfDUk8QQWtkwcR7cJM/ npnnUfOMKmP+gZ46mr9pXSYgUXqXm+IyIYRKl/xcgTExW3AIymLoiB/AtTBVqBH4Xk8I eS+lOwruYqE5VZTvYHGNBmvih4e2kvInUBwKPRhmyHNPyUUjPm42HmERyYHq8yEzUPQv vrNHmoLqGzV2y9G7KJD8t98g+CKTWF9Cve/Uc9oVnLBeJathh9RwSUHmF34cx36e1gOJ 0i7Q== X-Gm-Message-State: AOAM5310dDGKgSYkd4CGUjisd48WK6mIkSgyCPcK/5yzRV+07qVWjNfV D82XvpODlnRgS5budrsKmCo= X-Google-Smtp-Source: ABdhPJypa2lUBF3qjxgPDH/DlljKKnKMy4Scpo6bEJgMdKbZ8PzxYtyk596rTwAMQNWfb0PMWh2IXQ== X-Received: by 2002:a5d:6481:0:b0:20c:40dd:59f5 with SMTP id o1-20020a5d6481000000b0020c40dd59f5mr5200278wri.230.1651239755829; Fri, 29 Apr 2022 06:42:35 -0700 (PDT) Received: from able.fritz.box (p57b0b9e1.dip0.t-ipconnect.de. [87.176.185.225]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm7301227wmq.2.2022.04.29.06.42.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Apr 2022 06:42:35 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: daniel.vetter@ffwll.ch, dri-devel@lists.freedesktop.org Subject: [PATCH 3/4] drm/nouveau: use drm_gem_plane_helper_prepare_fb Date: Fri, 29 Apr 2022 15:42:29 +0200 Message-Id: <20220429134230.24334-3-christian.koenig@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220429134230.24334-1-christian.koenig@amd.com> References: <20220429134230.24334-1-christian.koenig@amd.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Ripard , =?utf-8?q?Christian_K=C3=B6nig?= , Karol Herbst , Ben Skeggs Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Instead of manually adjusting the plane state. Signed-off-by: Christian König Cc: Karol Herbst Cc: Lyude Paul Cc: Ben Skeggs Cc: Maxime Ripard Reviewed-by: Lyude Paul --- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/nouveau/dispnv50/wndw.c index 8642b84ea20c..bb8a4601e0d9 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c +++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c @@ -32,6 +32,7 @@ #include #include +#include #include #include "nouveau_bo.h" @@ -558,9 +559,7 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state) asyw->image.handle[0] = ctxdma->object.handle; } - ret = dma_resv_get_singleton(nvbo->bo.base.resv, - DMA_RESV_USAGE_WRITE, - &asyw->state.fence); + ret = drm_gem_plane_helper_prepare_fb(plane, state); if (ret) return ret; From patchwork Fri Apr 29 13:42:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 12832042 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2E96C433F5 for ; Fri, 29 Apr 2022 13:42:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B529110EC55; Fri, 29 Apr 2022 13:42:40 +0000 (UTC) Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4FC6110ED35; Fri, 29 Apr 2022 13:42:38 +0000 (UTC) Received: by mail-wr1-x432.google.com with SMTP id e2so10856441wrh.7; Fri, 29 Apr 2022 06:42:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LNM1AEcQA1TC9gdIDYx11HgLW6iNh6oI5PWYGXlZlcE=; b=p/2OcZKTlgGP3GKgPfjNkt19DmFAK1dTdwQk5tAt0UhUE0cUd2X+fBDeOjf+Ffhe20 r8F0++xJoGDy/lMVhaIPOSxtSuqyIcMOJ9HBLV9NNr7ObSnlU/diKZ9ipcFVjv+TTqwY HE/caSuK0kXPP4K+O8GyFhmXAMiv904Z47g6SsMj2bYVIX2t8W2ahVQId9UJdCHOXHE8 2U49sCmK/Nk/Tc6wLGAUPWscFd7MfUUBsdWJApCLS9hINYejWXiyU5eYW/MRgg3YVVVP 2ZzMvonSIH2W5qf9YEGGIDN+6ilSubR8i/SSkOWBWbqb76P1XR13wDBLfICZ2vArmoJZ b12A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LNM1AEcQA1TC9gdIDYx11HgLW6iNh6oI5PWYGXlZlcE=; b=5e+R2TBDWa1MaZtN7Hds9JnXo3RLuCZgQnnOV2nrYMIwcUyFicMvRLMPlZe3I+GWyO AW7P4BiqZIUOowRcngMq78JKSE01Jvt5t2O1SoRWSXjM2JgEs+zjkcwhkqkeAT7lH4Kg 1ciApGF9X06O0j5f6ZPXek8G4AEerh0+buUw7EebiFVWmz3rdJ+eTjA+Crxkq4/z7xfR f/bN7NBMWjXaeYMqlNh2mT3kdrCCT+mNDhbV5oAhDlAsEtMnajFPAEaTERIgv/7IQHjc o4QoQVLgyW9JJZ+BP1dxVy3jkhOyF1CghTRLjcSIAHZJBgFLODSlukkHIRpqwd5jsJgl +eBQ== X-Gm-Message-State: AOAM532fAd3azCRRRcVQg2DaYvOnPY+q5a+l/zqomuC49grV1oE66rIw E9acc7oP+VbTcuIJDOoGaCI= X-Google-Smtp-Source: ABdhPJwU7PzmmCxcteLi5KWHy5fqWgZ5rFNEm/7Iy4Q7eBRKgkHL9WPdF7q8HZOW2aG5+mwxhSn5aw== X-Received: by 2002:a5d:5966:0:b0:20a:e810:5e9d with SMTP id e38-20020a5d5966000000b0020ae8105e9dmr14033832wri.240.1651239756938; Fri, 29 Apr 2022 06:42:36 -0700 (PDT) Received: from able.fritz.box (p57b0b9e1.dip0.t-ipconnect.de. [87.176.185.225]) by smtp.gmail.com with ESMTPSA id u19-20020a05600c19d300b00393f081d49fsm7301227wmq.2.2022.04.29.06.42.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Apr 2022 06:42:36 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: daniel.vetter@ffwll.ch, dri-devel@lists.freedesktop.org Subject: [PATCH 4/4] drm/qxl: add drm_gem_plane_helper_prepare_fb Date: Fri, 29 Apr 2022 15:42:30 +0200 Message-Id: <20220429134230.24334-4-christian.koenig@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220429134230.24334-1-christian.koenig@amd.com> References: <20220429134230.24334-1-christian.koenig@amd.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: spice-devel@lists.freedesktop.org, Dave Airlie , virtualization@lists.linux-foundation.org, =?utf-8?q?Christian_K=C3=B6nig?= , Gerd Hoffmann Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We could need to wait for the pin to complete here. Signed-off-by: Christian König Cc: Dave Airlie Cc: Gerd Hoffmann Cc: virtualization@lists.linux-foundation.org Cc: spice-devel@lists.freedesktop.org Reviewed-by: Daniel Vetter --- drivers/gpu/drm/qxl/qxl_display.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c index 9a9c29b1d3e1..9a64fa4c7530 100644 --- a/drivers/gpu/drm/qxl/qxl_display.c +++ b/drivers/gpu/drm/qxl/qxl_display.c @@ -34,6 +34,7 @@ #include #include #include +#include #include "qxl_drv.h" #include "qxl_object.h" @@ -829,6 +830,7 @@ static int qxl_plane_prepare_fb(struct drm_plane *plane, struct qxl_device *qdev = to_qxl(plane->dev); struct drm_gem_object *obj; struct qxl_bo *user_bo; + int ret; if (!new_state->fb) return 0; @@ -852,7 +854,11 @@ static int qxl_plane_prepare_fb(struct drm_plane *plane, qxl_free_cursor(old_cursor_bo); } - return qxl_bo_pin(user_bo); + ret = qxl_bo_pin(user_bo); + if (ret) + return ret; + + return drm_gem_plane_helper_prepare_fb(plane, new_state); } static void qxl_plane_cleanup_fb(struct drm_plane *plane,