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Date: Sat, 30 Apr 2022 14:49:03 +0300 Message-ID: <20220430114905.53448-2-michaelsh@nvidia.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20220430114905.53448-1-michaelsh@nvidia.com> References: <20220430114905.53448-1-michaelsh@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7f0765ab-e918-448d-29f4-08da2a9f7298 X-MS-TrafficTypeDiagnostic: CY4PR1201MB0054:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5wvSe2kMlQB1D7u2hGGBtsxV9Z8DcRXBX8kPUCKCnPqHJLjNNipY1u6Sng1fRhLzv5gvdz2DHqwXwrxgdKxgasx60YOyhJcfCHN95R3SM4ko5KEfJNZEa/x+lAcCKUMSSSdKshWJHYaZfwOMVbCwCEe8Am1tkMVNt38eU6Oa4dsi7A81Khn7zQj/DH7QdpY2TNQLVdsmtRM163wPjKP/R6xcec1wcPiX8+g7XHUr0my03cqIrlmwBg2quPOVAyfVrFh99FyztN8vdKNRDIy6UgcuYgLmQ2pLDslIxd2uDNoYrfDM5k9WPrZp2YkVr31TUtCzij8QDp5bXEbIC4uUxVGtc4KkTs1gHagbvTffROlDKWCC1+/9dRoZIqNMPWf9MN549HxhK10nv8LsZoaOOT2tUPKDIP3Ul0c9Ik/pEVeyIYYXXxBNWPz2NBnmChflk2kVWmux8DxZqGqqsdip81GCvTZc66RYuqq9Auo6s7uEIi6NUYrJE/QV97+u+Ia4bDDXzRgbbSRoZhv5CRx5lCXdw0G7fRMsKmJ9501Qdx3wvglZ7PlvYZ2rKCJWNfuFZwCfmn0zVQFuo1jtHFWWTlENH1IfCDQnTJOgAaeyGPKxGoZzIBDcscp4RSkaAjbjFH32KcaH2jiEUBPCrrQh4RQnhHWWkHtUOPmPZ30e0IDxWwYNt85U0ORdJ/HcuSRZYuobhXqR4qyCeAvcyYL/1w== X-Forefront-Antispam-Report: CIP:12.22.5.238;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(2616005)(36756003)(5660300002)(47076005)(1076003)(107886003)(356005)(70586007)(4326008)(70206006)(83380400001)(186003)(8676002)(36860700001)(8936002)(426003)(336012)(30864003)(2876002)(26005)(2906002)(40460700003)(508600001)(82310400005)(6666004)(81166007)(316002)(86362001)(54906003)(110136005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2022 11:49:13.5525 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7f0765ab-e918-448d-29f4-08da2a9f7298 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.238];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT045.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB0054 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org From: Michael Shych Add driver for Microchip EMC2301/2/3/5 RPM-based PWM Fan Speed Controller. Modify Makefile and Kconfig to support Microchip EMC2305 RPM-based PWM Fan Speed Controller. Signed-off-by: Michael Shych Reviewed-by: Vadim Pasternak --- drivers/hwmon/Kconfig | 13 + drivers/hwmon/Makefile | 1 + drivers/hwmon/emc2305.c | 629 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 643 insertions(+) create mode 100644 drivers/hwmon/emc2305.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 85c22bba439b..3c25ba0e6ef7 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1750,6 +1750,19 @@ config SENSORS_EMC2103 This driver can also be built as a module. If so, the module will be called emc2103. +config SENSORS_EMC2305 + tristate "Microchip EMC2305 and compatible EMC2301/2/3" + depends on I2C + imply THERMAL + help + If you say yes here you get support for the Microchip EMC2305 + fan controller chips. + The Microchip EMC2305 is a fan controller for up to 5 fans. + Fan rotation speeds are reported in RPM. + + This driver can also be built as a module. If so, the module + will be called emc2305. + config SENSORS_EMC6W201 tristate "SMSC EMC6W201" depends on I2C diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 93f2b774cc5e..e2238c207ef4 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_SENSORS_DS620) += ds620.o obj-$(CONFIG_SENSORS_DS1621) += ds1621.o obj-$(CONFIG_SENSORS_EMC1403) += emc1403.o obj-$(CONFIG_SENSORS_EMC2103) += emc2103.o +obj-$(CONFIG_SENSORS_EMC2305) += emc2305.o obj-$(CONFIG_SENSORS_EMC6W201) += emc6w201.o obj-$(CONFIG_SENSORS_F71805F) += f71805f.o obj-$(CONFIG_SENSORS_F71882FG) += f71882fg.o diff --git a/drivers/hwmon/emc2305.c b/drivers/hwmon/emc2305.c new file mode 100644 index 000000000000..5c896fdfc525 --- /dev/null +++ b/drivers/hwmon/emc2305.c @@ -0,0 +1,629 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Hardware monitoring driver for EMC2305 fan controller + * + * Copyright (C) 2022 Nvidia Technologies Ltd and Delta Networks, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static const unsigned short +emc2305_normal_i2c[] = { 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d, I2C_CLIENT_END }; + +#define EMC2305_REG_DRIVE_FAIL_STATUS 0x27 +#define EMC2305_REG_DEVICE 0xfd +#define EMC2305_REG_VENDOR 0xfe +#define EMC2305_FAN_MAX 0xff +#define EMC2305_FAN_MIN 0x00 +#define EMC2305_FAN_MAX_STATE 10 +#define EMC2305_DEVICE 0x34 +#define EMC2305_VENDOR 0x5d +#define EMC2305_REG_PRODUCT_ID 0xfd +#define EMC2305_TACH_REGS_UNUSE_BITS 3 +#define EMC2305_TACH_CNT_MULTIPLIER 0x02 +#define EMC2305_PWM_MAX 5 +#define EMC2305_PWM_CHNL_CMN 0 + +#define EMC2305_PWM_DUTY2STATE(duty, max_state, pwm_max) \ + (DIV_ROUND_CLOSEST((duty) * (max_state), (pwm_max))) +#define EMC2305_PWM_STATE2DUTY(state, max_state, pwm_max) \ + (DIV_ROUND_CLOSEST((state) * (pwm_max), (max_state))) + +/* Factor by equations [2] and [3] from data sheet; valid for fans where the number of edges + * equal (poles * 2 + 1). + */ +#define EMC2305_RPM_FACTOR 3932160 + +#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * (n)) +#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * (n)) +#define EMC2305_REG_FAN_TACH(n) (0x3e + 0x10 * (n)) + +enum emc230x_product_id { + EMC2305 = 0x34, + EMC2303 = 0x35, + EMC2302 = 0x36, + EMC2301 = 0x37, +}; + +static const struct i2c_device_id emc2305_ids[] = { + { "emc2305", 0 }, + { "emc2303", 0 }, + { "emc2302", 0 }, + { "emc2301", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_ids); + +static const struct of_device_id emc2305_dt_ids[] = { + { .compatible = "smsc,emc2305" }, + { } +}; +MODULE_DEVICE_TABLE(of, emc2305_dt_ids); + +/** + * @cdev: cooling device; + * @curr_state: cooling current state; + * @last_hwmon_state: last cooling state updated by hwmon subsystem; + * @last_thermal_state: last cooling state updated by thermal subsystem; + * + * The 'last_hwmon_state' and 'last_thermal_state' fields are provided to support fan low limit + * speed feature. The purpose of this feature is to provides ability to limit fan speed + * according to some system wise considerations, like absence of some replaceable units (PSU or + * line cards), high system ambient temperature, unreliable transceivers temperature sensing or + * some other factors which indirectly impacts system's airflow + * Fan low limit feature is supported through 'hwmon' interface: 'hwmon' 'pwm' attribute is + * used for setting low limit for fan speed in case 'thermal' subsystem is configured in + * kernel. In this case setting fan speed through 'hwmon' will never let the 'thermal' + * subsystem to select a lower duty cycle than the duty cycle selected with the 'pwm' + * attribute. + * From other side, fan speed is to be updated in hardware through 'pwm' only in case the + * requested fan speed is above last speed set by 'thermal' subsystem, otherwise requested fan + * speed will be just stored with no PWM update. + */ +struct emc2305_cdev_data { + struct thermal_cooling_device *cdev; + unsigned int cur_state; + unsigned long last_hwmon_state; + unsigned long last_thermal_state; +}; + +/** + * @client: i2c client; + * @hwmon_dev: hwmon device; + * @max_state: maximum cooling state of the cooling device; + * @pwm_max: maximum PWM; + * @pwm_min: minimum PWM; + * @pwm_channel: maximum number of PWM channels; + * @cdev_data: array of cooling devices data; + */ +struct emc2305_data { + struct i2c_client *client; + struct device *hwmon_dev; + u8 max_state; + u8 pwm_max; + u8 pwm_min; + u8 pwm_num; + u8 pwm_channel; + struct emc2305_cdev_data cdev_data[EMC2305_PWM_MAX]; +}; + +static char *emc2305_fan_name[] = { + "emc2305_fan", + "emc2305_fan1", + "emc2305_fan2", + "emc2305_fan3", + "emc2305_fan4", + "emc2305_fan5", +}; + +static int emc2305_get_max_channel(struct emc2305_data *data) +{ + if (data->pwm_channel == EMC2305_PWM_CHNL_CMN) + return data->pwm_num; + else + return data->pwm_channel; +} + +static int emc2305_get_cdev_idx(struct thermal_cooling_device *cdev) +{ + struct emc2305_data *data = cdev->devdata; + size_t len = strlen(cdev->type); + int ret; + + if (len <= 0) + return -EINVAL; + + /* Retuns index of cooling device 0..4 in case of separate PWM setting. + * Zero index is used in case of one common PWM setting. + * If the mode is set as EMC2305_PWM_CHNL_CMN, all PWMs are to be bound + * to the common thermal zone and should work at the same speed + * to perform cooling for the same thermal junction. + * Otherwise, return specific channel that will be used in bound + * related PWM to the thermal zone. + */ + if (data->pwm_channel == EMC2305_PWM_CHNL_CMN) + return 0; + + ret = cdev->type[len - 1]; + switch (ret) { + case '1' ... '5': + return ret - '1'; + default: + break; + } + return -EINVAL; +} + +static int emc2305_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *state) +{ + int cdev_idx; + struct emc2305_data *data = cdev->devdata; + + cdev_idx = emc2305_get_cdev_idx(cdev); + if (cdev_idx < 0) + return cdev_idx; + + *state = data->cdev_data[cdev_idx].cur_state; + return 0; +} + +static int emc2305_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state) +{ + struct emc2305_data *data = cdev->devdata; + *state = data->max_state; + return 0; +} + +static int emc2305_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) +{ + int cdev_idx; + struct emc2305_data *data = cdev->devdata; + struct i2c_client *client = data->client; + u8 val, i; + + if (state > data->max_state) + return -EINVAL; + + cdev_idx = emc2305_get_cdev_idx(cdev); + if (cdev_idx < 0) + return cdev_idx; + + /* Save thermal state. */ + data->cdev_data[cdev_idx].last_thermal_state = state; + state = max_t(unsigned long, state, data->cdev_data[cdev_idx].last_hwmon_state); + + val = EMC2305_PWM_STATE2DUTY(state, data->max_state, data->pwm_max); + if (val > EMC2305_FAN_MAX) + return -EINVAL; + + data->cdev_data[cdev_idx].cur_state = state; + if (data->pwm_channel == EMC2305_PWM_CHNL_CMN) + /* Set the same PWM value in all channels + * if common PWM channel is used. + */ + for (i = 0; i < data->pwm_num; i++) + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(i), val); + else + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(cdev_idx), val); + + return 0; +} + +static const struct thermal_cooling_device_ops emc2305_cooling_ops = { + .get_max_state = emc2305_get_max_state, + .get_cur_state = emc2305_get_cur_state, + .set_cur_state = emc2305_set_cur_state, +}; + +static int emc2305_show_fault(struct device *dev, int channel) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int status_reg; + + status_reg = i2c_smbus_read_byte_data(client, EMC2305_REG_DRIVE_FAIL_STATUS); + return status_reg & (1 << channel) ? 1 : 0; +} + +static int emc2305_show_fan(struct device *dev, int channel) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int ret; + + ret = i2c_smbus_read_word_swapped(client, EMC2305_REG_FAN_TACH(channel)); + if (ret < 0) + return ret; + + ret = ret >> EMC2305_TACH_REGS_UNUSE_BITS; + return EMC2305_RPM_FACTOR * EMC2305_TACH_CNT_MULTIPLIER / (ret > 0 ? ret : 1); +} + +static int emc2305_show_pwm(struct device *dev, int channel) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + + return i2c_smbus_read_byte_data(client, EMC2305_REG_FAN_DRIVE(channel)); +} + +static int emc2305_set_pwm(struct device *dev, long val, int channel) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + + if (val < data->pwm_min || val > data->pwm_max) + return -EINVAL; + + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(channel), val); + data->cdev_data[channel].cur_state = EMC2305_PWM_DUTY2STATE(val, data->max_state, + data->pwm_max); + return 0; +} + +static int emc2305_get_tz_of(struct device *dev) +{ + struct device_node *np = dev->of_node; + struct emc2305_data *data = dev_get_drvdata(dev); + int ret = 0; + + /* OF parameters are optional - overwrite default setting + * if some of them are provided. + */ + + if (of_find_property(np, "emc2305,cooling-levels", NULL)) { + ret = of_property_read_u8(np, "emc2305,cooling-levels", &data->max_state); + if (ret) + return ret; + } + + if (of_find_property(np, "emc2305,pwm-max", NULL)) { + ret = of_property_read_u8(np, "emc2305,pwm-max", &data->pwm_max); + if (ret) + return ret; + } + + if (of_find_property(np, "emc2305,pwm-min", NULL)) { + ret = of_property_read_u8(np, "emc2305,pwm-min", &data->pwm_min); + if (ret) + return ret; + } + + /* Not defined or 0 means one thermal zone over all colling devices. + * Otherwise - separted thermal zones for each PWM channel. + */ + if (of_find_property(np, "emc2305,pwm-channel", NULL)) { + ret = of_property_read_u8(np, "emc2305,pwm-channel", &data->pwm_channel); + if (ret) + return ret; + } + + return ret; +} + +static int emc2305_set_single_tz(struct device *dev, int idx) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + long pwm = data->pwm_max; + int cdev_idx; + + cdev_idx = (idx) ? idx - 1 : 0; + + if (dev->of_node) + data->cdev_data[cdev_idx].cdev = + devm_thermal_of_cooling_device_register(dev, dev->of_node, + emc2305_fan_name[idx], data, + &emc2305_cooling_ops); + else + data->cdev_data[cdev_idx].cdev = + thermal_cooling_device_register(emc2305_fan_name[idx], data, + &emc2305_cooling_ops); + + if (IS_ERR(data->cdev_data[cdev_idx].cdev)) { + dev_err(dev, "Failed to register cooling device %s\n", emc2305_fan_name[idx]); + return PTR_ERR(data->cdev_data[cdev_idx].cdev); + } + emc2305_set_pwm(dev, pwm, cdev_idx); + data->cdev_data[cdev_idx].cur_state = data->max_state; + /* Set minimal PWM speed. */ + data->cdev_data[cdev_idx].last_hwmon_state = EMC2305_PWM_DUTY2STATE(data->pwm_min, + data->max_state, + data->pwm_max); + return 0; +} + +static int emc2305_set_tz(struct device *dev) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + int i, ret; + + if (data->pwm_channel == EMC2305_PWM_CHNL_CMN) + return emc2305_set_single_tz(dev, 0); + + for (i = 0; i < data->pwm_channel; i++) { + ret = emc2305_set_single_tz(dev, i + 1); + if (ret) + goto thermal_cooling_device_register_fail; + } + return 0; + +thermal_cooling_device_register_fail: + emc2305_unset_tz(dev); + return ret; +} + +static void emc2305_unset_tz(struct device *dev) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + int i; + + /* Unregister cooling device in case they have been registered by + * thermal_cooling_device_unregister(). No need for clean-up flow in case they + * have been registered by devm_thermal_of_cooling_device_register() + */ + if (!dev->of_node) { + for (i = 0; i < EMC2305_PWM_MAX; i++) + if (data->cdev_data[i].cdev) + thermal_cooling_device_unregister(data->cdev_data[i].cdev); + } +} + +static umode_t +emc2305_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) +{ + int max_channel = emc2305_get_max_channel((struct emc2305_data *)data); + + /* Don't show channels which are not physically connected. */ + if ((channel + 1) > max_channel) + return 0; + switch (type) { + case hwmon_fan: + switch (attr) { + case hwmon_fan_input: + return 0444; + case hwmon_fan_fault: + return 0444; + default: + break; + } + break; + case hwmon_pwm: + switch (attr) { + case hwmon_pwm_input: + return 0644; + default: + break; + } + break; + default: + break; + } + + return 0; +}; + +static int +emc2305_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) +{ + struct emc2305_data *data = dev_get_drvdata(dev); + + switch (type) { + case hwmon_pwm: + switch (attr) { + case hwmon_pwm_input: + /* If thermal is configured - handle PWM limit setting. */ + if (IS_REACHABLE(CONFIG_THERMAL)) { + data->cdev_data[channel].last_hwmon_state = + EMC2305_PWM_DUTY2STATE(val, data->max_state, data->pwm_max); + /* Update PWM only in case requested state is not less than the + * last thermal state. + */ + if (data->cdev_data[channel].last_hwmon_state >= + data->cdev_data[channel].last_thermal_state) + return emc2305_set_cur_state(data->cdev_data[channel].cdev, + data->cdev_data[channel].last_hwmon_state); + return 0; + } + return emc2305_set_pwm(dev, val, channel); + default: + break; + } + break; + default: + break; + } + + return -EOPNOTSUPP; +}; + +static int +emc2305_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) +{ + int ret; + + switch (type) { + case hwmon_fan: + switch (attr) { + case hwmon_fan_input: + ret = emc2305_show_fan(dev, channel); + if (ret < 0) + return ret; + *val = ret; + return 0; + case hwmon_fan_fault: + ret = emc2305_show_fault(dev, channel); + if (ret < 0) + return ret; + *val = ret; + return 0; + default: + break; + } + break; + case hwmon_pwm: + switch (attr) { + case hwmon_pwm_input: + ret = emc2305_show_pwm(dev, channel); + if (ret < 0) + return ret; + *val = ret; + return 0; + default: + break; + } + break; + default: + break; + } + + return -EOPNOTSUPP; +}; + +static const struct hwmon_ops emc2305_ops = { + .is_visible = emc2305_is_visible, + .read = emc2305_read, + .write = emc2305_write, +}; + +static const struct hwmon_channel_info *emc2305_info[] = { + HWMON_CHANNEL_INFO(fan, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT), + HWMON_CHANNEL_INFO(pwm, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT, + HWMON_PWM_INPUT), + NULL +}; + +static const struct hwmon_chip_info emc2305_chip_info = { + .ops = &emc2305_ops, + .info = emc2305_info, +}; + +static int emc2305_identify(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int ret; + + ret = i2c_smbus_read_byte_data(client, EMC2305_REG_PRODUCT_ID); + if (ret < 0) + return ret; + + switch (ret) { + case EMC2305: + data->pwm_num = 5; + break; + case EMC2303: + data->pwm_num = 3; + break; + case EMC2302: + data->pwm_num = 2; + break; + case EMC2301: + data->pwm_num = 1; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int emc2305_probe(struct i2c_client *client, const struct i2c_device_id *id) +{ + struct i2c_adapter *adapter = client->adapter; + struct device *dev = &client->dev; + struct emc2305_data *data; + int vendor, device; + int ret; + int i; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR); + if (vendor != EMC2305_VENDOR) + return -ENODEV; + + device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE); + if (device != EMC2305_DEVICE) + return -ENODEV; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + data->client = client; + + ret = emc2305_identify(dev); + if (ret) + return ret; + + data->max_state = EMC2305_FAN_MAX_STATE; + data->pwm_max = EMC2305_FAN_MAX; + data->pwm_min = EMC2305_FAN_MIN; + data->pwm_channel = EMC2305_PWM_CHNL_CMN; + if (dev->of_node) { + ret = emc2305_get_tz_of(dev); + if (ret < 0) + return ret; + } + + data->hwmon_dev = devm_hwmon_device_register_with_info(dev, "emc2305", data, + &emc2305_chip_info, NULL); + if (IS_ERR(data->hwmon_dev)) + return PTR_ERR(data->hwmon_dev); + + if (IS_REACHABLE(CONFIG_THERMAL)) { + ret = emc2305_set_tz(dev); + if (ret != 0) + return ret; + } + + for (i = 0; i < data->pwm_num; i++) + i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i), data->pwm_min); + + return 0; +} + +static int emc2305_remove(struct i2c_client *client) +{ + struct device *dev = &client->dev; + + if (IS_REACHABLE(CONFIG_THERMAL)) + emc2305_unset_tz(dev); + return 0; +} + +static struct i2c_driver emc2305_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + .of_match_table = emc2305_dt_ids, + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_ids, + .address_list = emc2305_normal_i2c, +}; + +module_i2c_driver(emc2305_driver); + +MODULE_AUTHOR("Nvidia"); +MODULE_DESCRIPTION("Microchip EMC2305 fan controller driver"); +MODULE_LICENSE("GPL"); From patchwork Sat Apr 30 11:49:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shych X-Patchwork-Id: 12833144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 780E7C433EF for ; Sat, 30 Apr 2022 11:49:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241620AbiD3Lwk (ORCPT ); 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Date: Sat, 30 Apr 2022 14:49:04 +0300 Message-ID: <20220430114905.53448-3-michaelsh@nvidia.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20220430114905.53448-1-michaelsh@nvidia.com> References: <20220430114905.53448-1-michaelsh@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c53762d2-66d3-456f-2e86-08da2a9f73be X-MS-TrafficTypeDiagnostic: BN8PR12MB3603:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bl7fkUl4Cun/4jZMUCnPxwkwJ1mVCvKS2jKfW0Ehu+5qYaB+MWGBvtxmloYx0R4Aw3UWEU69OmEbgmvNCQlk7FIf8hbb7WG3gVt+/8zz5OtX2zFLVji/BGbjvf7FTwq0vVBG8ihaphas3pGmP/sYXfK7Ry/5fOnmF9Ne5zSLQgzT2rb/58T9DA7RzOiJdzJLAVUZstieP7AQmTUknzuOywJNKfa23Pkm7GdP+bNfqt7JMMi8b+Sp209qjhAh9MkwNNJyHYHI49DAobIGP36qJGFhyOVyMOLuKyg6jgVCoYTJ3JtsIIFZgJE+5FUNOn+sz6emQ/xehgZW3T7iLMPoPidoOvyzx3auSi43xu0U6EjwHKe+4rUfWhSz/h6hb/lE1Haiv+i2+fIFp/HFTBehE+uql8eCgOB7N8s8REsXSkEFZKuA8jSBKNEA3akJ0aIBLodA0DQH4ATPrlWz7NaapmGuE5SOyVRgvcEccILnJWfYF8XQyiqDqkjIf+px47zsrcp3zpl7YQGjmQk3H7en2udHWTtuO6bQEMWd99bfHe1Q9HZJnEoQOkzTndwTQkipw69/4Yhjxdj5d4zN7pS+XzieuXrfTdtMNl3prZqH1GyywuZi6hQOKbQJ68JvIi0qn5KpwlSTvUj6dqDBM1k2U/DFqQs8SKwt4M1LRqIhgS/Fr5digZqvChlt8hhM2sS41esT0E1qf7yfN6VWC4jnvTBU+tdH1Ve2uP0xcy1Ql30hWMJq2RBW1NQWoS2igOUebVCVwZCG/zUeH7BXrmfgJwfAP4f3cS/LB2WhkyfZ1fq2/nP2bPJ9oPLn9QT8F9LOS3qwMTk/FBPfeo/WHVHwUA== X-Forefront-Antispam-Report: CIP:12.22.5.234;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(508600001)(36860700001)(966005)(40460700003)(8936002)(110136005)(8676002)(4326008)(86362001)(81166007)(70206006)(70586007)(316002)(2906002)(26005)(2876002)(54906003)(5660300002)(6666004)(336012)(47076005)(2616005)(1076003)(107886003)(426003)(82310400005)(186003)(36756003)(356005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2022 11:49:15.4950 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c53762d2-66d3-456f-2e86-08da2a9f73be X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT036.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB3603 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org From: Michael Shych Add basic description of emc2305 driver device tree binding. Signed-off-by: Michael Shych Reviewed-by: Vadim Pasternak --- .../bindings/hwmon/microchip,emc2305.yaml | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml diff --git a/Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml b/Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml new file mode 100644 index 000000000000..c873172b7268 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/emc2305.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip EMC2305 RPM-based PWM Fan Speed Controller + +properties: + compatible: + enum: + - microcip,emc2305 + + emc2305,pwm-min: + description: + Min pwm of emc2305 + maxItems: 1 + emc2305,pwm-max: + description: + Max pwm of emc2305 + maxItems: 1 + emc2305,pwm-channel: + description: + Max number of pwm channels + maxItems: 1 + emcs205,max-state: + description: + maxItems: 1 + emc2305,cooling-levels: + description: + Quantity of cooling level state. + maxItems: 1 + +required: + - compatible + +optional: + - emc2305,min-pwm + - emc2305,max-pwm + - emc2305,pwm-channels + - emc2305,cooling-levels + +additionalProperties: false + +examples: + - | + fan { + emc2305,compatible = "microchip,emc2305"; + emc2305,pwm-min = <0>; + emc2305,pwm-max = <255>; + emc2305,pwm-channel = <5> + emc2305,cooling-levels = <10>; + }; + From patchwork Sat Apr 30 11:49:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shych X-Patchwork-Id: 12833146 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CDFDC433F5 for ; Sat, 30 Apr 2022 11:51:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232399AbiD3Lyj (ORCPT ); Sat, 30 Apr 2022 07:54:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230444AbiD3Lyj (ORCPT ); Sat, 30 Apr 2022 07:54:39 -0400 Received: from NAM02-DM3-obe.outbound.protection.outlook.com (mail-dm3nam07on2047.outbound.protection.outlook.com [40.107.95.47]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEB691A812; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2022 11:49:17.4523 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d1e09a92-c491-4f2b-768a-08da2a9f74e6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT026.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2539 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org From: Michael Shych Add description of emc2305 driver. Signed-off-by: Michael Shych Reviewed-by: Vadim Pasternak --- Documentation/hwmon/emc2305.rst | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/hwmon/emc2305.rst diff --git a/Documentation/hwmon/emc2305.rst b/Documentation/hwmon/emc2305.rst new file mode 100644 index 000000000000..258da49d18f9 --- /dev/null +++ b/Documentation/hwmon/emc2305.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Kernel driver emc2305 +===================== + +Supported chips: + Microchip EMC2305, EMC2303, EMC2302, EMC2301 + + Addresses scanned: I2C 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d + Prefixes: 'emc2305' + + Datasheet: Publicly available at the Microchip website : + https://www.microchip.com/en-us/product/EMC2305 + +Description: +----------- +This driver implements support for Microchip EMC2301/2/3/5 RPM-based PWM Fan Controller. +The EMC2305 Fan Controller supports up to 5 independently controlled PWM fan drives. +Fan rotation speeds are reported in RPM. +The driver supports the RPM-based PWM control to keep a fan at the desired speed. +The driver provides the possibility to have one common PWM interface for all FANs +or up to the maximum available or configured independent PWMs. + +The driver provides the following sysfs interfaces in hwmon subsystem: + +================= == =================================================== +fan[1-5]_fault RO files for tachometers TACH1-TACH5 fault indication +fan[1-5]_input RO files for tachometers TACH1-TACH5 input (in RPM) +pwm[1-5] RW file for fan[1-5] target duty cycle (0..255) +================= == =================================================== + +sysfs interfaces in thermal subsystem: + +================= == ======================================================================== +cur_state RW file for the current cooling state of the cooling device (0..max_state) +max_state RO file for the maximum cooling state of the cooling device +================= == ======================================================================== + +Configuration is possible via device tree: +Documentation/devicetree/bindings/hwmon/microchip,emc2305.yaml