From patchwork Sun May 1 11:19:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12833630 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8E5BC433F5 for ; Sun, 1 May 2022 11:20:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345690AbiEALXZ (ORCPT ); Sun, 1 May 2022 07:23:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345385AbiEALXZ (ORCPT ); Sun, 1 May 2022 07:23:25 -0400 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 7ECCF5838B; Sun, 1 May 2022 04:19:59 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,189,1647270000"; d="scan'208";a="118512018" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 01 May 2022 20:19:58 +0900 Received: from localhost.localdomain (unknown [10.226.92.14]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id ADE6540062DF; Sun, 1 May 2022 20:19:54 +0900 (JST) From: Biju Das To: Jonathan Cameron , Rob Herring , Krzysztof Kozlowski Cc: Biju Das , Lad Prabhakar , Lars-Peter Clausen , linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Chris Paterson , Biju Das Subject: [PATCH v2] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC Date: Sun, 1 May 2022 12:19:52 +0100 Message-Id: <20220501111952.45872-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore, added a new compatible to handle this difference. Signed-off-by: Biju Das --- v1->v2: * Removed Items and used const for RZ/G2UL compatible * Add allOf:if:then restricting available channels per SoC variant. --- .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++----- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml index d66c24cae1e1..d76c5ba3d625 100644 --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml @@ -17,11 +17,13 @@ description: | properties: compatible: - items: - - enum: - - renesas,r9a07g044-adc # RZ/G2L - - renesas,r9a07g054-adc # RZ/V2L - - const: renesas,rzg2l-adc + oneOf: + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL + - items: + - enum: + - renesas,r9a07g044-adc # RZ/G2L + - renesas,r9a07g054-adc # RZ/V2L + - const: renesas,rzg2l-adc reg: maxItems: 1 @@ -76,10 +78,24 @@ patternProperties: properties: reg: description: | - The channel number. It can have up to 8 channels numbered from 0 to 7. - items: - - minimum: 0 - maximum: 7 + The channel number. It can have up to 8 channels numbered from 0 to 7 + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL + SoC. + allOf: + if: + properties: + compatible: + contains: + enum: + - renesas,renesas,r9a07g043-adc + then: + items: + - minimum: 0 + maximum: 1 + else: + items: + - minimum: 0 + maximum: 7 required: - reg