From patchwork Mon May 2 08:37:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 12833959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D690C433FE for ; Mon, 2 May 2022 08:38:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383806AbiEBIln (ORCPT ); Mon, 2 May 2022 04:41:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383801AbiEBIll (ORCPT ); Mon, 2 May 2022 04:41:41 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79CA4186C6; Mon, 2 May 2022 01:38:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1651480693; x=1683016693; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=1buTesHiWmCC0G3YYiPEe1cVKGbtEcg8SmwiNRSsEsk=; b=dbZbhlFL1uypB6xZZo7i/bxaRRjsomc0jGjlfdeZZ13g/R96Gd6pKFxO 1SUUQ6vBa28qL0cNVedmfftvqkscSbOn+ZqOSKKqVFJZzD4TgdzcQRY6Z 0OMcDbhXkCslhQIN8p9twrEiObwIwOIG+cvFbWaX0ONljvr86UNqumdP8 g=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 02 May 2022 01:38:13 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 May 2022 01:38:11 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 May 2022 14:07:49 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id C8D223BE6; Mon, 2 May 2022 14:07:48 +0530 (+0530) From: Rohit Agarwal To: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, adrian.hunter@intel.com, bhupesh.sharma@linaro.org Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Rohit Agarwal Subject: [PATCH 1/4] dt-bindings: mmc: sdhci-msm: Document the SDX65 compatible Date: Mon, 2 May 2022 14:07:42 +0530 Message-Id: <1651480665-14978-2-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> References: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence, document the compatible with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Rohit Agarwal Acked-by: Rob Herring --- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index da42a88..e423633 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -33,6 +33,7 @@ properties: - qcom,sdm630-sdhci - qcom,sdm845-sdhci - qcom,sdx55-sdhci + - qcom,sdx65-sdhci - qcom,sm6125-sdhci - qcom,sm6350-sdhci - qcom,sm8150-sdhci From patchwork Mon May 2 08:37:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 12833962 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8810C4332F for ; Mon, 2 May 2022 08:38:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383823AbiEBIlp (ORCPT ); Mon, 2 May 2022 04:41:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383826AbiEBIlp (ORCPT ); Mon, 2 May 2022 04:41:45 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 512C9517E1; Mon, 2 May 2022 01:38:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1651480697; x=1683016697; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=O9Bm4+VM0hSsOodPChUSKIHx37h49GrPwg9RzKLBxOY=; b=w490mIBY2XWXnCJlRahQqt8aSRykgj4kIkit+mH4XXnGIcQB/8GinRkX JY+eDYwf2fg5KMpnY3Ec9+KWmgoLk9BiLs8IgtowSECccyJ930aTbiu/k 6NnxwQT/7N3k4l1Emtc53glAp+E31/FfPGoywd3Hu8m5pcXxhH5T2BAfi 8=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 02 May 2022 01:38:17 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 May 2022 01:38:15 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 May 2022 14:07:50 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 3100F3BE8; Mon, 2 May 2022 14:07:49 +0530 (+0530) From: Rohit Agarwal To: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, adrian.hunter@intel.com, bhupesh.sharma@linaro.org Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Rohit Agarwal Subject: [PATCH 2/4] mmc: host/sdhci-msm: Add compatible string check for sdx65 Date: Mon, 2 May 2022 14:07:43 +0530 Message-Id: <1651480665-14978-3-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> References: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add sdx65 SoC specific compatible string check inside qcom 'sdhci-msm' controller driver. Signed-off-by: Rohit Agarwal --- drivers/mmc/host/sdhci-msm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index fd8b4a9..65661ad 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -2453,6 +2453,7 @@ static const struct of_device_id sdhci_msm_dt_match[] = { */ {.compatible = "qcom,qcs404-sdhci", .data = &sdhci_msm_v5_var}, {.compatible = "qcom,sdx55-sdhci", .data = &sdhci_msm_v5_var}, + {.compatible = "qcom,sdx65-sdhci", .data = &sdhci_msm_v5_var}, {.compatible = "qcom,sdm630-sdhci", .data = &sdhci_msm_v5_var}, {.compatible = "qcom,sm6125-sdhci", .data = &sdhci_msm_v5_var}, {.compatible = "qcom,sm6350-sdhci", .data = &sdhci_msm_v5_var}, From patchwork Mon May 2 08:37:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 12833961 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 97081C4167B for ; Mon, 2 May 2022 08:38:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383821AbiEBIlo (ORCPT ); Mon, 2 May 2022 04:41:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383815AbiEBIln (ORCPT ); Mon, 2 May 2022 04:41:43 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9417B193C0; Mon, 2 May 2022 01:38:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1651480695; x=1683016695; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=4sArmmPqK1fpsAra+ctcw1Mg8/kPFO/JwQ40cELNy00=; b=qh+ah4/9QoDHWWb7zFUkIjNRkbR+FW9GZPCB6Q0IFgAtE5aAOX4yaVd0 thfGTglA03Qi/bJuN0XcAYCoO3KBGeZd6i9LOUgQ8C6MDUbeY13O/YBvg mEs7Tt4HCwU96mLGDSBjJAjeoilqJ1CNc7BT6DInPtuipvOCt8PHm/do5 I=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 02 May 2022 01:38:15 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 May 2022 01:38:13 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 May 2022 14:07:50 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 9621E3BE9; Mon, 2 May 2022 14:07:49 +0530 (+0530) From: Rohit Agarwal To: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, adrian.hunter@intel.com, bhupesh.sharma@linaro.org Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Rohit Agarwal Subject: [PATCH 3/4] dt-bindings: arm-smmu: Add binding for SDX65 SMMU Date: Mon, 2 May 2022 14:07:44 +0530 Message-Id: <1651480665-14978-4-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> References: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add devicetree binding for Qualcomm SDX65 SMMU. Signed-off-by: Rohit Agarwal Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index da5381c..1f99bff 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -39,6 +39,7 @@ properties: - qcom,sc8180x-smmu-500 - qcom,sdm845-smmu-500 - qcom,sdx55-smmu-500 + - qcom,sdx65-smmu-500 - qcom,sm6350-smmu-500 - qcom,sm8150-smmu-500 - qcom,sm8250-smmu-500 From patchwork Mon May 2 08:37:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 12833960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63577C4167E for ; Mon, 2 May 2022 08:38:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1383796AbiEBIlo (ORCPT ); Mon, 2 May 2022 04:41:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383811AbiEBIlm (ORCPT ); Mon, 2 May 2022 04:41:42 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2284D186C6; Mon, 2 May 2022 01:38:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1651480695; x=1683016695; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=bVbPOiK0y82rmhyKlFrtAgGmGuURv7LBQSfEtrPIoNU=; b=b8EDs9Z6dzQu+RoE0IR9ASNKsToHdNLkw9VzqHRsE7UC0S7kLijl2Pm9 OruROcNJYms4qkdvKbfg3a83Z5D/48HaoSxQ+9Pbv3HA6zOWK9CsW1EYh +SPcutuNq6KSojwnjVZ/6uY0c5cafiyxzVFXEU34i77tgbnWHMf5EvuPC Q=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 02 May 2022 01:38:15 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 May 2022 01:38:13 -0700 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 02 May 2022 14:07:51 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 0B32B3BED; Mon, 2 May 2022 14:07:50 +0530 (+0530) From: Rohit Agarwal To: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, ulf.hansson@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, adrian.hunter@intel.com, bhupesh.sharma@linaro.org Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Rohit Agarwal Subject: [PATCH 4/4] ARM: dts: qcom: sdx65: Add Shared memory manager support Date: Mon, 2 May 2022 14:07:45 +0530 Message-Id: <1651480665-14978-5-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> References: <1651480665-14978-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add smem node to support shared memory manager on SDX65 platform. Signed-off-by: Rohit Agarwal --- arch/arm/boot/dts/qcom-sdx65.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index 210e55c..57bda62 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -87,8 +87,10 @@ }; smem_mem: memory@8fe20000 { - no-map; + compatible = "qcom,smem"; reg = <0x8fe20000 0xc0000>; + hwlocks = <&tcsr_mutex 3>; + no-map; }; cmd_db: reserved-memory@8fee0000 {